Functionalities of the board


Analog Input
Analog Output
Digital I/O
RTSI bus
Programmable Functions
Interrupt and DMA manager






Analog Input


The analog input section of the board is composed of one 12-bit ADC converter with an external multiplexer which provides up to 16 input lines (8 in differential mode). Analog input is completely software configurable.

Three input mode are allowed:

Configuration Description



A channel configured in DIFF mode uses two analog input lines. One line connects to the positive input of the board's programmable gain instrumentation amplifier (PGIA), and the other connects to the negative input of the PGIA


(referenced single-ended)

A channel configured in RSE mode uses one analog input line, which connects t the positive input of the PGIA. The negative input of the PGIA is internally tied to analog input ground (AIGND)


(nonreferenced single-ended)

A channel configured in NRSE mode uses one analog input line, which connects to the positive input of the PGIA. The negative input of the PGIA connects to analog input sense (AISENSE)










Input Range:

Bipolar Input range changes with the programmed gain.

Gain Input Range Precision
0.5 -10 to +10 V 4.88 mV
1.0 -5 to +5 V 2.44 mV
10.0 -500 to + 500mV 244.14 uV
100.0 -50 to +50 uV 24.41 uV


When enable approximately 0.5 LSBrms of WHITE GAUSSIAN NOISE will be added to signal. This addition is useful in application which involving averaging to increase the resolution of the board because it removes the effects of quantization and reduces measurement noise, resulting in improved resolution. For high-speed application not involving averaging or spectral analysis is better to disable the dither to reduce noise.


Analog Output



These board supply two channels of analog output voltage at the I/O connector. The bipolar range is fixed at +/- 10 V. Data written to the digital-to-analog converter (DAC) will be interpreted as two's complement format. In normal operation a DAC output will glitch whenever it is updated with a new value. The glitch energy differs from code to code and appears as distortion in the frequency spectrum


Digital Lines



The board contain eight lines of digital I/O (DIO <0..7>) for general purpose use. It's possible to configure each line for either input or output. At system startup and reset, the digital lines are all high impedance.

The hardware up/down control for general purpose counter 0 and 1 are internally tied to DIO6 and DIO7 respectively. Thus, you can use these two lines to control counters. The up/down control signals are input only and do not affect the operation of the DIO lines.

6025E board uses an additional 82C55A Programmable Peripheral Interface to provide 24 additional digital I/O lines shared in three 8-bit ports (PA, PB and PC). Port A and port B can be configured as input or output while port C could be shared into two nibble that can be programmed separately.

82C55A can work in three different modes:

Mode Description Ports
Mode 0 simple I/O

Can be programmed separately

Mode 1 strobed I/O

Divide into two groups: Group A and Group B. Each group has eight data bits, plus control and status bits provided by port C

Mode 2 bidirectional I/O

Divide into two groups: Group A and Group B. Each group has eight data bits, plus control and status bits provided by port C










The DAQ-STC present on board supply two 24-bit general purpose timers/counters. They can be completely software configurable. Operation allowed with counters/timers are:

Event counting
Position sensing
Time measurement
Pulse generation
Square wave generation






RTSI bus


Pci 6025 E uses the RTSI bus to interconnect timing signals between boards. It's possible to provide timing signals to other boards or to acquire timing signals from other boards through this bus. Typically is to acquire gate signal for the counters or trigger signals for Analog Input or Analog Output operations. It's possible to drive the internal timebase to the RTSI bus to provide inphase clock for other boards otherwise it's possible to get timebase from RTSI bus. On this bus there are seven trigger lines to provide a very flexible interconnection scheme for any board sharing RTSI bus. These bidirectional lines can drive any of eight timing signals onto RTSI bus and can receive any of these timing signals.


PFI signals


Ten PFI pins are available on the board connector as PFI<0..9> and are connected to the board's internal signal routing multiplexer for each timing signal. Software can select any one of the PFI ins as the external source for a given timing signal. It's important to note that any of the any of the PFI pins can be used as an input by any of the timing signals and that multiple timing signals can use the same PFI simultaneously. This flexible routing scheme reduces the need to change physical connections of the I/O connector for different applications. You can also individually enable each of the PFI pins to output a specific internal timing signal. For example, if you need the UPDATE* signal as an output on the I/O connector, software can turn on the output driver for the PFI5/UPDATE* pin.


Interrupt and DMA manager


DAQ-STC has an ICM (Interrupt Control Module) that consists of two interrupt banks that can be routed to any two of the eight open drain, interrupt output lines. The ICM allows using one or two interrupt channel interfaces to the CPU. Two group of interrupt can be handled: the first group (Group A) handles the interrupts associated with Analog Input Timing Module (AITM), the board-level interrupt IRQ_IN0 and the General purpose counter timer 0; the second group (Group B) handles the interrupts associated with Analog Output Timing Module (AOTM) , the board level IRQ_IN1, and the General Purpose Counter Timer 1

It is also possible through the two additional controlled outputs from each interrupt groups enable and manage a DMA transfer from board to memory or from memory to board.


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