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1197 | giacomo | 1 | /***************************************************************************** |
2 | * Filename: ADC.C * |
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3 | * Author: Ghiro Andrea,Franchino Gianluca * |
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4 | * Date: 06/06/2001 * |
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5 | * Description: Analog 2 digital conversion functions * |
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6 | *----------------------------------------------------------------------------* |
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7 | * Notes: Funcion for one sample from Ch0 * |
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8 | *****************************************************************************/ |
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9 | |||
10 | /* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it |
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11 | * |
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12 | * Copyright (C) 2003 Ghiro Andrea,Franchino Gianluca |
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13 | * |
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14 | * This program is free software; you can redistribute it and/or modify |
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15 | * it under the terms of the GNU General Public License as published by |
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16 | * the Free Software Foundation; either version 2 of the License, or |
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17 | * (at your option) any later version. |
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18 | * |
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19 | * This program is distributed in the hope that it will be useful, |
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20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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22 | * GNU General Public License for more details. |
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23 | * |
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24 | * You should have received a copy of the GNU General Public License |
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25 | * along with this program; if not, write to the Free Software |
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26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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27 | * |
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28 | */ |
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29 | |||
30 | #include "adc.h" |
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31 | |||
32 | /* |
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33 | * Call this function to configure board options. |
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34 | */ |
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35 | |||
36 | void Configure_Board(BYTE numch) |
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37 | { |
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38 | WORD memhi; |
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39 | /* |
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40 | * Writing to register Write_Strobe_0_Register with address 82. |
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41 | * Write_Strobe_0 <= 1 |
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42 | * New pattern = 0x0001 |
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43 | */ |
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44 | DAQ_STC_Windowed_Mode_Write(WRITE_STROBE_0,0x0001); |
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45 | |||
46 | /* |
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47 | * Writing to register Write_Strobe_1_Register with address 83. |
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48 | * Write_Strobe_1 <= 1 |
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49 | * New pattern = 0x0001 |
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50 | */ |
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51 | DAQ_STC_Windowed_Mode_Write(WRITE_STROBE_1,0x0001); |
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52 | |||
53 | /* |
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54 | * Writing to register Config_Memory_High_Register with address 18. |
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55 | * CM_Channel_Number <= channel_number (0) |
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56 | * CM_Channel_Bank <= channel_bank (0) |
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57 | * CM_Channel_Type <= channel_type_for_rev_b (3) |
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58 | * New pattern = 0x3000 |
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59 | */ |
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60 | memhi = 0x3000 | numch; |
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61 | Immediate_Writew(ADC_CONFIG_HI,memhi); |
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62 | |||
63 | /* |
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64 | * Writing to register Config_Memory_Low_Register with address 16. |
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65 | * CM_Last_Channel <= last_channel (1) |
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66 | * CM_Trigger <= trigger (0) |
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67 | * CM_AI_Gain <= ai_gain (1) |
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68 | * CM_AI_Polarity <= ai_polarity (0) |
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69 | * CM_AI_Dither_Enable <= ai_dither_enable (0) |
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70 | * New pattern = 0x8001 |
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71 | */ |
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72 | Immediate_Writew(ADC_CONFIG_LO,0x8100); |
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73 | return; |
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74 | } |
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75 | |||
76 | /* |
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77 | * program the ADC_STC |
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78 | */ |
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79 | |||
80 | void ADC_Init() |
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81 | { |
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82 | /* |
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83 | * configure the timebase options. |
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84 | */ |
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85 | /* |
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86 | * Writing to register Clock_and_FOUT_Register with address 56. |
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87 | * Slow_Internal_Timebase <= p->msc_slow_int_tb_enable (1) |
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88 | * Slow_Internal_Time_Divide_By_2 <= p->msc_slow_int_tb_divide_by_2 (1) |
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89 | * Clock_To_Board <= p->msc_clock_to_board_enable (1) |
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90 | * Clock_To_Board_Divide_By_2 <= p->msc_clock_to_board_divide_by_2 (1) |
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91 | * New pattern = 0x1B00 |
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92 | */ |
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93 | DAQ_STC_Windowed_Mode_Write(CLOCK_AND_FOUT,0x1B00); |
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94 | |||
95 | /* |
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96 | * clear the AI FIFO. |
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97 | */ |
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98 | /* |
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99 | * Writing to register Write_Strobe_1_Register with address 83. |
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100 | * Write_Strobe_1 <= 1 |
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101 | * New pattern = 0x0001 |
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102 | */ |
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103 | DAQ_STC_Windowed_Mode_Write(WRITE_STROBE_1,0x0001); |
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104 | |||
105 | /* |
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106 | * stop any activities in progress. |
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107 | */ |
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108 | /* |
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109 | * Writing to register Joint_Reset_Register with address 72. |
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110 | * AI_Reset <= 1 |
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111 | * New pattern = 0x0001 |
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112 | */ |
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113 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0001); |
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114 | |||
115 | /* |
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116 | * Writing to register Joint_Reset_Register with address 72. |
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117 | * AI_Configuration_Start <= 1 |
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118 | * New pattern = 0x0010 |
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119 | */ |
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120 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0010); |
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121 | |||
122 | /* |
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123 | * Writing to register Interrupt_A_Ack_Register with address 2. |
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124 | * AI_SC_TC_Error_Confirm <= 1 |
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125 | * AI_SC_TC_Interrupt_Ack <= 1 |
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126 | * AI_START1_Interrupt_Ack <= 1 |
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127 | * AI_START2_Interrupt_Ack <= 1 |
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128 | * AI_START_Interrupt_Ack <= 1 |
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129 | * AI_STOP_Interrupt_Ack <= 1 |
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130 | * AI_Error_Interrupt_Ack <= 1 |
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131 | * New pattern = 0x3F80 |
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132 | */ |
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133 | DAQ_STC_Windowed_Mode_Write(INTERRUPT_A_ACK,0x3F80); |
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134 | |||
135 | /* |
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136 | * Writing to register AI_Command_1_Register with address 8. |
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137 | * AI_Command_1_Register <= 0 |
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138 | * New pattern = 0x0000 |
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139 | */ |
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140 | DAQ_STC_Windowed_Mode_Write(AI_COMMAND_1,0x0000); |
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141 | |||
142 | /* |
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143 | * Writing to register AI_Mode_1_Register with address 12. |
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144 | * Reserved_One <= 1 |
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145 | * AI_Start_Stop <= 1 |
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146 | * New pattern = 0x000C |
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147 | */ |
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148 | DAQ_STC_Windowed_Mode_Write(AI_MODE_1,0x000C); |
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149 | |||
150 | /* |
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151 | * Writing to register Joint_Reset_Register with address 72. |
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152 | * AI_Configuration_Start <= 0 |
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153 | * AI_Configuration_End <= 1 |
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154 | * New pattern = 0x0100 |
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155 | */ |
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156 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0100); |
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157 | |||
158 | /* |
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159 | * setup the board. |
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160 | */ |
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161 | /* |
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162 | * Writing to register Joint_Reset_Register with address 72. |
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163 | * AI_Configuration_Start <= 1 |
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164 | * New pattern = 0x0010 |
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165 | */ |
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166 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0010); |
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167 | |||
168 | /* |
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169 | * Writing to register Clock_and_FOUT_Register with address 56. |
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170 | * AI_Source_Divide_By_2 <= p->ai_source_divide_by_2 (0) |
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171 | * AI_Output_Divide_By_2 <= p->ai_output_divide_by_2 (1) |
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172 | * New pattern = 0x1B80 |
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173 | */ |
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174 | DAQ_STC_Windowed_Mode_Write(CLOCK_AND_FOUT,0x1B80); |
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175 | |||
176 | /* |
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177 | * Writing to register AI_Personal_Register with address 77. |
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178 | * AI_CONVERT_Pulse_Timebase <= p->ai_convert_pulse_timebase (0) |
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179 | * AI_CONVERT_Pulse_Width <= p->ai_convert_pulse_width (1) |
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180 | * AI_FIFO_Flags_Polarity <= p->ai_fifo_flags_polarity (0) |
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181 | * AI_LOCALMUX_CLK_Pulse_Width <= p->ai_localmux_clk_pulse_width (1) |
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182 | * AI_AIFREQ_Polarity <= p->ai_aifreq_polarity (0) |
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183 | * AI_SHIFTIN_Polarity <= p->ai_shiftin_polarity (0) |
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184 | * AI_SHIFTIN_Pulse_Width <= p->ai_shiftin_pulse_width (1) |
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185 | * AI_EOC_Polarity <= p->ai_eoc_polarity (0) |
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186 | * AI_SOC_Polarity <= p->ai_soc_polarity (1) |
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187 | * AI_Overrun_Mode <= p->ai_overrun_mode (1) |
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188 | * New pattern = 0xA4A0 |
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189 | */ |
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190 | DAQ_STC_Windowed_Mode_Write(AI_PERSONAL,0xA4A0); |
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191 | |||
192 | /* |
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193 | * Writing to register AI_Output_Control_Register with address 60. |
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194 | * AI_CONVERT_Output_Select <= p->ai_convert_output_select (2) |
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195 | * AI_SC_TC_Output_Select <= p->ai_sc_tc_output_select (3) |
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196 | * AI_SCAN_IN_PROG_Output_Select <= p->ai_scan_in_prog_output_select (3) |
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197 | * AI_LOCALMUX_CLK_Output_Select <= p->ai_localmux_clk_output_select (2) |
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198 | * New pattern = 0x032E |
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199 | */ |
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200 | DAQ_STC_Windowed_Mode_Write(AI_OUTPUT_CONTROL,0x032E); |
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201 | |||
202 | /* |
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203 | * Writing to register Joint_Reset_Register with address 72. |
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204 | * AI_Configuration_Start <= 0 |
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205 | * AI_Configuration_End <= 1 |
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206 | * New pattern = 0x0100 |
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207 | */ |
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208 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0100); |
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209 | |||
210 | /* |
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211 | * access the first value in the configuration |
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212 | * FIFO. |
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213 | */ |
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214 | /* |
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215 | * Writing to register AI_Command_1_Register with address 8. |
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216 | * AI_CONVERT_Pulse <= 1 |
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217 | * New pattern = 0x0001 |
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218 | */ |
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219 | DAQ_STC_Windowed_Mode_Write(AI_COMMAND_1,0x0001); |
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220 | |||
221 | /* |
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222 | * setup for external hardware. |
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223 | */ |
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224 | /* |
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225 | * Writing to register Joint_Reset_Register with address 72. |
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226 | * AI_Configuration_Start <= 1 |
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227 | * New pattern = 0x0010 |
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228 | */ |
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229 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0010); |
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230 | |||
231 | /* |
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232 | * Writing to register AI_Mode_2_Register with address 13. |
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233 | * AI_External_MUX_Present <= 0 |
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234 | * New pattern = 0x0000 |
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235 | */ |
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236 | DAQ_STC_Windowed_Mode_Write(AI_MODE_2,0x0000); |
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237 | |||
238 | /* |
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239 | * Writing to register AI_Output_Control_Register with address 60. |
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240 | * AI_EXTMUX_CLK_Output_Select <= p->ai_extmux_clk_output_select (0) |
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241 | * New pattern = 0x032E |
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242 | */ |
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243 | DAQ_STC_Windowed_Mode_Write(AI_OUTPUT_CONTROL,0x032E); |
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244 | |||
245 | /* |
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246 | * Writing to register Joint_Reset_Register with address 72. |
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247 | * AI_Configuration_Start <= 0 |
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248 | * AI_Configuration_End <= 1 |
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249 | * New pattern = 0x0100 |
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250 | */ |
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251 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0100); |
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252 | |||
253 | /* |
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254 | * enable or disable retriggering. |
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255 | */ |
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256 | /* |
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257 | * Writing to register Joint_Reset_Register with address 72. |
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258 | * AI_Configuration_Start <= 1 |
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259 | * New pattern = 0x0010 |
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260 | */ |
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261 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0010); |
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262 | |||
263 | /* |
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264 | * Writing to register AI_Mode_1_Register with address 12. |
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265 | * AI_Trigger_Once <= 1 |
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266 | * New pattern = 0x000D |
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267 | */ |
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268 | DAQ_STC_Windowed_Mode_Write(AI_MODE_1,0x000D); |
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269 | |||
270 | /* |
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271 | * Writing to register AI_Trigger_Select_Register with address 63. |
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272 | * AI_START1_Select <= 0 |
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273 | * AI_START1_Polarity <= 0 |
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274 | * AI_START1_Edge <= 1 |
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275 | * AI_START1_Sync <= 1 |
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276 | * New pattern = 0x0060 |
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277 | */ |
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278 | DAQ_STC_Windowed_Mode_Write(AI_TRIGGER_SELECT,0x0060); |
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279 | |||
280 | /* |
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281 | * Writing to register Joint_Reset_Register with address 72. |
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282 | * AI_Configuration_Start <= 0 |
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283 | * AI_Configuration_End <= 1 |
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284 | * New pattern = 0x0100 |
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285 | */ |
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286 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0100); |
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287 | |||
288 | /* |
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289 | * select the number of scans. |
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290 | */ |
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291 | /* |
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292 | * Writing to register Joint_Reset_Register with address 72. |
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293 | * AI_Configuration_Start <= 1 |
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294 | * New pattern = 0x0010 |
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295 | */ |
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296 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0010); |
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297 | |||
298 | DAQ_STC_Windowed_Mode_Write(AI_MODE_1,0x000F); |
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299 | |||
300 | /* |
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301 | * Writing to register Joint_Reset_Register with address 72. |
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302 | * AI_Configuration_Start <= 0 |
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303 | * AI_Configuration_End <= 1 |
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304 | * New pattern = 0x0100 |
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305 | */ |
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306 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0100); |
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307 | |||
308 | /* |
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309 | * select the scan start event. |
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310 | */ |
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311 | /* |
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312 | * Writing to register Joint_Reset_Register with address 72. |
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313 | * AI_Configuration_Start <= 1 |
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314 | * New pattern = 0x0010 |
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315 | */ |
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316 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0010); |
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317 | |||
318 | /* |
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319 | * Writing to register AI_START_STOP_Select_Register with address 62. |
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320 | * AI_START_Select <= 0 |
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321 | * AI_START_Edge <= 1 |
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322 | * AI_START_Sync <= 1 |
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323 | * AI_START_Polarity <= 0 |
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324 | * New pattern = 0x0060 |
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325 | */ |
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326 | DAQ_STC_Windowed_Mode_Write(AI_START_STOP_SELECT,0x0060); |
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327 | |||
328 | |||
329 | /* |
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330 | * Writing to register Joint_Reset_Register with address 72. |
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331 | * AI_Configuration_Start <= 0 |
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332 | * AI_Configuration_End <= 1 |
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333 | * New pattern = 0x0100 |
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334 | */ |
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335 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0100); |
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336 | |||
337 | /* |
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338 | * select the end of scan event. |
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339 | */ |
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340 | /* |
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341 | * Writing to register Joint_Reset_Register with address 72. |
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342 | * AI_Configuration_Start <= 1 |
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343 | * New pattern = 0x0010 |
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344 | */ |
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345 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0010); |
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346 | |||
347 | /* |
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348 | * Writing to register AI_START_STOP_Select_Register with address 62. |
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349 | * AI_STOP_Select <= p->ai_stop_select (19) |
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350 | * AI_STOP_Edge <= 0 |
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351 | * AI_STOP_Polarity <= p->ai_stop_polarity (0) |
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352 | * AI_STOP_Sync <= 1 |
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353 | * New pattern = 0x29E0 |
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354 | */ |
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355 | DAQ_STC_Windowed_Mode_Write(AI_START_STOP_SELECT,0x29E0); |
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356 | |||
357 | /* |
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358 | * Writing to register Joint_Reset_Register with address 72. |
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359 | * AI_Configuration_Start <= 0 |
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360 | * AI_Configuration_End <= 1 |
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361 | * New pattern = 0x0100 |
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362 | */ |
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363 | DAQ_STC_Windowed_Mode_Write(JOINT_RESET,0x0100); |
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364 | |||
365 | /* |
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366 | * clear the AI FIFO. |
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367 | */ |
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368 | /* |
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369 | * Writing to register Write_Strobe_1_Register with address 83. |
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370 | * Write_Strobe_1 <= 1 |
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371 | * New pattern = 0x0001 |
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372 | */ |
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373 | DAQ_STC_Windowed_Mode_Write(WRITE_STROBE_1,0x0001); |
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374 | return; |
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375 | } |
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376 | |||
377 | /* |
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378 | * Call this function to start the acquistion. |
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379 | */ |
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380 | |||
381 | void AI_Start_The_Acquisition() |
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382 | { |
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383 | /* |
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384 | * Writing to register AI_Command_1_Register with address 8. |
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385 | * AI_CONVERT_Pulse <= 1 |
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386 | * New pattern = 0x0001 |
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387 | */ |
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388 | DAQ_STC_Windowed_Mode_Write(AI_COMMAND_1,0x0001); |
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389 | return; |
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390 | } |
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391 | |||
392 | /*End of file: adc.c*/ |
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393 | |||
394 | |||
395 | |||
396 | |||
397 | |||
398 | |||
399 | |||
400 |