WebSVN - shark - Blame - Rev 2 - /shark/branches/pj/drivers/pci6025e/dac/dac.c

Rev	Author	Line No.	Line
2	pj	1	/*****************************************************************************
		2	* Filename: DAC.C * *
		3	* Author: Marco Ziglioli (Doctor Stein) * *
		4	* Date: 06/06/2001 * *
		5	* Description: Digital 2 analog conversion functions *
		6	----------------------------------------------------------------------------
		7	* Notes: Only module one of Analog Output Timing Module are programmed yet *
		8	* No waveform staging and local buffer mode with pauses are *
		9	* implemented yet *
		10	* Please refer to STC-DAC Technical Reference Manual and PCI E-Series *
		11	* Programmer Level Manual for further information *
		12	*****************************************************************************/
		13
		14	/* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it
		15	*
		16	* Copyright (C) 2001 Marco Ziglioli
		17	*
		18	* This program is free software; you can redistribute it and/or modify
		19	* it under the terms of the GNU General Public License as published by
		20	* the Free Software Foundation; either version 2 of the License, or
		21	* (at your option) any later version.
		22	*
		23	* This program is distributed in the hope that it will be useful,
		24	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		25	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		26	* GNU General Public License for more details.
		27	*
		28	* You should have received a copy of the GNU General Public License
		29	* along with this program; if not, write to the Free Software
		30	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		31	*
		32	*/
		33
		34
		35
		36	#include <drivers/pci6025e/dac.h>
		37
		38	//Software copies of useful registers
		39	static WORD ao_command_1, ao_command_2, ao_personal, ao_mode_1, ao_mode_2,
		40	ao_mode_3, ao_output_control, ao_start_select, ao_trigger_select;
		41
		42	static BYTE DAC_Initialized = 0;
		43
		44	/*****************************************************************************
		45	* void DAC_reset(void) *
		46	----------------------------------------------------------------------------
		47	* Reset both two DACs and the timing system *
		48	*****************************************************************************/
		49	void DAC_reset(void)
		50	{
		51	set(joint_reset, 5); //Enable AOTM configuration
		52	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		53	clr(joint_reset, 5);
		54
		55	//Disarm Timing module
		56	set(ao_command_1, 13);
		57	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_1, ao_command_1);
		58	clr(ao_command_1, 13);
		59
		60	//Clear all registers
		61	DAQ_STC_Windowed_Mode_Write(AO_PERSONAL, 0x0000);
		62	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_1, 0x0000);
		63	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_2, 0x0000);
		64	DAQ_STC_Windowed_Mode_Write(AO_MODE_1, 0x0000);
		65	DAQ_STC_Windowed_Mode_Write(AO_MODE_2, 0x0000);
		66	DAQ_STC_Windowed_Mode_Write(AO_MODE_3, 0x0000);
		67	DAQ_STC_Windowed_Mode_Write(AO_OUTPUT_CONTROL, 0x0000);
		68	DAQ_STC_Windowed_Mode_Write(AO_START_SELECT, 0x0000);
		69	DAQ_STC_Windowed_Mode_Write(AO_TRIGGER_SELECT, 0x0000);
		70
		71	//Clear software copies
		72	ao_personal = ao_command_1 = ao_command_2 = ao_mode_1 = ao_mode_2 =
		73	ao_mode_3 = ao_output_control = ao_start_select = ao_trigger_select = 0;
		74
		75	//Disable related interrupt flags
		76	interrupt_b_enable &= 0xFE80;
		77	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ENABLE, interrupt_b_enable);
		78
		79	//Enable related interrupt request flags
		80	interrupt_b_ack \|= 0x3F98;
		81	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ACK, interrupt_b_ack);
		82
		83	set(ao_personal, 4);
		84	DAQ_STC_Windowed_Mode_Write(AO_PERSONAL, ao_personal);
		85
		86	set(joint_reset, 9); //Disable AOTM configuration
		87	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		88	clr(joint_reset, 9);
		89	}
		90
		91	/*****************************************************************************
		92	* void DAC_boardInit(BYTE clock, WORD personal) *
		93	----------------------------------------------------------------------------
		94	* Use this function to program software selectable options in the primary *
		95	* module. The options include source, polarity and pulsewidth of the most *
		96	* common used signals. This function must be executed after every invoke of *
		97	* DAC_reset and before executing any output operation. *
		98	* Parameters: *
		99	* clock *
		100	* -bit 0: if sets to 1 AO_IN_TIMEBASE is IN_TIMEBASE divided by 2 *
		101	* -bit 1: if sets to 1 AO_OUT_TIMEBASE is IN_TIMEBASE divideb by 2*
		102	* -bit 2..9 NOT USED
		103	* personal *
		104	* -bit 0...1: update output signal select 0(high Z); 1(GND); *
		105	* 2(enable active low); 3(enable active high) *
		106	* -bit 2...4: not used (let this bit to 0) *
		107	* -bit 5: update pulse width 0(3-3.5 AO_OUT_TIMEBASE period) *
		108	* 1(1-1.5 AO_OUT_TIMEBASE period) *
		109	* -bit 6: update pulse timabase 0(selected by AO_UPDATE pulse_Wi) *
		110	* 1(selected by AO_UPDATE original) *
		111	* -bit 7: not used *
		112	* -bit 8: DMA PIO control 0(FIFO Data interface mode) *
		113	* 1(unbuffered data interface mode) *
		114	* -bit 9: not used *
		115	* -bit 10: enable TMRDACWR which control Analog Output FIFO *
		116	* -bit 11: FIFO flags polarity 0(active low) *
		117	* -bit 12: TMRDACWR pulse width 0(3 AO_OUT_TIMEBASE period) *
		118	* 1(2 AO_OUT_TIMEBASE period) *
		119	* -bit 13: not used *
		120	* -bit 14: number of DAC packages 0(dual-DAC mode) *
		121	* 1(single-DAC mode) *
		122	* -bit 15: NOT USED *
		123	*****************************************************************************/
		124	void DAC_boardInit(BYTE clock, WORD personal)
		125	{
		126	set(joint_reset, 5);
		127	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		128	clr(joint_reset, 5);
		129
		130	//Setup AOTM clock module
		131	clock_and_fout = (clock_and_fout & 0xFFFC) \| (clock & 0x03);
		132	DAQ_STC_Windowed_Mode_Write(CLOCK_AND_FOUT, clock_and_fout);
		133
		134	//Setup Update signal
		135	ao_output_control = (ao_output_control & 0xFFFC) \| (personal & 0x0003);
		136	DAQ_STC_Windowed_Mode_Write(AO_OUTPUT_CONTROL, ao_output_control);
		137
		138	ao_personal = (ao_personal & 0x229F) \| (personal & 0xDD6F);
		139	DAQ_STC_Windowed_Mode_Write(AO_PERSONAL, ao_personal);
		140
		141	clr(ao_start_select, 12);
		142	DAQ_STC_Windowed_Mode_Write(AO_START_SELECT, ao_start_select);
		143
		144	set(joint_reset, 9);
		145	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		146	clr(joint_reset, 9);
		147	}
		148
		149	/*****************************************************************************
		150	* void DAC_trigger(WORD trigger) *
		151	----------------------------------------------------------------------------
		152	* With this function you can select which is the signal which trigger the *
		153	* analog output operation *
		154	* parameter: *
		155	* bit 0...4: start1 source select 0 -> bitfiled AO_START_1 pulse *
		156	* 1..10 -> PFI<0..9> *
		157	* 11..17 -> RTSI<0..6> *
		158	* bit 5: edge detection 0(disable) 1(enable) *
		159	* bit 6: synchronization 0(disable) 1(enable) *
		160	* bit 13: start1 polarity 0(active hi) 1(active lo) *
		161	* bit 14: synchronized with BC source 0(disable) 1(enable) *
		162	* bit 15: set this bit for single operation or clear for continuos mode *
		163	* bit 7..12: NOT USED *
		164	*****************************************************************************/
		165	void DAC_trigger(WORD trigger)
		166	{
		167	set(joint_reset, 5);
		168	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		169	clr(joint_reset, 5);
		170
		171	//Select continuos or one shoot mode
		172	if(trigger&0x8000) set(ao_mode_1, 0);
		173	else clr(ao_mode_1, 0);
		174	DAQ_STC_Windowed_Mode_Write(AO_MODE_1, ao_mode_1);
		175
		176	//select source
		177	if( (trigger&0x001F) == 0 )
		178	ao_trigger_select = (ao_trigger_select & 0xDF80) \| 0x0060;
		179	else
		180	ao_trigger_select = (ao_trigger_select & 0xDF80) \| (trigger & 0x007F);
		181
		182	//triger signal synchronization
		183	ao_trigger_select = (ao_trigger_select & 0x9FFF) \| (trigger & 0x6000);
		184	DAQ_STC_Windowed_Mode_Write(AO_TRIGGER_SELECT, ao_trigger_select);
		185
		186	clr(ao_mode_3, 11);
		187	DAQ_STC_Windowed_Mode_Write(AO_MODE_3, ao_mode_3);
		188
		189	set(joint_reset, 9);
		190	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		191	clr(joint_reset, 9);
		192	}
		193
		194	/*****************************************************************************
		195	* void DAC_numSetup(DWORD n_updates, DWORD n_iter) *
		196	----------------------------------------------------------------------------
		197	* Use this function to set up number of updates that must be performed and *
		198	* the number of buffer iterations. No Local buffered mode with pauses and *
		199	* waveform staging are implemented yet. Please refer to DAQ STC Technical *
		200	* Reference Manual for this features *
		201	* Parameters: *
		202	* n_updates: number of updates in each buffer operation *
		203	* n_iter: number of iterations that must be performed *
		204	*****************************************************************************/
		205	void DAC_numSetup(DWORD n_updates, DWORD n_iter)
		206	{
		207	set(joint_reset, 5);
		208	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		209	clr(joint_reset, 5);
		210
		211	set(ao_mode_1, 1);
		212	DAQ_STC_Windowed_Mode_Write(AO_MODE_1, ao_mode_1);
		213
		214	clr(ao_mode_2, 2);
		215	DAQ_STC_Windowed_Mode_Write(AO_MODE_2, ao_mode_2);
		216
		217	//Load numbre of updates for each iteration
		218	DAQ_STC_Windowed_Mode_Write(AO_BC_LOAD_A_LO, (WORD)n_updates);
		219	DAQ_STC_Windowed_Mode_Write(AO_BC_LOAD_A_HI, (WORD)(n_updates>>16));
		220
		221	set(ao_command_1, 5);
		222	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_1, ao_command_1);
		223	clr(ao_command_1, 5);
		224
		225	clr(ao_mode_2, 11);
		226	DAQ_STC_Windowed_Mode_Write(AO_MODE_2, ao_mode_2);
		227
		228	//load number of iteration
		229	DAQ_STC_Windowed_Mode_Write(AO_UC_LOAD_A_LO, (WORD)n_iter);
		230	DAQ_STC_Windowed_Mode_Write(AO_UC_LOAD_A_HI, (WORD)(n_iter>>16));
		231
		232	set(ao_command_1, 7);
		233	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_1, ao_command_1);
		234	clr(ao_command_1, 7);
		235
		236	set(joint_reset, 9);
		237	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		238	clr(joint_reset, 9);
		239	}
		240
		241	/*****************************************************************************
		242	* void DAC_update(BYTE source, BYTE ui) *
		243	----------------------------------------------------------------------------
		244	* Use this function to select the update event. No waveform staging or local *
		245	* buffer mode with pauses are implemented yet. *
		246	* Parameters: *
		247	* source: bit 0..4: update signal source *
		248	* bit 5: polarity of update signal *
		249	* bit 6..7 NOT USED *
		250	* ui : bit 0..4: UI source select *
		251	* bit 5: polarity of UI signal *
		252	* bit 6..7: NOT USED *
		253	*****************************************************************************/
		254	void DAC_update(BYTE source, BYTE ui)
		255	{
		256	set(joint_reset, 5);
		257	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		258	clr(joint_reset, 5);
		259
		260	if( (source&0x1F)==0 ){
		261	clr(ao_command_2, 11);
		262
		263	ao_mode_1 &= 0x07FF;
		264	clr(ao_mode_1, 4);
		265	if( (ui&0x1F)==0 ){
		266	ao_mode_1 &= 0xF83F;
		267	clr(ao_mode_1, 3);
		268	} else {
		269	if( (ui&0x1F)==20 ){
		270	ao_mode_1 = (ao_mode_1 & 0xF83F) \| 0x0500;
		271	clr(ao_mode_1, 3);
		272	} else {
		273	ao_mode_1 = (ao_mode_1 & 0xF83F) \| (((WORD)ui & 0x001F)<<6);
		274	if(ui & 0x20) set(ao_mode_1, 3);
		275	else clr(ao_mode_1, 3);
		276	}
		277	}
		278	} else {
		279	if( (source&0x1F)==19 ){
		280	set(ao_command_2, 11);
		281	ao_mode_1 = (ao_mode_1 & 0x07FF) \| 0x9800;
		282	clr(ao_mode_1, 4);
		283	} else {
		284	set(ao_command_2, 11);
		285	ao_mode_1 = (ao_mode_1 & 0x07FF) \| (((WORD)source&0x001F)<<11);
		286	if(source&0x20) set(ao_mode_1, 4);
		287	else clr(ao_mode_1, 4);
		288	}
		289	}
		290
		291	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_2, ao_command_2);
		292	DAQ_STC_Windowed_Mode_Write(AO_MODE_1, ao_mode_1);
		293
		294	set(joint_reset, 9);
		295	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		296	clr(joint_reset, 9);
		297	}
		298
		299	/*****************************************************************************
		300	* void DAC_channel(BYTE num) *
		301	----------------------------------------------------------------------------
		302	* Use this function to select hom many analog input channel must be updated *
		303	* every UPDATE event *
		304	* Parameters: multi: if it's different from 0 multiple channel feature are*
		305	* enabled *
		306	* num: number of channels that must be updated *
		307	* Note: With PCI6025E only two channel (DAC0 DAC1) are available *
		308	*****************************************************************************/
		309	void DAC_channel(BYTE multi, BYTE num)
		310	{
		311	set(joint_reset, 5);
		312	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		313	clr(joint_reset, 5);
		314
		315	if(multi) set(ao_mode_1, 5);
		316	else clr(ao_mode_1, 5);
		317
		318	ao_output_control = (ao_output_control & 0xFC3F) \| (((WORD)num&0x0F)<<6);
		319
		320	DAQ_STC_Windowed_Mode_Write(AO_MODE_1, ao_mode_1);
		321	DAQ_STC_Windowed_Mode_Write(AO_OUTPUT_CONTROL, ao_output_control);
		322
		323	set(joint_reset, 9);
		324	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		325	clr(joint_reset, 9);
		326	}
		327
		328	/*****************************************************************************
		329	* void DAC_LDACSourceUpdate(BYTE pref) *
		330	----------------------------------------------------------------------------
		331	* Use this function to set source and update mode for LDAC<0..1> signals *
		332	* Parameter: pref: bit 0: LDAC0 source; if 0 LDAC will output on UPDATE *
		333	* else will output on UPDATE2 *
		334	* bit 1: DAC0 update mode; 0 DAC will update immediately *
		335	* 1 timed update mode *
		336	* bit 2: same of bit 0 but for LDAC1 *
		337	* bit 3: same of bit 1 but for DAC1 *
		338	* bit 4..7 NOT USED *
		339	*****************************************************************************/
		340	void DAC_LDACSourceUpdate(BYTE pref)
		341	{
		342	set(joint_reset, 5);
		343	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		344	clr(joint_reset, 5);
		345
		346	ao_command_1 = (ao_command_1 & 0xFFE1) \| (((WORD)pref&0x001E)<<1);
		347	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_1, ao_command_1);
		348
		349	set(joint_reset, 9);
		350	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		351	clr(joint_reset, 9);
		352	}
		353
		354	/*****************************************************************************
		355	* void DAC_stopError(BYTE error) *
		356	----------------------------------------------------------------------------
		357	* Use this function to set up the error conditions upon which the Timing *
		358	* Module of Analog Output will stop *
		359	* Parameter: error: bit 0 Stop on BC_TC error *
		360	* bit 1 Stop on BC_TC Trigger error *
		361	* bit 2 Stop on Overrun error *
		362	* bit 3..7 NOT USED *
		363	* Set this bits means that Timing Module will stop. Clear this bits means *
		364	* Timing Module ignores error. *
		365	*****************************************************************************/
		366	void DAC_stopError(BYTE error)
		367	{
		368	set(joint_reset, 5);
		369	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		370	clr(joint_reset, 5);
		371
		372	ao_mode_3 = (ao_mode_3 & 0xFFC7) \| (((WORD)error & 0x0038)<<3);
		373	DAQ_STC_Windowed_Mode_Write(AO_MODE_3, ao_mode_3);
		374
		375	set(joint_reset, 9);
		376	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		377	clr(joint_reset, 9);
		378	}
		379
		380	/*****************************************************************************
		381	* void DAC_FIFOFlags(BYTE flags) *
		382	----------------------------------------------------------------------------
		383	* Use this function to select the data FIFO condition on which Interrupt or *
		384	* DMA request are asserted *
		385	* Parameter: flags: bit 0..1 0 generate on empty FIFO *
		386	* 1 generate on less than half full FIFO *
		387	* 2 generate on less than full FIFO *
		388	* 3 generate on less than half full FIFO but *
		389	* keep asserted until FIFO is full *
		390	* bit 2..7 NOT USED *
		391	*****************************************************************************/
		392	void DAC_FIFOFlags(BYTE flags)
		393	{
		394	set(joint_reset, 5);
		395	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		396	clr(joint_reset, 5);
		397
		398	ao_mode_2 = (ao_mode_2 & 0x1FFF) \| (((WORD)flags & 0x0003) << 14);
		399	DAQ_STC_Windowed_Mode_Write(AO_MODE_2, ao_mode_2);
		400
		401	set(joint_reset, 9);
		402	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset);
		403	clr(joint_reset, 9);
		404	}
		405
		406	/*****************************************************************************
		407	* void DAC_enableInterrupts(WORD itr) *
		408	----------------------------------------------------------------------------
		409	* With this function it's possible to enable event on which Timing Module *
		410	* can generate Interrupt Request *
		411	* Parameter: int: bit 0: BC_TC Interrupt *
		412	* bit 1: START1 Interrupt *
		413	* bit 2: UPDATE Interrupt *
		414	* bit 3: START Interrupt *
		415	* bit 4: NOT USED *
		416	* bit 5: Error Interrupt *
		417	* bit 6: UC_TC Interrupt *
		418	* bit 7: NOT USED *
		419	* bit 8: FIFO Interrupt *
		420	* bit 9..15 NOT USED *
		421	* Set bits to enable interrupt generation or clear to avoid interrupt *
		422	* generation *
		423	*****************************************************************************/
		424	void DAC_enableInterrupts(WORD itr)
		425	{
		426	interrupt_b_enable = (interrupt_b_enable & 0xFE90) \| (itr & 0x016F);
		427
		428	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ENABLE, interrupt_b_enable);
		429	}
		430
		431	/*****************************************************************************
		432	* void DAC_arm(void) *
		433	----------------------------------------------------------------------------
		434	* With this function Analog Output counters will be armed and the first value*
		435	* is preloaded into DACs *
		436	*****************************************************************************/
		437	void DAC_arm(void)
		438	{
		439	set(ao_mode_3, 2);
		440	DAQ_STC_Windowed_Mode_Write(AO_MODE_3, ao_mode_3);
		441
		442	clr(ao_mode_3, 2);
		443	DAQ_STC_Windowed_Mode_Write(AO_MODE_3, ao_mode_3);
		444
		445	while( (DAQ_STC_Windowed_Mode_Read(JOINT_STATUS_2) & 0x0020) != 0 );
		446
		447	ao_command_1 \|= 0x0540;
		448	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_1, ao_command_1);
		449	}
		450
		451	/*****************************************************************************
		452	* void DAC_startOperation(void) *
		453	----------------------------------------------------------------------------
		454	* If software trigger was previously selected this function initiate an *
		455	* analog output operation. If trigger wasn't software driven this function *
		456	* has no effects *
		457	*****************************************************************************/
		458	void DAC_startOperation(void)
		459	{
		460	set(ao_command_2, 0);
		461	DAQ_STC_Windowed_Mode_Write(AO_COMMAND_2, ao_command_2);
		462	clr(ao_command_2, 0);
		463	}
		464
		465	/*****************************************************************************
		466	* void DAC_Init(void) *
		467	----------------------------------------------------------------------------
		468	* This function must be called previously any DAC settings or DAC operations *
		469	* It preapers the envirorment to work with DACs in right way and calls the *
		470	* reset function (DAC_reset) *
		471	*****************************************************************************/
		472	void DAC_Init(void)
		473	{
		474	DAC_Initialized = 1;
		475	/DAC0: Bipolar mode, Internal referenced, ReGlitch disabled/
		476	Immediate_Writew(DAC_CONFIG, 0x0001);
		477
		478	/DAC1: Bipolar mode, Internal referenced, ReGlitch disabled/
		479	Immediate_Writew(DAC_CONFIG, 0x0101);
		480
		481	DAC_reset();
		482	}
		483
		484	/*****************************************************************************
		485	* void DAC_output(BYTE DAC_ID, WORD value) *
		486	----------------------------------------------------------------------------
		487	* Write "value" in "DAC_ID" register and put out the releted analog value *
		488	* Parameters: DAC_ID: This can be DAC0 or DAC1 *
		489	* value: first 12-bit output value *
		490	* last 4 bits NOT USED *
		491	*****************************************************************************/
		492	void DAC_output(BYTE DAC_ID, WORD value)
		493	{
		494	if(DAC_Initialized){
		495	if(DAC_ID) Immediate_Writew(DAC1_DATA, (value & 0x0FFF));
		496	else Immediate_Writew(DAC0_DATA, (value & 0x0FFF));
		497	}
		498	}
		499	/End of file: DAC.C/

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(root)/shark/branches/pj/drivers/pci6025e/dac/dac.c - Rev 2