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582 mauro 1
/*
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 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
3
 *
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 *  Licensed under the terms of the GNU GPL License version 2.
5
 *
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 *  Library for common functions for Intel SpeedStep v.1 and v.2 support
7
 *
8
 *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
9
 */
10
 
11
#include <linuxcomp.h>
12
 
13
#include <linux/kernel.h>
14
#include <linux/module.h> 
15
#include <linux/init.h>
16
#include <linux/cpufreq.h>
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#include <linux/pci.h>
18
#include <linux/slab.h>
19
 
20
#include <asm/msr.h>
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#include "speedstep-lib.h"
22
 
23
 
24
/* DEBUG
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 *   Define it if you want verbose debug output, e.g. for bug reporting
26
 */
775 mauro 27
//#define SPEEDSTEP_DEBUG
582 mauro 28
 
29
#ifdef SPEEDSTEP_DEBUG
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#define dprintk(msg...) printk(msg)
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#else
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#define dprintk(msg...) do { } while(0)
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#endif
34
 
35
/*********************************************************************
36
 *                   GET PROCESSOR CORE SPEED IN KHZ                 *
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 *********************************************************************/
38
 
39
static unsigned int pentium3_get_frequency (unsigned int processor)
40
{
41
        /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
42
        struct {
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                unsigned int ratio;     /* Frequency Multiplier (x10) */
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                u8 bitmap;              /* power on configuration bits
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                                           [27, 25:22] (in MSR 0x2a) */
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        } msr_decode_mult [] = {
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                { 30, 0x01 },
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                { 35, 0x05 },
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                { 40, 0x02 },
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                { 45, 0x06 },
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                { 50, 0x00 },
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                { 55, 0x04 },
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                { 60, 0x0b },
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                { 65, 0x0f },
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                { 70, 0x09 },
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                { 75, 0x0d },
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                { 80, 0x0a },
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                { 85, 0x26 },
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                { 90, 0x20 },
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                { 100, 0x2b },
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                { 0, 0xff }     /* error or unknown value */
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        };
63
 
64
        /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
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        struct {
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                unsigned int value;     /* Front Side Bus speed in MHz */
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                u8 bitmap;              /* power on configuration bits [18: 19]
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                                           (in MSR 0x2a) */
69
        } msr_decode_fsb [] = {
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                {  66, 0x0 },
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                { 100, 0x2 },
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                { 133, 0x1 },
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                {   0, 0xff}
74
        };
75
 
76
        u32     msr_lo, msr_tmp;
77
        int     i = 0, j = 0;
78
 
79
        /* read MSR 0x2a - we only need the low 32 bits */
80
        rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
81
        dprintk(KERN_DEBUG "speedstep-lib: P3 - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
82
        msr_tmp = msr_lo;
83
 
84
        /* decode the FSB */
85
        msr_tmp &= 0x00c0000;
86
        msr_tmp >>= 18;
87
        while (msr_tmp != msr_decode_fsb[i].bitmap) {
88
                if (msr_decode_fsb[i].bitmap == 0xff)
89
                        return 0;
90
                i++;
91
        }
92
 
93
        /* decode the multiplier */
94
        if (processor == SPEEDSTEP_PROCESSOR_PIII_C_EARLY)
95
                msr_lo &= 0x03c00000;
96
        else
97
                msr_lo &= 0x0bc00000;
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        msr_lo >>= 22;
99
        while (msr_lo != msr_decode_mult[j].bitmap) {
100
                if (msr_decode_mult[j].bitmap == 0xff)
101
                        return 0;
102
                j++;
103
        }
104
 
105
        return (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100);
106
}
107
 
108
 
109
static unsigned int pentium4_get_frequency(void)
110
{
111
        u32 msr_lo, msr_hi;
112
 
113
        rdmsr(0x2c, msr_lo, msr_hi);
114
 
115
        dprintk(KERN_DEBUG "speedstep-lib: P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi);
116
 
117
        msr_lo >>= 24;
118
        return (msr_lo * 100000);
119
}
120
 
121
 
122
unsigned int speedstep_get_processor_frequency(unsigned int processor)
123
{
124
        switch (processor) {
125
        case SPEEDSTEP_PROCESSOR_P4M:
126
                return pentium4_get_frequency();
127
        case SPEEDSTEP_PROCESSOR_PIII_T:
128
        case SPEEDSTEP_PROCESSOR_PIII_C:
129
        case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
130
                return pentium3_get_frequency(processor);
131
        default:
132
                return 0;
133
        };
134
        return 0;
135
}
136
EXPORT_SYMBOL_GPL(speedstep_get_processor_frequency);
137
 
138
 
139
/*********************************************************************
140
 *                 DETECT SPEEDSTEP-CAPABLE PROCESSOR                *
141
 *********************************************************************/
142
 
143
unsigned int speedstep_detect_processor (void)
144
{
145
        struct cpuinfo_x86 *c = cpu_data;
146
        u32                     ebx, msr_lo, msr_hi;
147
 
148
        if ((c->x86_vendor != X86_VENDOR_INTEL) ||
149
            ((c->x86 != 6) && (c->x86 != 0xF)))
150
                return 0;
151
 
152
        if (c->x86 == 0xF) {
153
                /* Intel Mobile Pentium 4-M
154
                 * or Intel Mobile Pentium 4 with 533 MHz FSB */
155
                if (c->x86_model != 2)
156
                        return 0;
157
 
158
                if ((c->x86_mask != 4) && /* B-stepping [M-P4-M] */
159
                        (c->x86_mask != 7) && /* C-stepping [M-P4-M] */
160
                        (c->x86_mask != 9))   /* D-stepping [M-P4-M or M-P4/533] */
161
                        return 0;
162
 
163
                ebx = cpuid_ebx(0x00000001);
164
                ebx &= 0x000000FF;
165
                if ((ebx != 0x0e) && (ebx != 0x0f))
166
                        return 0;
167
 
168
                return SPEEDSTEP_PROCESSOR_P4M;
169
        }
170
 
171
        switch (c->x86_model) {
172
        case 0x0B: /* Intel PIII [Tualatin] */
173
                /* cpuid_ebx(1) is 0x04 for desktop PIII,
174
                                   0x06 for mobile PIII-M */
175
                ebx = cpuid_ebx(0x00000001);
176
 
177
                ebx &= 0x000000FF;
178
                if (ebx != 0x06)
179
                        return 0;
180
 
181
                /* So far all PIII-M processors support SpeedStep. See
182
                 * Intel's 24540640.pdf of June 2003
183
                 */
184
 
185
                return SPEEDSTEP_PROCESSOR_PIII_T;
186
 
187
        case 0x08: /* Intel PIII [Coppermine] */
188
 
189
                /* all mobile PIII Coppermines have FSB 100 MHz
190
                 * ==> sort out a few desktop PIIIs. */
191
                rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
192
                dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n", msr_lo, msr_hi);
193
                msr_lo &= 0x00c0000;
194
                if (msr_lo != 0x0080000)
195
                        return 0;
196
 
197
                /*
198
                 * If the processor is a mobile version,
199
                 * platform ID has bit 50 set
200
                 * it has SpeedStep technology if either
201
                 * bit 56 or 57 is set
202
                 */
203
                rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
204
                dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi);
205
                if ((msr_hi & (1<<18)) && (msr_hi & (3<<24))) {
206
                        if (c->x86_mask == 0x01)
207
                                return SPEEDSTEP_PROCESSOR_PIII_C_EARLY;
208
                        else
209
                                return SPEEDSTEP_PROCESSOR_PIII_C;
210
                }
211
 
212
        default:
213
                return 0;
214
        }
215
}
216
EXPORT_SYMBOL_GPL(speedstep_detect_processor);
217
 
218
 
219
/*********************************************************************
220
 *                     DETECT SPEEDSTEP SPEEDS                       *
221
 *********************************************************************/
222
 
223
unsigned int speedstep_get_freqs(unsigned int processor,
224
                                  unsigned int *low_speed,
225
                                  unsigned int *high_speed,
226
                                  void (*set_state) (unsigned int state,
227
                                                     unsigned int notify)
228
                                 )
229
{
230
        unsigned int prev_speed;
231
        unsigned int ret = 0;
232
        unsigned long flags;
233
 
234
        if ((!processor) || (!low_speed) || (!high_speed) || (!set_state))
235
                return -EINVAL;
236
 
237
        /* get current speed */
238
        prev_speed = speedstep_get_processor_frequency(processor);
239
        if (!prev_speed)
240
                return -EIO;
241
 
242
        local_irq_save(flags);
243
 
244
        /* switch to low state */
245
        set_state(SPEEDSTEP_LOW, 0);
246
        *low_speed = speedstep_get_processor_frequency(processor);
247
        if (!*low_speed) {
248
                ret = -EIO;
249
                goto out;
250
        }
251
 
252
        /* switch to high state */
253
        set_state(SPEEDSTEP_HIGH, 0);
254
        *high_speed = speedstep_get_processor_frequency(processor);
255
        if (!*high_speed) {
256
                ret = -EIO;
257
                goto out;
258
        }
259
 
260
        if (*low_speed == *high_speed) {
261
                ret = -ENODEV;
262
                goto out;
263
        }
264
 
265
        /* switch to previous state, if necessary */
266
        if (*high_speed != prev_speed)
267
                set_state(SPEEDSTEP_LOW, 0);
268
 
269
 out:
270
        local_irq_restore(flags);
271
        return (ret);
272
}
273
EXPORT_SYMBOL_GPL(speedstep_get_freqs);
274
 
275
MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>");
276
MODULE_DESCRIPTION ("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
277
MODULE_LICENSE ("GPL");