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Rev | Author | Line No. | Line |
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582 | mauro | 1 | /* |
2 | * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> |
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3 | * |
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4 | * Licensed under the terms of the GNU GPL License version 2. |
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5 | * |
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6 | * Library for common functions for Intel SpeedStep v.1 and v.2 support |
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7 | * |
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8 | * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* |
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9 | */ |
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10 | |||
11 | #include <linuxcomp.h> |
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12 | |||
13 | #include <linux/kernel.h> |
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14 | #include <linux/module.h> |
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15 | #include <linux/init.h> |
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16 | #include <linux/cpufreq.h> |
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17 | #include <linux/pci.h> |
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18 | #include <linux/slab.h> |
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19 | |||
20 | #include <asm/msr.h> |
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21 | #include "speedstep-lib.h" |
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22 | |||
23 | |||
24 | /* DEBUG |
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25 | * Define it if you want verbose debug output, e.g. for bug reporting |
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26 | */ |
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775 | mauro | 27 | //#define SPEEDSTEP_DEBUG |
582 | mauro | 28 | |
29 | #ifdef SPEEDSTEP_DEBUG |
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30 | #define dprintk(msg...) printk(msg) |
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31 | #else |
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32 | #define dprintk(msg...) do { } while(0) |
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33 | #endif |
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34 | |||
35 | /********************************************************************* |
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36 | * GET PROCESSOR CORE SPEED IN KHZ * |
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37 | *********************************************************************/ |
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38 | |||
39 | static unsigned int pentium3_get_frequency (unsigned int processor) |
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40 | { |
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41 | /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */ |
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42 | struct { |
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43 | unsigned int ratio; /* Frequency Multiplier (x10) */ |
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44 | u8 bitmap; /* power on configuration bits |
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45 | [27, 25:22] (in MSR 0x2a) */ |
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46 | } msr_decode_mult [] = { |
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47 | { 30, 0x01 }, |
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48 | { 35, 0x05 }, |
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49 | { 40, 0x02 }, |
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50 | { 45, 0x06 }, |
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51 | { 50, 0x00 }, |
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52 | { 55, 0x04 }, |
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53 | { 60, 0x0b }, |
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54 | { 65, 0x0f }, |
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55 | { 70, 0x09 }, |
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56 | { 75, 0x0d }, |
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57 | { 80, 0x0a }, |
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58 | { 85, 0x26 }, |
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59 | { 90, 0x20 }, |
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60 | { 100, 0x2b }, |
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61 | { 0, 0xff } /* error or unknown value */ |
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62 | }; |
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63 | |||
64 | /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */ |
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65 | struct { |
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66 | unsigned int value; /* Front Side Bus speed in MHz */ |
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67 | u8 bitmap; /* power on configuration bits [18: 19] |
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68 | (in MSR 0x2a) */ |
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69 | } msr_decode_fsb [] = { |
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70 | { 66, 0x0 }, |
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71 | { 100, 0x2 }, |
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72 | { 133, 0x1 }, |
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73 | { 0, 0xff} |
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74 | }; |
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75 | |||
76 | u32 msr_lo, msr_tmp; |
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77 | int i = 0, j = 0; |
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78 | |||
79 | /* read MSR 0x2a - we only need the low 32 bits */ |
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80 | rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); |
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81 | dprintk(KERN_DEBUG "speedstep-lib: P3 - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp); |
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82 | msr_tmp = msr_lo; |
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83 | |||
84 | /* decode the FSB */ |
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85 | msr_tmp &= 0x00c0000; |
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86 | msr_tmp >>= 18; |
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87 | while (msr_tmp != msr_decode_fsb[i].bitmap) { |
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88 | if (msr_decode_fsb[i].bitmap == 0xff) |
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89 | return 0; |
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90 | i++; |
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91 | } |
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92 | |||
93 | /* decode the multiplier */ |
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94 | if (processor == SPEEDSTEP_PROCESSOR_PIII_C_EARLY) |
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95 | msr_lo &= 0x03c00000; |
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96 | else |
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97 | msr_lo &= 0x0bc00000; |
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98 | msr_lo >>= 22; |
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99 | while (msr_lo != msr_decode_mult[j].bitmap) { |
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100 | if (msr_decode_mult[j].bitmap == 0xff) |
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101 | return 0; |
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102 | j++; |
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103 | } |
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104 | |||
105 | return (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100); |
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106 | } |
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107 | |||
108 | |||
109 | static unsigned int pentium4_get_frequency(void) |
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110 | { |
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111 | u32 msr_lo, msr_hi; |
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112 | |||
113 | rdmsr(0x2c, msr_lo, msr_hi); |
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114 | |||
115 | dprintk(KERN_DEBUG "speedstep-lib: P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi); |
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116 | |||
117 | msr_lo >>= 24; |
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118 | return (msr_lo * 100000); |
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119 | } |
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120 | |||
121 | |||
122 | unsigned int speedstep_get_processor_frequency(unsigned int processor) |
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123 | { |
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124 | switch (processor) { |
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125 | case SPEEDSTEP_PROCESSOR_P4M: |
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126 | return pentium4_get_frequency(); |
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127 | case SPEEDSTEP_PROCESSOR_PIII_T: |
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128 | case SPEEDSTEP_PROCESSOR_PIII_C: |
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129 | case SPEEDSTEP_PROCESSOR_PIII_C_EARLY: |
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130 | return pentium3_get_frequency(processor); |
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131 | default: |
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132 | return 0; |
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133 | }; |
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134 | return 0; |
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135 | } |
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136 | EXPORT_SYMBOL_GPL(speedstep_get_processor_frequency); |
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137 | |||
138 | |||
139 | /********************************************************************* |
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140 | * DETECT SPEEDSTEP-CAPABLE PROCESSOR * |
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141 | *********************************************************************/ |
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142 | |||
143 | unsigned int speedstep_detect_processor (void) |
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144 | { |
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145 | struct cpuinfo_x86 *c = cpu_data; |
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146 | u32 ebx, msr_lo, msr_hi; |
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147 | |||
148 | if ((c->x86_vendor != X86_VENDOR_INTEL) || |
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149 | ((c->x86 != 6) && (c->x86 != 0xF))) |
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150 | return 0; |
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151 | |||
152 | if (c->x86 == 0xF) { |
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153 | /* Intel Mobile Pentium 4-M |
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154 | * or Intel Mobile Pentium 4 with 533 MHz FSB */ |
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155 | if (c->x86_model != 2) |
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156 | return 0; |
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157 | |||
158 | if ((c->x86_mask != 4) && /* B-stepping [M-P4-M] */ |
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159 | (c->x86_mask != 7) && /* C-stepping [M-P4-M] */ |
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160 | (c->x86_mask != 9)) /* D-stepping [M-P4-M or M-P4/533] */ |
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161 | return 0; |
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162 | |||
163 | ebx = cpuid_ebx(0x00000001); |
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164 | ebx &= 0x000000FF; |
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165 | if ((ebx != 0x0e) && (ebx != 0x0f)) |
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166 | return 0; |
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167 | |||
168 | return SPEEDSTEP_PROCESSOR_P4M; |
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169 | } |
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170 | |||
171 | switch (c->x86_model) { |
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172 | case 0x0B: /* Intel PIII [Tualatin] */ |
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173 | /* cpuid_ebx(1) is 0x04 for desktop PIII, |
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174 | 0x06 for mobile PIII-M */ |
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175 | ebx = cpuid_ebx(0x00000001); |
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176 | |||
177 | ebx &= 0x000000FF; |
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178 | if (ebx != 0x06) |
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179 | return 0; |
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180 | |||
181 | /* So far all PIII-M processors support SpeedStep. See |
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182 | * Intel's 24540640.pdf of June 2003 |
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183 | */ |
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184 | |||
185 | return SPEEDSTEP_PROCESSOR_PIII_T; |
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186 | |||
187 | case 0x08: /* Intel PIII [Coppermine] */ |
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188 | |||
189 | /* all mobile PIII Coppermines have FSB 100 MHz |
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190 | * ==> sort out a few desktop PIIIs. */ |
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191 | rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi); |
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192 | dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n", msr_lo, msr_hi); |
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193 | msr_lo &= 0x00c0000; |
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194 | if (msr_lo != 0x0080000) |
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195 | return 0; |
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196 | |||
197 | /* |
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198 | * If the processor is a mobile version, |
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199 | * platform ID has bit 50 set |
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200 | * it has SpeedStep technology if either |
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201 | * bit 56 or 57 is set |
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202 | */ |
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203 | rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi); |
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204 | dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi); |
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205 | if ((msr_hi & (1<<18)) && (msr_hi & (3<<24))) { |
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206 | if (c->x86_mask == 0x01) |
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207 | return SPEEDSTEP_PROCESSOR_PIII_C_EARLY; |
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208 | else |
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209 | return SPEEDSTEP_PROCESSOR_PIII_C; |
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210 | } |
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211 | |||
212 | default: |
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213 | return 0; |
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214 | } |
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215 | } |
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216 | EXPORT_SYMBOL_GPL(speedstep_detect_processor); |
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217 | |||
218 | |||
219 | /********************************************************************* |
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220 | * DETECT SPEEDSTEP SPEEDS * |
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221 | *********************************************************************/ |
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222 | |||
223 | unsigned int speedstep_get_freqs(unsigned int processor, |
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224 | unsigned int *low_speed, |
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225 | unsigned int *high_speed, |
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226 | void (*set_state) (unsigned int state, |
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227 | unsigned int notify) |
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228 | ) |
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229 | { |
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230 | unsigned int prev_speed; |
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231 | unsigned int ret = 0; |
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232 | unsigned long flags; |
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233 | |||
234 | if ((!processor) || (!low_speed) || (!high_speed) || (!set_state)) |
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235 | return -EINVAL; |
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236 | |||
237 | /* get current speed */ |
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238 | prev_speed = speedstep_get_processor_frequency(processor); |
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239 | if (!prev_speed) |
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240 | return -EIO; |
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241 | |||
242 | local_irq_save(flags); |
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243 | |||
244 | /* switch to low state */ |
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245 | set_state(SPEEDSTEP_LOW, 0); |
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246 | *low_speed = speedstep_get_processor_frequency(processor); |
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247 | if (!*low_speed) { |
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248 | ret = -EIO; |
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249 | goto out; |
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250 | } |
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251 | |||
252 | /* switch to high state */ |
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253 | set_state(SPEEDSTEP_HIGH, 0); |
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254 | *high_speed = speedstep_get_processor_frequency(processor); |
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255 | if (!*high_speed) { |
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256 | ret = -EIO; |
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257 | goto out; |
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258 | } |
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259 | |||
260 | if (*low_speed == *high_speed) { |
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261 | ret = -ENODEV; |
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262 | goto out; |
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263 | } |
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264 | |||
265 | /* switch to previous state, if necessary */ |
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266 | if (*high_speed != prev_speed) |
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267 | set_state(SPEEDSTEP_LOW, 0); |
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268 | |||
269 | out: |
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270 | local_irq_restore(flags); |
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271 | return (ret); |
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272 | } |
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273 | EXPORT_SYMBOL_GPL(speedstep_get_freqs); |
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274 | |||
275 | MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>"); |
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276 | MODULE_DESCRIPTION ("Library for Intel SpeedStep 1 or 2 cpufreq drivers."); |
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277 | MODULE_LICENSE ("GPL"); |