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Rev | Author | Line No. | Line |
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420 | giacomo | 1 | /* |
2 | ali15x3.c - Part of lm_sensors, Linux kernel modules for hardware |
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3 | monitoring |
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4 | Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and |
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5 | Philip Edelbrock <phil@netroedge.com> and |
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6 | Mark D. Studebaker <mdsxyz123@yahoo.com> |
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7 | |||
8 | This program is free software; you can redistribute it and/or modify |
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9 | it under the terms of the GNU General Public License as published by |
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10 | the Free Software Foundation; either version 2 of the License, or |
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11 | (at your option) any later version. |
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12 | |||
13 | This program is distributed in the hope that it will be useful, |
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14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | GNU General Public License for more details. |
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17 | |||
18 | You should have received a copy of the GNU General Public License |
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19 | along with this program; if not, write to the Free Software |
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20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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21 | */ |
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22 | |||
23 | /* |
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24 | This is the driver for the SMB Host controller on |
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25 | Acer Labs Inc. (ALI) M1541 and M1543C South Bridges. |
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26 | |||
27 | The M1543C is a South bridge for desktop systems. |
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28 | The M1533 is a South bridge for portable systems. |
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29 | They are part of the following ALI chipsets: |
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30 | "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge |
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31 | with AGP and 100MHz CPU Front Side bus |
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32 | "Aladdin V": Includes the M1541 Socket 7 North bridge |
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33 | with AGP and 100MHz CPU Front Side bus |
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34 | "Aladdin IV": Includes the M1541 Socket 7 North bridge |
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35 | with host bus up to 83.3 MHz. |
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36 | For an overview of these chips see http://www.acerlabs.com |
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37 | |||
38 | The M1533/M1543C devices appear as FOUR separate devices |
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39 | on the PCI bus. An output of lspci will show something similar |
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40 | to the following: |
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41 | |||
42 | 00:02.0 USB Controller: Acer Laboratories Inc. M5237 |
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43 | 00:03.0 Bridge: Acer Laboratories Inc. M7101 |
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44 | 00:07.0 ISA bridge: Acer Laboratories Inc. M1533 |
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45 | 00:0f.0 IDE interface: Acer Laboratories Inc. M5229 |
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46 | |||
47 | The SMB controller is part of the 7101 device, which is an |
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48 | ACPI-compliant Power Management Unit (PMU). |
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49 | |||
50 | The whole 7101 device has to be enabled for the SMB to work. |
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51 | You can't just enable the SMB alone. |
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52 | The SMB and the ACPI have separate I/O spaces. |
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53 | We make sure that the SMB is enabled. We leave the ACPI alone. |
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54 | |||
55 | This driver controls the SMB Host only. |
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56 | The SMB Slave controller on the M15X3 is not enabled. |
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57 | |||
58 | This driver does not use interrupts. |
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59 | */ |
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60 | |||
61 | /* Note: we assume there can only be one ALI15X3, with one SMBus interface */ |
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62 | |||
63 | /* #define DEBUG 1 */ |
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64 | |||
65 | #include <linux/module.h> |
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66 | #include <linux/pci.h> |
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67 | #include <linux/kernel.h> |
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68 | #include <linux/stddef.h> |
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69 | #include <linux/sched.h> |
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70 | #include <linux/ioport.h> |
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71 | #include <linux/i2c.h> |
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72 | #include <linux/init.h> |
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73 | #include <asm/io.h> |
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74 | |||
75 | /* ALI15X3 SMBus address offsets */ |
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76 | #define SMBHSTSTS (0 + ali15x3_smba) |
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77 | #define SMBHSTCNT (1 + ali15x3_smba) |
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78 | #define SMBHSTSTART (2 + ali15x3_smba) |
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79 | #define SMBHSTCMD (7 + ali15x3_smba) |
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80 | #define SMBHSTADD (3 + ali15x3_smba) |
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81 | #define SMBHSTDAT0 (4 + ali15x3_smba) |
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82 | #define SMBHSTDAT1 (5 + ali15x3_smba) |
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83 | #define SMBBLKDAT (6 + ali15x3_smba) |
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84 | |||
85 | /* PCI Address Constants */ |
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86 | #define SMBCOM 0x004 |
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87 | #define SMBBA 0x014 |
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88 | #define SMBATPC 0x05B /* used to unlock xxxBA registers */ |
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89 | #define SMBHSTCFG 0x0E0 |
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90 | #define SMBSLVC 0x0E1 |
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91 | #define SMBCLK 0x0E2 |
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92 | #define SMBREV 0x008 |
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93 | |||
94 | /* Other settings */ |
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95 | #define MAX_TIMEOUT 200 /* times 1/100 sec */ |
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96 | #define ALI15X3_SMB_IOSIZE 32 |
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97 | |||
98 | /* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB. |
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99 | We don't use these here. If the bases aren't set to some value we |
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100 | tell user to upgrade BIOS and we fail. |
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101 | */ |
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102 | #define ALI15X3_SMB_DEFAULTBASE 0xE800 |
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103 | |||
104 | /* ALI15X3 address lock bits */ |
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105 | #define ALI15X3_LOCK 0x06 |
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106 | |||
107 | /* ALI15X3 command constants */ |
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108 | #define ALI15X3_ABORT 0x02 |
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109 | #define ALI15X3_T_OUT 0x04 |
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110 | #define ALI15X3_QUICK 0x00 |
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111 | #define ALI15X3_BYTE 0x10 |
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112 | #define ALI15X3_BYTE_DATA 0x20 |
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113 | #define ALI15X3_WORD_DATA 0x30 |
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114 | #define ALI15X3_BLOCK_DATA 0x40 |
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115 | #define ALI15X3_BLOCK_CLR 0x80 |
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116 | |||
117 | /* ALI15X3 status register bits */ |
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118 | #define ALI15X3_STS_IDLE 0x04 |
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119 | #define ALI15X3_STS_BUSY 0x08 |
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120 | #define ALI15X3_STS_DONE 0x10 |
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121 | #define ALI15X3_STS_DEV 0x20 /* device error */ |
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122 | #define ALI15X3_STS_COLL 0x40 /* collision or no response */ |
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123 | #define ALI15X3_STS_TERM 0x80 /* terminated by abort */ |
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124 | #define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */ |
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125 | |||
126 | |||
127 | /* If force_addr is set to anything different from 0, we forcibly enable |
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128 | the device at the given address. */ |
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129 | static int force_addr = 0; |
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130 | MODULE_PARM(force_addr, "i"); |
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131 | MODULE_PARM_DESC(force_addr, |
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132 | "Initialize the base address of the i2c controller"); |
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133 | |||
134 | static unsigned short ali15x3_smba = 0; |
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135 | |||
136 | static int ali15x3_setup(struct pci_dev *ALI15X3_dev) |
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137 | { |
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138 | u16 a; |
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139 | unsigned char temp; |
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140 | |||
141 | /* Check the following things: |
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142 | - SMB I/O address is initialized |
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143 | - Device is enabled |
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144 | - We can use the addresses |
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145 | */ |
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146 | |||
147 | /* Unlock the register. |
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148 | The data sheet says that the address registers are read-only |
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149 | if the lock bits are 1, but in fact the address registers |
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150 | are zero unless you clear the lock bits. |
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151 | */ |
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152 | pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp); |
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153 | if (temp & ALI15X3_LOCK) { |
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154 | temp &= ~ALI15X3_LOCK; |
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155 | pci_write_config_byte(ALI15X3_dev, SMBATPC, temp); |
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156 | } |
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157 | |||
158 | /* Determine the address of the SMBus area */ |
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159 | pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba); |
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160 | ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1)); |
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161 | if (ali15x3_smba == 0 && force_addr == 0) { |
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162 | dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized " |
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163 | "- upgrade BIOS or use force_addr=0xaddr\n"); |
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164 | return -ENODEV; |
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165 | } |
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166 | |||
167 | if(force_addr) |
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168 | ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1); |
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169 | |||
170 | if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE, "ali15x3-smb")) { |
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171 | dev_err(&ALI15X3_dev->dev, |
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172 | "ALI15X3_smb region 0x%x already in use!\n", |
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173 | ali15x3_smba); |
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174 | return -ENODEV; |
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175 | } |
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176 | |||
177 | if(force_addr) { |
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178 | dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n", |
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179 | ali15x3_smba); |
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180 | if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev, |
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181 | SMBBA, |
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182 | ali15x3_smba)) |
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183 | goto error; |
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184 | if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev, |
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185 | SMBBA, &a)) |
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186 | goto error; |
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187 | if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) { |
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188 | /* make sure it works */ |
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189 | dev_err(&ALI15X3_dev->dev, |
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190 | "force address failed - not supported?\n"); |
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191 | goto error; |
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192 | } |
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193 | } |
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194 | /* check if whole device is enabled */ |
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195 | pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp); |
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196 | if ((temp & 1) == 0) { |
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197 | dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n"); |
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198 | pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01); |
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199 | } |
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200 | |||
201 | /* Is SMB Host controller enabled? */ |
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202 | pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp); |
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203 | if ((temp & 1) == 0) { |
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204 | dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n"); |
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205 | pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01); |
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206 | } |
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207 | |||
208 | /* set SMB clock to 74KHz as recommended in data sheet */ |
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209 | pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20); |
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210 | |||
211 | /* |
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212 | The interrupt routing for SMB is set up in register 0x77 in the |
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213 | 1533 ISA Bridge device, NOT in the 7101 device. |
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214 | Don't bother with finding the 1533 device and reading the register. |
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215 | if ((....... & 0x0F) == 1) |
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216 | dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n"); |
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217 | */ |
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218 | pci_read_config_byte(ALI15X3_dev, SMBREV, &temp); |
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219 | dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp); |
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220 | dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba); |
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221 | |||
222 | return 0; |
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223 | error: |
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224 | release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE); |
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225 | return -ENODEV; |
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226 | } |
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227 | |||
228 | /* Another internally used function */ |
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229 | static int ali15x3_transaction(struct i2c_adapter *adap) |
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230 | { |
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231 | int temp; |
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232 | int result = 0; |
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233 | int timeout = 0; |
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234 | |||
235 | dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, " |
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236 | "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS), |
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237 | inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD), |
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238 | inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1)); |
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239 | |||
240 | /* get status */ |
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241 | temp = inb_p(SMBHSTSTS); |
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242 | |||
243 | /* Make sure the SMBus host is ready to start transmitting */ |
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244 | /* Check the busy bit first */ |
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245 | if (temp & ALI15X3_STS_BUSY) { |
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246 | /* |
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247 | If the host controller is still busy, it may have timed out in the |
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248 | previous transaction, resulting in a "SMBus Timeout" Dev. |
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249 | I've tried the following to reset a stuck busy bit. |
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250 | 1. Reset the controller with an ABORT command. |
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251 | (this doesn't seem to clear the controller if an external |
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252 | device is hung) |
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253 | 2. Reset the controller and the other SMBus devices with a |
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254 | T_OUT command. (this clears the host busy bit if an |
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255 | external device is hung, but it comes back upon a new access |
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256 | to a device) |
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257 | 3. Disable and reenable the controller in SMBHSTCFG |
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258 | Worst case, nothing seems to work except power reset. |
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259 | */ |
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260 | /* Abort - reset the host controller */ |
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261 | /* |
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262 | Try resetting entire SMB bus, including other devices - |
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263 | This may not work either - it clears the BUSY bit but |
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264 | then the BUSY bit may come back on when you try and use the chip again. |
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265 | If that's the case you are stuck. |
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266 | */ |
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267 | dev_info(&adap->dev, "Resetting entire SMB Bus to " |
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268 | "clear busy condition (%02x)\n", temp); |
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269 | outb_p(ALI15X3_T_OUT, SMBHSTCNT); |
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270 | temp = inb_p(SMBHSTSTS); |
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271 | } |
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272 | |||
273 | /* now check the error bits and the busy bit */ |
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274 | if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) { |
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275 | /* do a clear-on-write */ |
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276 | outb_p(0xFF, SMBHSTSTS); |
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277 | if ((temp = inb_p(SMBHSTSTS)) & |
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278 | (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) { |
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279 | /* this is probably going to be correctable only by a power reset |
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280 | as one of the bits now appears to be stuck */ |
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281 | /* This may be a bus or device with electrical problems. */ |
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282 | dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - " |
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283 | "controller or device on bus is probably hung\n", |
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284 | temp); |
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285 | return -1; |
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286 | } |
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287 | } else { |
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288 | /* check and clear done bit */ |
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289 | if (temp & ALI15X3_STS_DONE) { |
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290 | outb_p(temp, SMBHSTSTS); |
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291 | } |
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292 | } |
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293 | |||
294 | /* start the transaction by writing anything to the start register */ |
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295 | outb_p(0xFF, SMBHSTSTART); |
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296 | |||
297 | /* We will always wait for a fraction of a second! */ |
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298 | timeout = 0; |
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299 | do { |
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300 | i2c_delay(1); |
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301 | temp = inb_p(SMBHSTSTS); |
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302 | } while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE))) |
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303 | && (timeout++ < MAX_TIMEOUT)); |
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304 | |||
305 | /* If the SMBus is still busy, we give up */ |
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306 | if (timeout >= MAX_TIMEOUT) { |
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307 | result = -1; |
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308 | dev_err(&adap->dev, "SMBus Timeout!\n"); |
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309 | } |
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310 | |||
311 | if (temp & ALI15X3_STS_TERM) { |
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312 | result = -1; |
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313 | dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); |
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314 | } |
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315 | |||
316 | /* |
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317 | Unfortunately the ALI SMB controller maps "no response" and "bus |
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318 | collision" into a single bit. No reponse is the usual case so don't |
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319 | do a printk. |
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320 | This means that bus collisions go unreported. |
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321 | */ |
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322 | if (temp & ALI15X3_STS_COLL) { |
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323 | result = -1; |
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324 | dev_dbg(&adap->dev, |
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325 | "Error: no response or bus collision ADD=%02x\n", |
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326 | inb_p(SMBHSTADD)); |
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327 | } |
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328 | |||
329 | /* haven't ever seen this */ |
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330 | if (temp & ALI15X3_STS_DEV) { |
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331 | result = -1; |
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332 | dev_err(&adap->dev, "Error: device error\n"); |
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333 | } |
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334 | dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, " |
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335 | "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS), |
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336 | inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD), |
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337 | inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1)); |
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338 | return result; |
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339 | } |
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340 | |||
341 | /* Return -1 on error. */ |
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342 | static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr, |
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343 | unsigned short flags, char read_write, u8 command, |
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344 | int size, union i2c_smbus_data * data) |
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345 | { |
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346 | int i, len; |
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347 | int temp; |
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348 | int timeout; |
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349 | |||
350 | /* clear all the bits (clear-on-write) */ |
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351 | outb_p(0xFF, SMBHSTSTS); |
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352 | /* make sure SMBus is idle */ |
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353 | temp = inb_p(SMBHSTSTS); |
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354 | for (timeout = 0; |
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355 | (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); |
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356 | timeout++) { |
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357 | i2c_delay(1); |
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358 | temp = inb_p(SMBHSTSTS); |
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359 | } |
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360 | if (timeout >= MAX_TIMEOUT) { |
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361 | dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp); |
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362 | } |
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363 | |||
364 | switch (size) { |
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365 | case I2C_SMBUS_PROC_CALL: |
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366 | dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n"); |
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367 | return -1; |
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368 | case I2C_SMBUS_QUICK: |
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369 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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370 | SMBHSTADD); |
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371 | size = ALI15X3_QUICK; |
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372 | break; |
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373 | case I2C_SMBUS_BYTE: |
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374 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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375 | SMBHSTADD); |
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376 | if (read_write == I2C_SMBUS_WRITE) |
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377 | outb_p(command, SMBHSTCMD); |
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378 | size = ALI15X3_BYTE; |
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379 | break; |
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380 | case I2C_SMBUS_BYTE_DATA: |
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381 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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382 | SMBHSTADD); |
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383 | outb_p(command, SMBHSTCMD); |
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384 | if (read_write == I2C_SMBUS_WRITE) |
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385 | outb_p(data->byte, SMBHSTDAT0); |
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386 | size = ALI15X3_BYTE_DATA; |
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387 | break; |
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388 | case I2C_SMBUS_WORD_DATA: |
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389 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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390 | SMBHSTADD); |
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391 | outb_p(command, SMBHSTCMD); |
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392 | if (read_write == I2C_SMBUS_WRITE) { |
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393 | outb_p(data->word & 0xff, SMBHSTDAT0); |
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394 | outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); |
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395 | } |
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396 | size = ALI15X3_WORD_DATA; |
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397 | break; |
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398 | case I2C_SMBUS_BLOCK_DATA: |
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399 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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400 | SMBHSTADD); |
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401 | outb_p(command, SMBHSTCMD); |
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402 | if (read_write == I2C_SMBUS_WRITE) { |
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403 | len = data->block[0]; |
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404 | if (len < 0) { |
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405 | len = 0; |
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406 | data->block[0] = len; |
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407 | } |
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408 | if (len > 32) { |
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409 | len = 32; |
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410 | data->block[0] = len; |
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411 | } |
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412 | outb_p(len, SMBHSTDAT0); |
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413 | /* Reset SMBBLKDAT */ |
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414 | outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT); |
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415 | for (i = 1; i <= len; i++) |
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416 | outb_p(data->block[i], SMBBLKDAT); |
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417 | } |
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418 | size = ALI15X3_BLOCK_DATA; |
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419 | break; |
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420 | } |
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421 | |||
422 | outb_p(size, SMBHSTCNT); /* output command */ |
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423 | |||
424 | if (ali15x3_transaction(adap)) /* Error in transaction */ |
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425 | return -1; |
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426 | |||
427 | if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK)) |
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428 | return 0; |
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429 | |||
430 | |||
431 | switch (size) { |
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432 | case ALI15X3_BYTE: /* Result put in SMBHSTDAT0 */ |
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433 | data->byte = inb_p(SMBHSTDAT0); |
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434 | break; |
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435 | case ALI15X3_BYTE_DATA: |
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436 | data->byte = inb_p(SMBHSTDAT0); |
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437 | break; |
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438 | case ALI15X3_WORD_DATA: |
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439 | data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); |
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440 | break; |
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441 | case ALI15X3_BLOCK_DATA: |
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442 | len = inb_p(SMBHSTDAT0); |
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443 | if (len > 32) |
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444 | len = 32; |
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445 | data->block[0] = len; |
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446 | /* Reset SMBBLKDAT */ |
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447 | outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT); |
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448 | for (i = 1; i <= data->block[0]; i++) { |
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449 | data->block[i] = inb_p(SMBBLKDAT); |
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450 | dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n", |
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451 | len, i, data->block[i]); |
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452 | } |
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453 | break; |
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454 | } |
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455 | return 0; |
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456 | } |
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457 | |||
458 | static u32 ali15x3_func(struct i2c_adapter *adapter) |
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459 | { |
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460 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
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461 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
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462 | I2C_FUNC_SMBUS_BLOCK_DATA; |
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463 | } |
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464 | |||
465 | static struct i2c_algorithm smbus_algorithm = { |
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466 | .name = "Non-I2C SMBus adapter", |
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467 | .id = I2C_ALGO_SMBUS, |
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468 | .smbus_xfer = ali15x3_access, |
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469 | .functionality = ali15x3_func, |
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470 | }; |
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471 | |||
472 | static struct i2c_adapter ali15x3_adapter = { |
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473 | .owner = THIS_MODULE, |
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474 | .class = I2C_ADAP_CLASS_SMBUS, |
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475 | .algo = &smbus_algorithm, |
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476 | .name = "unset", |
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477 | }; |
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478 | |||
479 | static struct pci_device_id ali15x3_ids[] = { |
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480 | { |
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481 | .vendor = PCI_VENDOR_ID_AL, |
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482 | .device = PCI_DEVICE_ID_AL_M7101, |
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483 | .subvendor = PCI_ANY_ID, |
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484 | .subdevice = PCI_ANY_ID, |
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485 | }, |
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486 | { 0, } |
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487 | }; |
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488 | |||
489 | static int __devinit ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id) |
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490 | { |
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491 | if (ali15x3_setup(dev)) { |
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492 | dev_err(&dev->dev, |
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493 | "ALI15X3 not detected, module not inserted.\n"); |
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494 | return -ENODEV; |
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495 | } |
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496 | |||
497 | /* set up the driverfs linkage to our parent device */ |
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498 | ali15x3_adapter.dev.parent = &dev->dev; |
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499 | |||
500 | snprintf(ali15x3_adapter.name, I2C_NAME_SIZE, |
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501 | "SMBus ALI15X3 adapter at %04x", ali15x3_smba); |
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502 | return i2c_add_adapter(&ali15x3_adapter); |
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503 | } |
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504 | |||
505 | static void __devexit ali15x3_remove(struct pci_dev *dev) |
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506 | { |
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507 | i2c_del_adapter(&ali15x3_adapter); |
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508 | release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE); |
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509 | } |
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510 | |||
511 | static struct pci_driver ali15x3_driver = { |
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512 | .name = "ali15x3 smbus", |
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513 | .id_table = ali15x3_ids, |
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514 | .probe = ali15x3_probe, |
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515 | .remove = __devexit_p(ali15x3_remove), |
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516 | }; |
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517 | |||
518 | static int __init i2c_ali15x3_init(void) |
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519 | { |
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520 | return pci_module_init(&ali15x3_driver); |
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521 | } |
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522 | |||
523 | static void __exit i2c_ali15x3_exit(void) |
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524 | { |
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525 | pci_unregister_driver(&ali15x3_driver); |
||
526 | } |
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527 | |||
528 | MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, " |
||
529 | "Philip Edelbrock <phil@netroedge.com>, " |
||
530 | "and Mark D. Studebaker <mdsxyz123@yahoo.com>"); |
||
531 | MODULE_DESCRIPTION("ALI15X3 SMBus driver"); |
||
532 | MODULE_LICENSE("GPL"); |
||
533 | |||
534 | module_init(i2c_ali15x3_init); |
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535 | module_exit(i2c_ali15x3_exit); |