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Rev | Author | Line No. | Line |
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420 | giacomo | 1 | /* |
2 | amd756.c - Part of lm_sensors, Linux kernel modules for hardware |
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3 | monitoring |
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4 | |||
5 | Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org> |
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6 | |||
7 | Shamelessly ripped from i2c-piix4.c: |
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8 | |||
9 | Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and |
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10 | Philip Edelbrock <phil@netroedge.com> |
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11 | |||
12 | This program is free software; you can redistribute it and/or modify |
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13 | it under the terms of the GNU General Public License as published by |
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14 | the Free Software Foundation; either version 2 of the License, or |
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15 | (at your option) any later version. |
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16 | |||
17 | This program is distributed in the hope that it will be useful, |
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18 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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20 | GNU General Public License for more details. |
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21 | |||
22 | You should have received a copy of the GNU General Public License |
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23 | along with this program; if not, write to the Free Software |
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24 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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25 | */ |
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26 | |||
27 | /* |
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28 | 2002-04-08: Added nForce support. (Csaba Halasz) |
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29 | 2002-10-03: Fixed nForce PnP I/O port. (Michael Steil) |
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30 | 2002-12-28: Rewritten into something that resembles a Linux driver (hch) |
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31 | */ |
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32 | |||
33 | /* |
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34 | Supports AMD756, AMD766, AMD768 and nVidia nForce |
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35 | Note: we assume there can only be one device, with one SMBus interface. |
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36 | */ |
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37 | |||
38 | /* #define DEBUG 1 */ |
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39 | |||
40 | #include <linux/module.h> |
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41 | #include <linux/pci.h> |
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42 | #include <linux/kernel.h> |
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43 | #include <linux/stddef.h> |
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44 | #include <linux/sched.h> |
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45 | #include <linux/ioport.h> |
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46 | #include <linux/i2c.h> |
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47 | #include <linux/init.h> |
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48 | #include <asm/io.h> |
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49 | |||
50 | /* AMD756 SMBus address offsets */ |
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51 | #define SMB_ADDR_OFFSET 0xE0 |
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52 | #define SMB_IOSIZE 16 |
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53 | #define SMB_GLOBAL_STATUS (0x0 + amd756_ioport) |
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54 | #define SMB_GLOBAL_ENABLE (0x2 + amd756_ioport) |
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55 | #define SMB_HOST_ADDRESS (0x4 + amd756_ioport) |
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56 | #define SMB_HOST_DATA (0x6 + amd756_ioport) |
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57 | #define SMB_HOST_COMMAND (0x8 + amd756_ioport) |
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58 | #define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport) |
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59 | #define SMB_HAS_DATA (0xA + amd756_ioport) |
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60 | #define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport) |
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61 | #define SMB_HAS_HOST_ADDRESS (0xE + amd756_ioport) |
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62 | #define SMB_SNOOP_ADDRESS (0xF + amd756_ioport) |
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63 | |||
64 | /* PCI Address Constants */ |
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65 | |||
66 | /* address of I/O space */ |
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67 | #define SMBBA 0x058 /* mh */ |
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68 | #define SMBBANFORCE 0x014 |
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69 | |||
70 | /* general configuration */ |
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71 | #define SMBGCFG 0x041 /* mh */ |
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72 | |||
73 | /* silicon revision code */ |
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74 | #define SMBREV 0x008 |
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75 | |||
76 | /* Other settings */ |
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77 | #define MAX_TIMEOUT 500 |
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78 | |||
79 | /* AMD756 constants */ |
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80 | #define AMD756_QUICK 0x00 |
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81 | #define AMD756_BYTE 0x01 |
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82 | #define AMD756_BYTE_DATA 0x02 |
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83 | #define AMD756_WORD_DATA 0x03 |
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84 | #define AMD756_PROCESS_CALL 0x04 |
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85 | #define AMD756_BLOCK_DATA 0x05 |
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86 | |||
87 | |||
88 | static unsigned short amd756_ioport = 0; |
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89 | |||
90 | /* |
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91 | SMBUS event = I/O 28-29 bit 11 |
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92 | see E0 for the status bits and enabled in E2 |
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93 | |||
94 | */ |
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95 | #define GS_ABRT_STS (1 << 0) |
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96 | #define GS_COL_STS (1 << 1) |
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97 | #define GS_PRERR_STS (1 << 2) |
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98 | #define GS_HST_STS (1 << 3) |
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99 | #define GS_HCYC_STS (1 << 4) |
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100 | #define GS_TO_STS (1 << 5) |
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101 | #define GS_SMB_STS (1 << 11) |
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102 | |||
103 | #define GS_CLEAR_STS (GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \ |
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104 | GS_HCYC_STS | GS_TO_STS ) |
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105 | |||
106 | #define GE_CYC_TYPE_MASK (7) |
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107 | #define GE_HOST_STC (1 << 3) |
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108 | #define GE_ABORT (1 << 5) |
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109 | |||
110 | |||
111 | static int amd756_transaction(struct i2c_adapter *adap) |
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112 | { |
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113 | int temp; |
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114 | int result = 0; |
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115 | int timeout = 0; |
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116 | |||
117 | dev_dbg(&adap->dev, ": Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, " |
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118 | "DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS), |
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119 | inw_p(SMB_GLOBAL_ENABLE), inw_p(SMB_HOST_ADDRESS), |
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120 | inb_p(SMB_HOST_DATA)); |
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121 | |||
122 | /* Make sure the SMBus host is ready to start transmitting */ |
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123 | if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) { |
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124 | dev_dbg(&adap->dev, ": SMBus busy (%04x). Waiting... \n", temp); |
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125 | do { |
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126 | i2c_delay(1); |
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127 | temp = inw_p(SMB_GLOBAL_STATUS); |
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128 | } while ((temp & (GS_HST_STS | GS_SMB_STS)) && |
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129 | (timeout++ < MAX_TIMEOUT)); |
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130 | /* If the SMBus is still busy, we give up */ |
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131 | if (timeout >= MAX_TIMEOUT) { |
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132 | dev_dbg(&adap->dev, ": Busy wait timeout (%04x)\n", temp); |
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133 | goto abort; |
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134 | } |
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135 | timeout = 0; |
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136 | } |
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137 | |||
138 | /* start the transaction by setting the start bit */ |
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139 | outw_p(inw(SMB_GLOBAL_ENABLE) | GE_HOST_STC, SMB_GLOBAL_ENABLE); |
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140 | |||
141 | /* We will always wait for a fraction of a second! */ |
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142 | do { |
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143 | i2c_delay(1); |
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144 | temp = inw_p(SMB_GLOBAL_STATUS); |
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145 | } while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT)); |
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146 | |||
147 | /* If the SMBus is still busy, we give up */ |
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148 | if (timeout >= MAX_TIMEOUT) { |
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149 | dev_dbg(&adap->dev, ": Completion timeout!\n"); |
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150 | goto abort; |
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151 | } |
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152 | |||
153 | if (temp & GS_PRERR_STS) { |
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154 | result = -1; |
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155 | dev_dbg(&adap->dev, ": SMBus Protocol error (no response)!\n"); |
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156 | } |
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157 | |||
158 | if (temp & GS_COL_STS) { |
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159 | result = -1; |
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160 | dev_warn(&adap->dev, " SMBus collision!\n"); |
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161 | } |
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162 | |||
163 | if (temp & GS_TO_STS) { |
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164 | result = -1; |
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165 | dev_dbg(&adap->dev, ": SMBus protocol timeout!\n"); |
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166 | } |
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167 | |||
168 | if (temp & GS_HCYC_STS) |
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169 | dev_dbg(&adap->dev, " SMBus protocol success!\n"); |
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170 | |||
171 | outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS); |
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172 | |||
173 | #ifdef DEBUG |
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174 | if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) { |
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175 | dev_dbg(&adap->dev, |
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176 | ": Failed reset at end of transaction (%04x)\n", temp); |
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177 | } |
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178 | #endif |
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179 | |||
180 | dev_dbg(&adap->dev, |
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181 | ": Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n", |
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182 | inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE), |
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183 | inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA)); |
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184 | |||
185 | return result; |
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186 | |||
187 | abort: |
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188 | dev_warn(&adap->dev, ": Sending abort.\n"); |
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189 | outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE); |
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190 | i2c_delay(100); |
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191 | outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS); |
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192 | return -1; |
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193 | } |
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194 | |||
195 | /* Return -1 on error. */ |
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196 | static s32 amd756_access(struct i2c_adapter * adap, u16 addr, |
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197 | unsigned short flags, char read_write, |
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198 | u8 command, int size, union i2c_smbus_data * data) |
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199 | { |
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200 | int i, len; |
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201 | |||
202 | /** TODO: Should I supporte the 10-bit transfers? */ |
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203 | switch (size) { |
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204 | case I2C_SMBUS_PROC_CALL: |
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205 | dev_dbg(&adap->dev, ": I2C_SMBUS_PROC_CALL not supported!\n"); |
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206 | /* TODO: Well... It is supported, I'm just not sure what to do here... */ |
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207 | return -1; |
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208 | case I2C_SMBUS_QUICK: |
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209 | outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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210 | SMB_HOST_ADDRESS); |
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211 | size = AMD756_QUICK; |
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212 | break; |
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213 | case I2C_SMBUS_BYTE: |
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214 | outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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215 | SMB_HOST_ADDRESS); |
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216 | /* TODO: Why only during write? */ |
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217 | if (read_write == I2C_SMBUS_WRITE) |
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218 | outb_p(command, SMB_HOST_COMMAND); |
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219 | size = AMD756_BYTE; |
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220 | break; |
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221 | case I2C_SMBUS_BYTE_DATA: |
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222 | outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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223 | SMB_HOST_ADDRESS); |
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224 | outb_p(command, SMB_HOST_COMMAND); |
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225 | if (read_write == I2C_SMBUS_WRITE) |
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226 | outw_p(data->byte, SMB_HOST_DATA); |
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227 | size = AMD756_BYTE_DATA; |
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228 | break; |
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229 | case I2C_SMBUS_WORD_DATA: |
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230 | outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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231 | SMB_HOST_ADDRESS); |
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232 | outb_p(command, SMB_HOST_COMMAND); |
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233 | if (read_write == I2C_SMBUS_WRITE) |
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234 | outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */ |
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235 | size = AMD756_WORD_DATA; |
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236 | break; |
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237 | case I2C_SMBUS_BLOCK_DATA: |
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238 | outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
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239 | SMB_HOST_ADDRESS); |
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240 | outb_p(command, SMB_HOST_COMMAND); |
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241 | if (read_write == I2C_SMBUS_WRITE) { |
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242 | len = data->block[0]; |
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243 | if (len < 0) |
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244 | len = 0; |
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245 | if (len > 32) |
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246 | len = 32; |
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247 | outw_p(len, SMB_HOST_DATA); |
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248 | /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */ |
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249 | for (i = 1; i <= len; i++) |
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250 | outb_p(data->block[i], |
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251 | SMB_HOST_BLOCK_DATA); |
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252 | } |
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253 | size = AMD756_BLOCK_DATA; |
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254 | break; |
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255 | } |
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256 | |||
257 | /* How about enabling interrupts... */ |
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258 | outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE); |
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259 | |||
260 | if (amd756_transaction(adap)) /* Error in transaction */ |
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261 | return -1; |
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262 | |||
263 | if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK)) |
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264 | return 0; |
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265 | |||
266 | |||
267 | switch (size) { |
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268 | case AMD756_BYTE: |
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269 | data->byte = inw_p(SMB_HOST_DATA); |
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270 | break; |
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271 | case AMD756_BYTE_DATA: |
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272 | data->byte = inw_p(SMB_HOST_DATA); |
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273 | break; |
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274 | case AMD756_WORD_DATA: |
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275 | data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */ |
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276 | break; |
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277 | case AMD756_BLOCK_DATA: |
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278 | data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f; |
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279 | if(data->block[0] > 32) |
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280 | data->block[0] = 32; |
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281 | /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */ |
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282 | for (i = 1; i <= data->block[0]; i++) |
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283 | data->block[i] = inb_p(SMB_HOST_BLOCK_DATA); |
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284 | break; |
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285 | } |
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286 | |||
287 | return 0; |
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288 | } |
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289 | |||
290 | static u32 amd756_func(struct i2c_adapter *adapter) |
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291 | { |
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292 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
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293 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
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294 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL; |
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295 | } |
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296 | |||
297 | static struct i2c_algorithm smbus_algorithm = { |
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298 | .name = "Non-I2C SMBus adapter", |
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299 | .id = I2C_ALGO_SMBUS, |
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300 | .smbus_xfer = amd756_access, |
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301 | .functionality = amd756_func, |
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302 | }; |
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303 | |||
304 | static struct i2c_adapter amd756_adapter = { |
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305 | .owner = THIS_MODULE, |
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306 | .class = I2C_ADAP_CLASS_SMBUS, |
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307 | .algo = &smbus_algorithm, |
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308 | .name = "unset", |
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309 | }; |
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310 | |||
311 | enum chiptype { AMD756, AMD766, AMD768, NFORCE }; |
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312 | |||
313 | static struct pci_device_id amd756_ids[] = { |
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314 | {PCI_VENDOR_ID_AMD, 0x740B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD756 }, |
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315 | {PCI_VENDOR_ID_AMD, 0x7413, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD766 }, |
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316 | {PCI_VENDOR_ID_AMD, 0x7443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768 }, |
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317 | {PCI_VENDOR_ID_NVIDIA, 0x01B4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE }, |
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318 | { 0, } |
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319 | }; |
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320 | |||
321 | static int __devinit amd756_probe(struct pci_dev *pdev, |
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322 | const struct pci_device_id *id) |
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323 | { |
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324 | int nforce = (id->driver_data == NFORCE), error; |
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325 | u8 temp; |
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326 | |||
327 | if (amd756_ioport) { |
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328 | dev_err(&pdev->dev, ": Only one device supported. " |
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329 | "(you have a strange motherboard, btw..)\n"); |
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330 | return -ENODEV; |
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331 | } |
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332 | |||
333 | if (nforce) { |
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334 | if (PCI_FUNC(pdev->devfn) != 1) |
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335 | return -ENODEV; |
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336 | |||
337 | pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport); |
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338 | amd756_ioport &= 0xfffc; |
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339 | } else { /* amd */ |
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340 | if (PCI_FUNC(pdev->devfn) != 3) |
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341 | return -ENODEV; |
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342 | |||
343 | pci_read_config_byte(pdev, SMBGCFG, &temp); |
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344 | if ((temp & 128) == 0) { |
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345 | dev_err(&pdev->dev, |
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346 | ": Error: SMBus controller I/O not enabled!\n"); |
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347 | return -ENODEV; |
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348 | } |
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349 | |||
350 | /* Determine the address of the SMBus areas */ |
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351 | /* Technically it is a dword but... */ |
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352 | pci_read_config_word(pdev, SMBBA, &amd756_ioport); |
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353 | amd756_ioport &= 0xff00; |
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354 | amd756_ioport += SMB_ADDR_OFFSET; |
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355 | } |
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356 | |||
357 | if (!request_region(amd756_ioport, SMB_IOSIZE, "amd756-smbus")) { |
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358 | dev_err(&pdev->dev, ": SMB region 0x%x already in use!\n", |
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359 | amd756_ioport); |
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360 | return -ENODEV; |
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361 | } |
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362 | |||
363 | pci_read_config_byte(pdev, SMBREV, &temp); |
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364 | dev_dbg(&pdev->dev, ": SMBREV = 0x%X\n", temp); |
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365 | dev_dbg(&pdev->dev, ": AMD756_smba = 0x%X\n", amd756_ioport); |
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366 | |||
367 | /* set up the driverfs linkage to our parent device */ |
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368 | amd756_adapter.dev.parent = &pdev->dev; |
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369 | |||
370 | snprintf(amd756_adapter.name, I2C_NAME_SIZE, |
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371 | "SMBus AMD75x adapter at %04x", amd756_ioport); |
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372 | |||
373 | error = i2c_add_adapter(&amd756_adapter); |
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374 | if (error) { |
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375 | dev_err(&pdev->dev, |
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376 | ": Adapter registration failed, module not inserted.\n"); |
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377 | goto out_err; |
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378 | } |
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379 | |||
380 | return 0; |
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381 | |||
382 | out_err: |
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383 | release_region(amd756_ioport, SMB_IOSIZE); |
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384 | return error; |
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385 | } |
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386 | |||
387 | static void __devexit amd756_remove(struct pci_dev *dev) |
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388 | { |
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389 | i2c_del_adapter(&amd756_adapter); |
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390 | release_region(amd756_ioport, SMB_IOSIZE); |
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391 | } |
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392 | |||
393 | static struct pci_driver amd756_driver = { |
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394 | .name = "amd75x smbus", |
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395 | .id_table = amd756_ids, |
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396 | .probe = amd756_probe, |
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397 | .remove = __devexit_p(amd756_remove), |
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398 | }; |
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399 | |||
400 | static int __init amd756_init(void) |
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401 | { |
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402 | return pci_module_init(&amd756_driver); |
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403 | } |
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404 | |||
405 | static void __exit amd756_exit(void) |
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406 | { |
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407 | pci_unregister_driver(&amd756_driver); |
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408 | } |
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409 | |||
410 | MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>"); |
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411 | MODULE_DESCRIPTION("AMD756/766/768/nVidia nForce SMBus driver"); |
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412 | MODULE_LICENSE("GPL"); |
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413 | |||
414 | module_init(amd756_init) |
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415 | module_exit(amd756_exit) |