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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 420 | giacomo | 1 | #ifndef __I2C_KEYWEST_H__ |
| 2 | #define __I2C_KEYWEST_H__ |
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| 3 | |||
| 4 | /* The Tumbler audio equalizer can be really slow sometimes */ |
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| 5 | #define POLL_TIMEOUT (2*HZ) |
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| 6 | |||
| 7 | /* Register indices */ |
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| 8 | typedef enum { |
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| 9 | reg_mode = 0, |
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| 10 | reg_control, |
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| 11 | reg_status, |
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| 12 | reg_isr, |
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| 13 | reg_ier, |
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| 14 | reg_addr, |
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| 15 | reg_subaddr, |
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| 16 | reg_data |
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| 17 | } reg_t; |
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| 18 | |||
| 19 | |||
| 20 | /* Mode register */ |
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| 21 | #define KW_I2C_MODE_100KHZ 0x00 |
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| 22 | #define KW_I2C_MODE_50KHZ 0x01 |
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| 23 | #define KW_I2C_MODE_25KHZ 0x02 |
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| 24 | #define KW_I2C_MODE_DUMB 0x00 |
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| 25 | #define KW_I2C_MODE_STANDARD 0x04 |
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| 26 | #define KW_I2C_MODE_STANDARDSUB 0x08 |
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| 27 | #define KW_I2C_MODE_COMBINED 0x0C |
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| 28 | #define KW_I2C_MODE_MODE_MASK 0x0C |
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| 29 | #define KW_I2C_MODE_CHAN_MASK 0xF0 |
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| 30 | |||
| 31 | /* Control register */ |
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| 32 | #define KW_I2C_CTL_AAK 0x01 |
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| 33 | #define KW_I2C_CTL_XADDR 0x02 |
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| 34 | #define KW_I2C_CTL_STOP 0x04 |
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| 35 | #define KW_I2C_CTL_START 0x08 |
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| 36 | |||
| 37 | /* Status register */ |
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| 38 | #define KW_I2C_STAT_BUSY 0x01 |
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| 39 | #define KW_I2C_STAT_LAST_AAK 0x02 |
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| 40 | #define KW_I2C_STAT_LAST_RW 0x04 |
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| 41 | #define KW_I2C_STAT_SDA 0x08 |
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| 42 | #define KW_I2C_STAT_SCL 0x10 |
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| 43 | |||
| 44 | /* IER & ISR registers */ |
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| 45 | #define KW_I2C_IRQ_DATA 0x01 |
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| 46 | #define KW_I2C_IRQ_ADDR 0x02 |
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| 47 | #define KW_I2C_IRQ_STOP 0x04 |
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| 48 | #define KW_I2C_IRQ_START 0x08 |
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| 49 | #define KW_I2C_IRQ_MASK 0x0F |
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| 50 | |||
| 51 | /* Physical interface */ |
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| 52 | struct keywest_iface |
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| 53 | { |
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| 54 | unsigned long base; |
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| 55 | unsigned bsteps; |
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| 56 | int irq; |
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| 57 | struct semaphore sem; |
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| 58 | spinlock_t lock; |
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| 59 | struct keywest_chan* channels; |
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| 60 | unsigned chan_count; |
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| 61 | u8 cur_mode; |
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| 62 | char read_write; |
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| 63 | u8* data; |
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| 64 | unsigned datalen; |
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| 65 | int state; |
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| 66 | int result; |
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| 67 | int stopretry; |
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| 68 | struct timer_list timeout_timer; |
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| 69 | struct completion complete; |
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| 70 | }; |
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| 71 | |||
| 72 | enum { |
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| 73 | state_idle, |
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| 74 | state_addr, |
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| 75 | state_read, |
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| 76 | state_write, |
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| 77 | state_stop, |
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| 78 | state_dead |
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| 79 | }; |
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| 80 | |||
| 81 | /* Channel on an interface */ |
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| 82 | struct keywest_chan |
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| 83 | { |
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| 84 | struct i2c_adapter adapter; |
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| 85 | struct keywest_iface* iface; |
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| 86 | unsigned chan_no; |
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| 87 | }; |
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| 88 | |||
| 89 | /* Register access */ |
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| 90 | |||
| 91 | static inline u8 __read_reg(struct keywest_iface *iface, reg_t reg) |
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| 92 | { |
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| 93 | return in_8(((volatile u8 *)iface->base) |
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| 94 | + (((unsigned)reg) << iface->bsteps)); |
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| 95 | } |
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| 96 | |||
| 97 | static inline void __write_reg(struct keywest_iface *iface, reg_t reg, u8 val) |
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| 98 | { |
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| 99 | out_8(((volatile u8 *)iface->base) |
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| 100 | + (((unsigned)reg) << iface->bsteps), val); |
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| 101 | (void)__read_reg(iface, reg); |
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| 102 | udelay(10); |
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| 103 | } |
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| 104 | |||
| 105 | #define write_reg(reg, val) __write_reg(iface, reg, val) |
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| 106 | #define read_reg(reg) __read_reg(iface, reg) |
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| 107 | |||
| 108 | |||
| 109 | |||
| 110 | #endif /* __I2C_KEYWEST_H__ */ |