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Rev | Author | Line No. | Line |
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420 | giacomo | 1 | /* linux/drivers/i2c/scx200_acb.c |
2 | |||
3 | Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> |
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4 | |||
5 | National Semiconductor SCx200 ACCESS.bus support |
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6 | |||
7 | Based on i2c-keywest.c which is: |
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8 | Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org> |
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9 | Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com> |
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10 | |||
11 | This program is free software; you can redistribute it and/or |
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12 | modify it under the terms of the GNU General Public License as |
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13 | published by the Free Software Foundation; either version 2 of the |
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14 | License, or (at your option) any later version. |
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15 | |||
16 | This program is distributed in the hope that it will be useful, |
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17 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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19 | General Public License for more details. |
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20 | |||
21 | You should have received a copy of the GNU General Public License |
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22 | along with this program; if not, write to the Free Software |
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23 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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24 | |||
25 | */ |
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26 | |||
27 | #include <linux/config.h> |
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28 | #include <linux/module.h> |
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29 | #include <linux/errno.h> |
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30 | #include <linux/kernel.h> |
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31 | #include <linux/init.h> |
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32 | #include <linux/i2c.h> |
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33 | #include <linux/smp_lock.h> |
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34 | #include <linux/pci.h> |
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35 | #include <asm/io.h> |
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36 | |||
37 | #include <linux/scx200.h> |
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38 | |||
39 | #define NAME "scx200_acb" |
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40 | |||
41 | MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>"); |
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42 | MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver"); |
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43 | MODULE_LICENSE("GPL"); |
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44 | |||
45 | #define MAX_DEVICES 4 |
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46 | static int base[MAX_DEVICES] = { 0x840 }; |
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47 | MODULE_PARM(base, "1-4i"); |
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48 | MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers"); |
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49 | |||
50 | #define DEBUG 0 |
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51 | |||
52 | #if DEBUG |
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53 | #define DBG(x...) printk(KERN_DEBUG NAME ": " x) |
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54 | #else |
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55 | #define DBG(x...) |
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56 | #endif |
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57 | |||
58 | /* The hardware supports interrupt driven mode too, but I haven't |
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59 | implemented that. */ |
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60 | #define POLLED_MODE 1 |
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61 | #define POLL_TIMEOUT (HZ) |
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62 | |||
63 | enum scx200_acb_state { |
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64 | state_idle, |
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65 | state_address, |
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66 | state_command, |
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67 | state_repeat_start, |
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68 | state_quick, |
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69 | state_read, |
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70 | state_write, |
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71 | }; |
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72 | |||
73 | static const char *scx200_acb_state_name[] = { |
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74 | "idle", |
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75 | "address", |
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76 | "command", |
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77 | "repeat_start", |
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78 | "quick", |
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79 | "read", |
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80 | "write", |
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81 | }; |
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82 | |||
83 | /* Physical interface */ |
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84 | struct scx200_acb_iface |
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85 | { |
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86 | struct scx200_acb_iface *next; |
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87 | struct i2c_adapter adapter; |
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88 | unsigned base; |
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89 | struct semaphore sem; |
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90 | |||
91 | /* State machine data */ |
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92 | enum scx200_acb_state state; |
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93 | int result; |
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94 | u8 address_byte; |
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95 | u8 command; |
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96 | u8 *ptr; |
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97 | char needs_reset; |
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98 | unsigned len; |
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99 | }; |
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100 | |||
101 | /* Register Definitions */ |
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102 | #define ACBSDA (iface->base + 0) |
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103 | #define ACBST (iface->base + 1) |
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104 | #define ACBST_SDAST 0x40 /* SDA Status */ |
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105 | #define ACBST_BER 0x20 |
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106 | #define ACBST_NEGACK 0x10 /* Negative Acknowledge */ |
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107 | #define ACBST_STASTR 0x08 /* Stall After Start */ |
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108 | #define ACBST_MASTER 0x02 |
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109 | #define ACBCST (iface->base + 2) |
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110 | #define ACBCST_BB 0x02 |
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111 | #define ACBCTL1 (iface->base + 3) |
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112 | #define ACBCTL1_STASTRE 0x80 |
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113 | #define ACBCTL1_NMINTE 0x40 |
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114 | #define ACBCTL1_ACK 0x10 |
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115 | #define ACBCTL1_STOP 0x02 |
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116 | #define ACBCTL1_START 0x01 |
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117 | #define ACBADDR (iface->base + 4) |
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118 | #define ACBCTL2 (iface->base + 5) |
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119 | #define ACBCTL2_ENABLE 0x01 |
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120 | |||
121 | /************************************************************************/ |
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122 | |||
123 | static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status) |
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124 | { |
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125 | const char *errmsg; |
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126 | |||
127 | DBG("state %s, status = 0x%02x\n", |
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128 | scx200_acb_state_name[iface->state], status); |
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129 | |||
130 | if (status & ACBST_BER) { |
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131 | errmsg = "bus error"; |
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132 | goto error; |
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133 | } |
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134 | if (!(status & ACBST_MASTER)) { |
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135 | errmsg = "not master"; |
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136 | goto error; |
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137 | } |
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138 | if (status & ACBST_NEGACK) |
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139 | goto negack; |
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140 | |||
141 | switch (iface->state) { |
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142 | case state_idle: |
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143 | dev_warn(&iface->adapter.dev, "interrupt in idle state\n"); |
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144 | break; |
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145 | |||
146 | case state_address: |
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147 | /* Do a pointer write first */ |
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148 | outb(iface->address_byte & ~1, ACBSDA); |
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149 | |||
150 | iface->state = state_command; |
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151 | break; |
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152 | |||
153 | case state_command: |
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154 | outb(iface->command, ACBSDA); |
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155 | |||
156 | if (iface->address_byte & 1) |
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157 | iface->state = state_repeat_start; |
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158 | else |
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159 | iface->state = state_write; |
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160 | break; |
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161 | |||
162 | case state_repeat_start: |
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163 | outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); |
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164 | /* fallthrough */ |
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165 | |||
166 | case state_quick: |
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167 | if (iface->address_byte & 1) { |
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168 | if (iface->len == 1) |
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169 | outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); |
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170 | else |
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171 | outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); |
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172 | outb(iface->address_byte, ACBSDA); |
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173 | |||
174 | iface->state = state_read; |
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175 | } else { |
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176 | outb(iface->address_byte, ACBSDA); |
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177 | |||
178 | iface->state = state_write; |
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179 | } |
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180 | break; |
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181 | |||
182 | case state_read: |
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183 | /* Set ACK if receiving the last byte */ |
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184 | if (iface->len == 1) |
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185 | outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); |
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186 | else |
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187 | outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); |
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188 | |||
189 | *iface->ptr++ = inb(ACBSDA); |
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190 | --iface->len; |
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191 | |||
192 | if (iface->len == 0) { |
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193 | iface->result = 0; |
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194 | iface->state = state_idle; |
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195 | outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); |
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196 | } |
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197 | |||
198 | break; |
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199 | |||
200 | case state_write: |
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201 | if (iface->len == 0) { |
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202 | iface->result = 0; |
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203 | iface->state = state_idle; |
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204 | outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); |
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205 | break; |
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206 | } |
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207 | |||
208 | outb(*iface->ptr++, ACBSDA); |
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209 | --iface->len; |
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210 | |||
211 | break; |
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212 | } |
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213 | |||
214 | return; |
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215 | |||
216 | negack: |
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217 | DBG("negative acknowledge in state %s\n", |
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218 | scx200_acb_state_name[iface->state]); |
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219 | |||
220 | iface->state = state_idle; |
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221 | iface->result = -ENXIO; |
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222 | |||
223 | outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); |
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224 | outb(ACBST_STASTR | ACBST_NEGACK, ACBST); |
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225 | return; |
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226 | |||
227 | error: |
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228 | dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg, |
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229 | scx200_acb_state_name[iface->state]); |
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230 | |||
231 | iface->state = state_idle; |
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232 | iface->result = -EIO; |
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233 | iface->needs_reset = 1; |
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234 | } |
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235 | |||
236 | static void scx200_acb_timeout(struct scx200_acb_iface *iface) |
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237 | { |
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238 | dev_err(&iface->adapter.dev, "timeout in state %s\n", |
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239 | scx200_acb_state_name[iface->state]); |
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240 | |||
241 | iface->state = state_idle; |
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242 | iface->result = -EIO; |
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243 | iface->needs_reset = 1; |
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244 | } |
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245 | |||
246 | #ifdef POLLED_MODE |
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247 | static void scx200_acb_poll(struct scx200_acb_iface *iface) |
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248 | { |
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249 | u8 status = 0; |
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250 | unsigned long timeout; |
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251 | |||
252 | timeout = jiffies + POLL_TIMEOUT; |
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253 | while (time_before(jiffies, timeout)) { |
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254 | status = inb(ACBST); |
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255 | if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) { |
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256 | scx200_acb_machine(iface, status); |
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257 | return; |
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258 | } |
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259 | schedule_timeout(HZ/100+1); |
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260 | } |
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261 | |||
262 | scx200_acb_timeout(iface); |
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263 | } |
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264 | #endif /* POLLED_MODE */ |
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265 | |||
266 | static void scx200_acb_reset(struct scx200_acb_iface *iface) |
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267 | { |
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268 | /* Disable the ACCESS.bus device and Configure the SCL |
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269 | frequency: 16 clock cycles */ |
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270 | outb(0x70, ACBCTL2); |
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271 | /* Polling mode */ |
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272 | outb(0, ACBCTL1); |
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273 | /* Disable slave address */ |
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274 | outb(0, ACBADDR); |
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275 | /* Enable the ACCESS.bus device */ |
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276 | outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); |
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277 | /* Free STALL after START */ |
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278 | outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1); |
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279 | /* Send a STOP */ |
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280 | outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); |
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281 | /* Clear BER, NEGACK and STASTR bits */ |
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282 | outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST); |
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283 | /* Clear BB bit */ |
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284 | outb(inb(ACBCST) | ACBCST_BB, ACBCST); |
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285 | } |
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286 | |||
287 | static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter, |
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288 | u16 address, unsigned short flags, |
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289 | char rw, u8 command, int size, |
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290 | union i2c_smbus_data *data) |
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291 | { |
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292 | struct scx200_acb_iface *iface = i2c_get_adapdata(adapter); |
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293 | int len; |
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294 | u8 *buffer; |
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295 | u16 cur_word; |
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296 | int rc; |
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297 | |||
298 | switch (size) { |
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299 | case I2C_SMBUS_QUICK: |
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300 | len = 0; |
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301 | buffer = NULL; |
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302 | break; |
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303 | case I2C_SMBUS_BYTE: |
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304 | if (rw == I2C_SMBUS_READ) { |
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305 | len = 1; |
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306 | buffer = &data->byte; |
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307 | } else { |
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308 | len = 1; |
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309 | buffer = &command; |
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310 | } |
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311 | break; |
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312 | case I2C_SMBUS_BYTE_DATA: |
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313 | len = 1; |
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314 | buffer = &data->byte; |
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315 | break; |
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316 | case I2C_SMBUS_WORD_DATA: |
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317 | len = 2; |
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318 | cur_word = cpu_to_le16(data->word); |
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319 | buffer = (u8 *)&cur_word; |
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320 | break; |
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321 | case I2C_SMBUS_BLOCK_DATA: |
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322 | len = data->block[0]; |
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323 | buffer = &data->block[1]; |
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324 | break; |
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325 | default: |
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326 | return -EINVAL; |
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327 | } |
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328 | |||
329 | DBG("size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n", |
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330 | size, address, command, len, rw == I2C_SMBUS_READ); |
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331 | |||
332 | if (!len && rw == I2C_SMBUS_READ) { |
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333 | dev_warn(&adapter->dev, "zero length read\n"); |
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334 | return -EINVAL; |
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335 | } |
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336 | |||
337 | if (len && !buffer) { |
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338 | dev_warn(&adapter->dev, "nonzero length but no buffer\n"); |
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339 | return -EFAULT; |
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340 | } |
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341 | |||
342 | down(&iface->sem); |
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343 | |||
344 | iface->address_byte = address<<1; |
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345 | if (rw == I2C_SMBUS_READ) |
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346 | iface->address_byte |= 1; |
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347 | iface->command = command; |
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348 | iface->ptr = buffer; |
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349 | iface->len = len; |
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350 | iface->result = -EINVAL; |
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351 | iface->needs_reset = 0; |
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352 | |||
353 | outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); |
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354 | |||
355 | if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) |
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356 | iface->state = state_quick; |
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357 | else |
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358 | iface->state = state_address; |
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359 | |||
360 | #ifdef POLLED_MODE |
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361 | while (iface->state != state_idle) |
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362 | scx200_acb_poll(iface); |
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363 | #else /* POLLED_MODE */ |
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364 | #error Interrupt driven mode not implemented |
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365 | #endif /* POLLED_MODE */ |
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366 | |||
367 | if (iface->needs_reset) |
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368 | scx200_acb_reset(iface); |
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369 | |||
370 | rc = iface->result; |
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371 | |||
372 | up(&iface->sem); |
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373 | |||
374 | if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ) |
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375 | data->word = le16_to_cpu(cur_word); |
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376 | |||
377 | #if DEBUG |
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378 | printk(KERN_DEBUG NAME ": transfer done, result: %d", rc); |
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379 | if (buffer) { |
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380 | int i; |
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381 | printk(" data:"); |
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382 | for (i = 0; i < len; ++i) |
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383 | printk(" %02x", buffer[i]); |
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384 | } |
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385 | printk("\n"); |
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386 | #endif |
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387 | |||
388 | return rc; |
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389 | } |
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390 | |||
391 | static u32 scx200_acb_func(struct i2c_adapter *adapter) |
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392 | { |
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393 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
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394 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
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395 | I2C_FUNC_SMBUS_BLOCK_DATA; |
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396 | } |
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397 | |||
398 | /* For now, we only handle combined mode (smbus) */ |
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399 | static struct i2c_algorithm scx200_acb_algorithm = { |
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400 | .name = "NatSemi SCx200 ACCESS.bus", |
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401 | .id = I2C_ALGO_SMBUS, |
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402 | .smbus_xfer = scx200_acb_smbus_xfer, |
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403 | .functionality = scx200_acb_func, |
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404 | }; |
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405 | |||
406 | struct scx200_acb_iface *scx200_acb_list; |
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407 | |||
408 | int scx200_acb_probe(struct scx200_acb_iface *iface) |
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409 | { |
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410 | u8 val; |
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411 | |||
412 | /* Disable the ACCESS.bus device and Configure the SCL |
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413 | frequency: 16 clock cycles */ |
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414 | outb(0x70, ACBCTL2); |
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415 | |||
416 | if (inb(ACBCTL2) != 0x70) { |
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417 | DBG("ACBCTL2 readback failed\n"); |
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418 | return -ENXIO; |
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419 | } |
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420 | |||
421 | outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1); |
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422 | |||
423 | val = inb(ACBCTL1); |
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424 | if (val) { |
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425 | DBG("disabled, but ACBCTL1=0x%02x\n", val); |
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426 | return -ENXIO; |
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427 | } |
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428 | |||
429 | outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); |
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430 | |||
431 | outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1); |
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432 | |||
433 | val = inb(ACBCTL1); |
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434 | if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) { |
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435 | DBG("enabled, but NMINTE won't be set, ACBCTL1=0x%02x\n", val); |
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436 | return -ENXIO; |
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437 | } |
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438 | |||
439 | return 0; |
||
440 | } |
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441 | |||
442 | static int __init scx200_acb_create(int base, int index) |
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443 | { |
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444 | struct scx200_acb_iface *iface; |
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445 | struct i2c_adapter *adapter; |
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446 | int rc = 0; |
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447 | char description[64]; |
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448 | |||
449 | iface = kmalloc(sizeof(*iface), GFP_KERNEL); |
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450 | if (!iface) { |
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451 | printk(KERN_ERR NAME ": can't allocate memory\n"); |
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452 | rc = -ENOMEM; |
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453 | goto errout; |
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454 | } |
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455 | |||
456 | memset(iface, 0, sizeof(*iface)); |
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457 | adapter = &iface->adapter; |
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458 | i2c_set_adapdata(adapter, iface); |
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459 | snprintf(adapter->name, I2C_NAME_SIZE, "SCx200 ACB%d", index); |
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460 | adapter->owner = THIS_MODULE; |
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461 | adapter->id = I2C_ALGO_SMBUS; |
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462 | adapter->algo = &scx200_acb_algorithm; |
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463 | |||
464 | init_MUTEX(&iface->sem); |
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465 | |||
466 | snprintf(description, sizeof(description), "NatSemi SCx200 ACCESS.bus [%s]", adapter->name); |
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467 | if (request_region(base, 8, description) == 0) { |
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468 | dev_err(&adapter->dev, "can't allocate io 0x%x-0x%x\n", |
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469 | base, base + 8-1); |
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470 | rc = -EBUSY; |
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471 | goto errout; |
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472 | } |
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473 | iface->base = base; |
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474 | |||
475 | rc = scx200_acb_probe(iface); |
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476 | if (rc) { |
||
477 | dev_warn(&adapter->dev, "probe failed\n"); |
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478 | goto errout; |
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479 | } |
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480 | |||
481 | scx200_acb_reset(iface); |
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482 | |||
483 | if (i2c_add_adapter(adapter) < 0) { |
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484 | dev_err(&adapter->dev, "failed to register\n"); |
||
485 | rc = -ENODEV; |
||
486 | goto errout; |
||
487 | } |
||
488 | |||
489 | lock_kernel(); |
||
490 | iface->next = scx200_acb_list; |
||
491 | scx200_acb_list = iface; |
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492 | unlock_kernel(); |
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493 | |||
494 | return 0; |
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495 | |||
496 | errout: |
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497 | if (iface) { |
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498 | if (iface->base) |
||
499 | release_region(iface->base, 8); |
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500 | kfree(iface); |
||
501 | } |
||
502 | return rc; |
||
503 | } |
||
504 | |||
505 | static int __init scx200_acb_init(void) |
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506 | { |
||
507 | int i; |
||
508 | int rc; |
||
509 | |||
510 | printk(KERN_DEBUG NAME ": NatSemi SCx200 ACCESS.bus Driver\n"); |
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511 | |||
512 | /* Verify that this really is a SCx200 processor */ |
||
513 | if (pci_find_device(PCI_VENDOR_ID_NS, |
||
514 | PCI_DEVICE_ID_NS_SCx200_BRIDGE, |
||
515 | NULL) == NULL) |
||
516 | return -ENODEV; |
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517 | |||
518 | rc = -ENXIO; |
||
519 | for (i = 0; i < MAX_DEVICES; ++i) { |
||
520 | if (base[i] > 0) |
||
521 | rc = scx200_acb_create(base[i], i); |
||
522 | } |
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523 | if (scx200_acb_list) |
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524 | return 0; |
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525 | return rc; |
||
526 | } |
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527 | |||
528 | static void __exit scx200_acb_cleanup(void) |
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529 | { |
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530 | struct scx200_acb_iface *iface; |
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531 | lock_kernel(); |
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532 | while ((iface = scx200_acb_list) != NULL) { |
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533 | scx200_acb_list = iface->next; |
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534 | unlock_kernel(); |
||
535 | |||
536 | i2c_del_adapter(&iface->adapter); |
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537 | release_region(iface->base, 8); |
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538 | kfree(iface); |
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539 | lock_kernel(); |
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540 | } |
||
541 | unlock_kernel(); |
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542 | } |
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543 | |||
544 | module_init(scx200_acb_init); |
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545 | module_exit(scx200_acb_cleanup); |
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546 | |||
547 | /* |
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548 | Local variables: |
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549 | compile-command: "make -k -C ../.. SUBDIRS=drivers/i2c modules" |
||
550 | c-basic-offset: 8 |
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551 | End: |
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552 | */ |
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553 |