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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 494 | giacomo | 1 | #ifndef _I8042_H |
| 2 | #define _I8042_H |
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| 3 | |||
| 4 | /* |
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| 5 | * Copyright (c) 1999-2002 Vojtech Pavlik |
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| 6 | * |
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| 7 | * This program is free software; you can redistribute it and/or modify it |
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| 8 | * under the terms of the GNU General Public License version 2 as published by |
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| 9 | * the Free Software Foundation. |
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| 10 | */ |
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| 11 | |||
| 12 | /* |
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| 13 | * Arch-dependent inline functions and defines. |
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| 14 | */ |
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| 15 | |||
| 16 | #if defined(CONFIG_PPC) |
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| 17 | #include "i8042-ppcio.h" |
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| 18 | #elif defined(CONFIG_SPARC32) || defined(CONFIG_SPARC64) |
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| 19 | #include "i8042-sparcio.h" |
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| 20 | #else |
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| 21 | #include "i8042-io.h" |
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| 22 | #endif |
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| 23 | |||
| 24 | /* |
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| 25 | * This is in 50us units, the time we wait for the i8042 to react. This |
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| 26 | * has to be long enough for the i8042 itself to timeout on sending a byte |
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| 27 | * to a non-existent mouse. |
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| 28 | */ |
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| 29 | |||
| 30 | #define I8042_CTL_TIMEOUT 10000 |
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| 31 | |||
| 32 | /* |
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| 33 | * When the device isn't opened and it's interrupts aren't used, we poll it at |
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| 34 | * regular intervals to see if any characters arrived. If yes, we can start |
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| 35 | * probing for any mouse / keyboard connected. This is the period of the |
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| 36 | * polling. |
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| 37 | */ |
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| 38 | |||
| 39 | #define I8042_POLL_PERIOD HZ/20 |
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| 40 | |||
| 41 | /* |
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| 42 | * Status register bits. |
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| 43 | */ |
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| 44 | |||
| 45 | #define I8042_STR_PARITY 0x80 |
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| 46 | #define I8042_STR_TIMEOUT 0x40 |
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| 47 | #define I8042_STR_AUXDATA 0x20 |
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| 48 | #define I8042_STR_KEYLOCK 0x10 |
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| 49 | #define I8042_STR_CMDDAT 0x08 |
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| 50 | #define I8042_STR_MUXERR 0x04 |
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| 51 | #define I8042_STR_IBF 0x02 |
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| 52 | #define I8042_STR_OBF 0x01 |
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| 53 | |||
| 54 | /* |
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| 55 | * Control register bits. |
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| 56 | */ |
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| 57 | |||
| 58 | #define I8042_CTR_KBDINT 0x01 |
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| 59 | #define I8042_CTR_AUXINT 0x02 |
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| 60 | #define I8042_CTR_IGNKEYLOCK 0x08 |
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| 61 | #define I8042_CTR_KBDDIS 0x10 |
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| 62 | #define I8042_CTR_AUXDIS 0x20 |
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| 63 | #define I8042_CTR_XLATE 0x40 |
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| 64 | |||
| 65 | /* |
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| 66 | * Commands. |
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| 67 | */ |
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| 68 | |||
| 69 | #define I8042_CMD_CTL_RCTR 0x0120 |
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| 70 | #define I8042_CMD_CTL_WCTR 0x1060 |
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| 71 | #define I8042_CMD_CTL_TEST 0x01aa |
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| 72 | |||
| 73 | #define I8042_CMD_KBD_DISABLE 0x00ad |
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| 74 | #define I8042_CMD_KBD_ENABLE 0x00ae |
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| 75 | #define I8042_CMD_KBD_TEST 0x01ab |
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| 76 | #define I8042_CMD_KBD_LOOP 0x11d2 |
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| 77 | |||
| 78 | #define I8042_CMD_AUX_DISABLE 0x00a7 |
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| 79 | #define I8042_CMD_AUX_ENABLE 0x00a8 |
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| 80 | #define I8042_CMD_AUX_TEST 0x01a9 |
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| 81 | #define I8042_CMD_AUX_SEND 0x10d4 |
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| 82 | #define I8042_CMD_AUX_LOOP 0x11d3 |
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| 83 | |||
| 84 | #define I8042_CMD_MUX_PFX 0x0090 |
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| 85 | #define I8042_CMD_MUX_SEND 0x1090 |
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| 86 | |||
| 87 | /* |
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| 88 | * Return codes. |
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| 89 | */ |
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| 90 | |||
| 91 | #define I8042_RET_CTL_TEST 0x55 |
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| 92 | |||
| 93 | /* |
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| 94 | * Expected maximum internal i8042 buffer size. This is used for flushing |
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| 95 | * the i8042 buffers. 32 should be more than enough. |
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| 96 | */ |
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| 97 | |||
| 98 | #define I8042_BUFFER_SIZE 32 |
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| 99 | |||
| 100 | /* |
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| 101 | * Debug. |
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| 102 | */ |
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| 103 | |||
| 104 | #ifdef DEBUG |
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| 105 | static unsigned long i8042_start; |
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| 106 | #define dbg_init() do { i8042_start = jiffies26; } while (0) |
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| 107 | #define dbg(format, arg...) printk(KERN_DEBUG __FILE__ ": " format " [%d]\n" ,\ |
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| 108 | ## arg, (int) (jiffies26 - i8042_start)) |
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| 109 | #else |
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| 110 | #define dbg_init() do { } while (0) |
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| 111 | #define dbg(format, arg...) do {} while (0) |
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| 112 | #endif |
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| 113 | |||
| 114 | #endif /* _I8042_H */ |