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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 422 | giacomo | 1 | #ifndef AGP_H |
| 2 | #define AGP_H 1 |
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| 3 | |||
| 4 | #include <asm/pgtable.h> |
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| 5 | #include <asm/cacheflush.h> |
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| 6 | |||
| 7 | /* |
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| 8 | * Functions to keep the agpgart mappings coherent with the MMU. |
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| 9 | * The GART gives the CPU a physical alias of pages in memory. The alias region is |
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| 10 | * mapped uncacheable. Make sure there are no conflicting mappings |
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| 11 | * with different cachability attributes for the same page. This avoids |
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| 12 | * data corruption on some CPUs. |
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| 13 | */ |
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| 14 | |||
| 15 | #define map_page_into_agp(page) change_page_attr(page, 1, PAGE_KERNEL_NOCACHE) |
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| 16 | #define unmap_page_from_agp(page) change_page_attr(page, 1, PAGE_KERNEL) |
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| 17 | #define flush_agp_mappings() global_flush_tlb() |
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| 18 | |||
| 19 | /* Could use CLFLUSH here if the cpu supports it. But then it would |
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| 20 | need to be called for each cacheline of the whole page so it may not be |
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| 21 | worth it. Would need a page for it. */ |
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| 22 | #define flush_agp_cache() asm volatile("wbinvd":::"memory") |
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| 23 | |||
| 24 | #endif |