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Rev | Author | Line No. | Line |
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422 | giacomo | 1 | #ifndef _ASM_IO_H |
2 | #define _ASM_IO_H |
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3 | |||
4 | #include <linux/config.h> |
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5 | |||
6 | /* |
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7 | * This file contains the definitions for the x86 IO instructions |
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8 | * inb/inw/inl/outb/outw/outl and the "string versions" of the same |
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9 | * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" |
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10 | * versions of the single-IO instructions (inb_p/inw_p/..). |
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11 | * |
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12 | * This file is not meant to be obfuscating: it's just complicated |
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13 | * to (a) handle it all in a way that makes gcc able to optimize it |
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14 | * as well as possible and (b) trying to avoid writing the same thing |
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15 | * over and over again with slight variations and possibly making a |
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16 | * mistake somewhere. |
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17 | */ |
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18 | |||
19 | /* |
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20 | * Thanks to James van Artsdalen for a better timing-fix than |
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21 | * the two short jumps: using outb's to a nonexistent port seems |
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22 | * to guarantee better timings even on fast machines. |
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23 | * |
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24 | * On the other hand, I'd like to be sure of a non-existent port: |
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25 | * I feel a bit unsafe about using 0x80 (should be safe, though) |
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26 | * |
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27 | * Linus |
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28 | */ |
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29 | |||
30 | /* |
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31 | * Bit simplified and optimized by Jan Hubicka |
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32 | * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999. |
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33 | * |
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34 | * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added, |
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35 | * isa_read[wl] and isa_write[wl] fixed |
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36 | * - Arnaldo Carvalho de Melo <acme@conectiva.com.br> |
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37 | */ |
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38 | |||
39 | #define IO_SPACE_LIMIT 0xffff |
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40 | |||
41 | #define XQUAD_PORTIO_BASE 0xfe400000 |
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42 | #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */ |
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43 | |||
44 | #ifdef __KERNEL__ |
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45 | |||
46 | #include <linux/vmalloc.h> |
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47 | |||
48 | /* |
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49 | * Temporary debugging check to catch old code using |
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50 | * unmapped ISA addresses. Will be removed in 2.4. |
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51 | */ |
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52 | #ifdef CONFIG_DEBUG_IOVIRT |
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53 | extern void *__io_virt_debug(unsigned long x, const char *file, int line); |
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54 | #define __io_virt(x) __io_virt_debug((unsigned long)(x), __FILE__, __LINE__) |
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55 | #else |
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56 | #define __io_virt(x) ((void *)(x)) |
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57 | #endif |
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58 | |||
59 | /** |
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60 | * virt_to_phys - map virtual addresses to physical |
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61 | * @address: address to remap |
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62 | * |
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63 | * The returned physical address is the physical (CPU) mapping for |
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64 | * the memory address given. It is only valid to use this function on |
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65 | * addresses directly mapped or allocated via kmalloc. |
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66 | * |
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67 | * This function does not give bus mappings for DMA transfers. In |
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68 | * almost all conceivable cases a device driver should not be using |
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69 | * this function |
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70 | */ |
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71 | |||
72 | static inline unsigned long virt_to_phys(volatile void * address) |
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73 | { |
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74 | return __pa(address); |
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75 | } |
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76 | |||
77 | /** |
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78 | * phys_to_virt - map physical address to virtual |
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79 | * @address: address to remap |
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80 | * |
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81 | * The returned virtual address is a current CPU mapping for |
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82 | * the memory address given. It is only valid to use this function on |
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83 | * addresses that have a kernel mapping |
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84 | * |
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85 | * This function does not handle bus mappings for DMA transfers. In |
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86 | * almost all conceivable cases a device driver should not be using |
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87 | * this function |
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88 | */ |
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89 | |||
90 | static inline void * phys_to_virt(unsigned long address) |
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91 | { |
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92 | return __va(address); |
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93 | } |
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94 | |||
95 | /* |
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96 | * Change "struct page" to physical address. |
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97 | */ |
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98 | #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) |
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99 | |||
100 | extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); |
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101 | |||
102 | /** |
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103 | * ioremap - map bus memory into CPU space |
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104 | * @offset: bus address of the memory |
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105 | * @size: size of the resource to map |
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106 | * |
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107 | * ioremap performs a platform specific sequence of operations to |
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108 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ |
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109 | * writew/writel functions and the other mmio helpers. The returned |
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110 | * address is not guaranteed to be usable directly as a virtual |
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111 | * address. |
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112 | */ |
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113 | |||
114 | static inline void * ioremap (unsigned long offset, unsigned long size) |
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115 | { |
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116 | return __ioremap(offset, size, 0); |
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117 | } |
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118 | |||
119 | extern void * ioremap_nocache (unsigned long offset, unsigned long size); |
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120 | extern void iounmap(void *addr); |
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121 | |||
122 | /* |
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123 | * bt_ioremap() and bt_iounmap() are for temporary early boot-time |
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124 | * mappings, before the real ioremap() is functional. |
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125 | * A boot-time mapping is currently limited to at most 16 pages. |
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126 | */ |
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127 | extern void *bt_ioremap(unsigned long offset, unsigned long size); |
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128 | extern void bt_iounmap(void *addr, unsigned long size); |
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129 | |||
130 | /* |
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131 | * ISA I/O bus memory addresses are 1:1 with the physical address. |
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132 | */ |
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133 | #define isa_virt_to_bus virt_to_phys |
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134 | #define isa_page_to_bus page_to_phys |
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135 | #define isa_bus_to_virt phys_to_virt |
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136 | |||
137 | /* |
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138 | * However PCI ones are not necessarily 1:1 and therefore these interfaces |
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139 | * are forbidden in portable PCI drivers. |
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140 | * |
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141 | * Allow them on x86 for legacy drivers, though. |
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142 | */ |
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143 | #define virt_to_bus virt_to_phys |
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144 | #define bus_to_virt phys_to_virt |
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145 | |||
146 | /* |
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147 | * readX/writeX() are used to access memory mapped devices. On some |
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148 | * architectures the memory mapped IO stuff needs to be accessed |
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149 | * differently. On the x86 architecture, we just read/write the |
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150 | * memory location directly. |
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151 | */ |
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152 | |||
153 | #define readb(addr) (*(volatile unsigned char *) __io_virt(addr)) |
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154 | #define readw(addr) (*(volatile unsigned short *) __io_virt(addr)) |
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155 | #define readl(addr) (*(volatile unsigned int *) __io_virt(addr)) |
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156 | #define __raw_readb readb |
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157 | #define __raw_readw readw |
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158 | #define __raw_readl readl |
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159 | |||
160 | #define writeb(b,addr) (*(volatile unsigned char *) __io_virt(addr) = (b)) |
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161 | #define writew(b,addr) (*(volatile unsigned short *) __io_virt(addr) = (b)) |
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162 | #define writel(b,addr) (*(volatile unsigned int *) __io_virt(addr) = (b)) |
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163 | #define __raw_writeb writeb |
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164 | #define __raw_writew writew |
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165 | #define __raw_writel writel |
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166 | |||
167 | #define memset_io(a,b,c) memset(__io_virt(a),(b),(c)) |
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168 | #define memcpy_fromio(a,b,c) __memcpy((a),__io_virt(b),(c)) |
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169 | #define memcpy_toio(a,b,c) __memcpy(__io_virt(a),(b),(c)) |
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170 | |||
171 | /* |
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172 | * ISA space is 'always mapped' on a typical x86 system, no need to |
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173 | * explicitly ioremap() it. The fact that the ISA IO space is mapped |
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174 | * to PAGE_OFFSET is pure coincidence - it does not mean ISA values |
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175 | * are physical addresses. The following constant pointer can be |
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176 | * used as the IO-area pointer (it can be iounmapped as well, so the |
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177 | * analogy with PCI is quite large): |
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178 | */ |
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179 | #define __ISA_IO_base ((char *)(PAGE_OFFSET)) |
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180 | |||
181 | #define isa_readb(a) readb(__ISA_IO_base + (a)) |
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182 | #define isa_readw(a) readw(__ISA_IO_base + (a)) |
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183 | #define isa_readl(a) readl(__ISA_IO_base + (a)) |
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184 | #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a)) |
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185 | #define isa_writew(w,a) writew(w,__ISA_IO_base + (a)) |
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186 | #define isa_writel(l,a) writel(l,__ISA_IO_base + (a)) |
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187 | #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c)) |
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188 | #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c)) |
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189 | #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c)) |
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190 | |||
191 | |||
192 | /* |
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193 | * Again, i386 does not require mem IO specific function. |
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194 | */ |
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195 | |||
196 | #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),__io_virt(b),(c),(d)) |
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197 | #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),__io_virt(__ISA_IO_base + (b)),(c),(d)) |
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198 | |||
199 | /** |
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200 | * check_signature - find BIOS signatures |
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201 | * @io_addr: mmio address to check |
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202 | * @signature: signature block |
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203 | * @length: length of signature |
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204 | * |
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205 | * Perform a signature comparison with the mmio address io_addr. This |
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206 | * address should have been obtained by ioremap. |
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207 | * Returns 1 on a match. |
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208 | */ |
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209 | |||
210 | static inline int check_signature(unsigned long io_addr, |
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211 | const unsigned char *signature, int length) |
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212 | { |
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213 | int retval = 0; |
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214 | do { |
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215 | if (readb(io_addr) != *signature) |
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216 | goto out; |
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217 | io_addr++; |
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218 | signature++; |
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219 | length--; |
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220 | } while (length); |
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221 | retval = 1; |
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222 | out: |
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223 | return retval; |
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224 | } |
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225 | |||
226 | /** |
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227 | * isa_check_signature - find BIOS signatures |
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228 | * @io_addr: mmio address to check |
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229 | * @signature: signature block |
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230 | * @length: length of signature |
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231 | * |
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232 | * Perform a signature comparison with the ISA mmio address io_addr. |
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233 | * Returns 1 on a match. |
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234 | * |
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235 | * This function is deprecated. New drivers should use ioremap and |
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236 | * check_signature. |
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237 | */ |
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238 | |||
239 | |||
240 | static inline int isa_check_signature(unsigned long io_addr, |
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241 | const unsigned char *signature, int length) |
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242 | { |
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243 | int retval = 0; |
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244 | do { |
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245 | if (isa_readb(io_addr) != *signature) |
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246 | goto out; |
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247 | io_addr++; |
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248 | signature++; |
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249 | length--; |
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250 | } while (length); |
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251 | retval = 1; |
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252 | out: |
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253 | return retval; |
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254 | } |
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255 | |||
256 | /* |
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257 | * Cache management |
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258 | * |
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259 | * This needed for two cases |
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260 | * 1. Out of order aware processors |
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261 | * 2. Accidentally out of order processors (PPro errata #51) |
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262 | */ |
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263 | |||
264 | #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE) |
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265 | |||
266 | static inline void flush_write_buffers(void) |
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267 | { |
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268 | __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory"); |
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269 | } |
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270 | |||
271 | #define dma_cache_inv(_start,_size) flush_write_buffers() |
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272 | #define dma_cache_wback(_start,_size) flush_write_buffers() |
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273 | #define dma_cache_wback_inv(_start,_size) flush_write_buffers() |
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274 | |||
275 | #else |
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276 | |||
277 | /* Nothing to do */ |
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278 | |||
279 | #define dma_cache_inv(_start,_size) do { } while (0) |
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280 | #define dma_cache_wback(_start,_size) do { } while (0) |
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281 | #define dma_cache_wback_inv(_start,_size) do { } while (0) |
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282 | #define flush_write_buffers() |
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283 | |||
284 | #endif |
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285 | |||
286 | #endif /* __KERNEL__ */ |
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287 | |||
288 | #ifdef SLOW_IO_BY_JUMPING |
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289 | #define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:" |
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290 | #else |
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291 | #define __SLOW_DOWN_IO "outb %%al,$0x80;" |
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292 | #endif |
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293 | |||
294 | static inline void slow_down_io(void) { |
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295 | __asm__ __volatile__( |
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296 | __SLOW_DOWN_IO |
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297 | #ifdef REALLY_SLOW_IO |
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298 | __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO |
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299 | #endif |
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300 | : : ); |
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301 | } |
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302 | |||
303 | #ifdef CONFIG_X86_NUMAQ |
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304 | extern void *xquad_portio; /* Where the IO area was mapped */ |
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305 | #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port) |
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306 | #define __BUILDIO(bwl,bw,type) \ |
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307 | static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \ |
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308 | if (xquad_portio) \ |
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309 | write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \ |
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310 | else \ |
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311 | out##bwl##_local(value, port); \ |
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312 | } \ |
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313 | static inline void out##bwl(unsigned type value, int port) { \ |
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314 | out##bwl##_quad(value, port, 0); \ |
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315 | } \ |
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316 | static inline unsigned type in##bwl##_quad(int port, int quad) { \ |
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317 | if (xquad_portio) \ |
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318 | return read##bwl(XQUAD_PORT_ADDR(port, quad)); \ |
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319 | else \ |
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320 | return in##bwl##_local(port); \ |
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321 | } \ |
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322 | static inline unsigned type in##bwl(int port) { \ |
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323 | return in##bwl##_quad(port, 0); \ |
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324 | } |
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325 | #else |
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326 | #define __BUILDIO(bwl,bw,type) \ |
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327 | static inline void out##bwl(unsigned type value, int port) { \ |
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328 | out##bwl##_local(value, port); \ |
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329 | } \ |
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330 | static inline unsigned type in##bwl(int port) { \ |
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331 | return in##bwl##_local(port); \ |
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332 | } |
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333 | #endif |
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334 | |||
335 | |||
336 | #define BUILDIO(bwl,bw,type) \ |
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337 | static inline void out##bwl##_local(unsigned type value, int port) { \ |
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338 | __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \ |
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339 | } \ |
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340 | static inline unsigned type in##bwl##_local(int port) { \ |
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341 | unsigned type value; \ |
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342 | __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \ |
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343 | return value; \ |
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344 | } \ |
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345 | static inline void out##bwl##_local_p(unsigned type value, int port) { \ |
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346 | out##bwl##_local(value, port); \ |
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347 | slow_down_io(); \ |
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348 | } \ |
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349 | static inline unsigned type in##bwl##_local_p(int port) { \ |
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350 | unsigned type value = in##bwl##_local(port); \ |
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351 | slow_down_io(); \ |
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352 | return value; \ |
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353 | } \ |
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354 | __BUILDIO(bwl,bw,type) \ |
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355 | static inline void out##bwl##_p(unsigned type value, int port) { \ |
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356 | out##bwl(value, port); \ |
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357 | slow_down_io(); \ |
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358 | } \ |
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359 | static inline unsigned type in##bwl##_p(int port) { \ |
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360 | unsigned type value = in##bwl(port); \ |
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361 | slow_down_io(); \ |
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362 | return value; \ |
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363 | } \ |
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364 | static inline void outs##bwl(int port, const void *addr, unsigned long count) { \ |
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365 | __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \ |
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366 | } \ |
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367 | static inline void ins##bwl(int port, void *addr, unsigned long count) { \ |
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368 | __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \ |
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369 | } |
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370 | |||
371 | BUILDIO(b,b,char) |
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372 | BUILDIO(w,w,short) |
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373 | BUILDIO(l,,int) |
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374 | |||
375 | #endif |