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Rev | Author | Line No. | Line |
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424 | giacomo | 1 | /* |
2 | * This file should contain #defines for all of the interrupt vector |
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3 | * numbers used by this architecture. |
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4 | * |
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5 | * In addition, there are some standard defines: |
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6 | * |
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7 | * FIRST_EXTERNAL_VECTOR: |
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8 | * The first free place for external interrupts |
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9 | * |
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10 | * SYSCALL_VECTOR: |
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11 | * The IRQ vector a syscall makes the user to kernel transition |
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12 | * under. |
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13 | * |
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14 | * TIMER_IRQ: |
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15 | * The IRQ number the timer interrupt comes in at. |
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16 | * |
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17 | * NR_IRQS: |
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18 | * The total number of interrupt vectors (including all the |
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19 | * architecture specific interrupts) needed. |
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20 | * |
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21 | * NR_IRQ_VECTORS: |
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22 | * The total number of IO APIC vector inputs |
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23 | * |
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24 | */ |
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25 | #ifndef _ASM_IRQ_VECTORS_H |
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26 | #define _ASM_IRQ_VECTORS_H |
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27 | |||
28 | /* |
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29 | * IDT vectors usable for external interrupt sources start |
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30 | * at 0x20: |
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31 | */ |
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32 | #define FIRST_EXTERNAL_VECTOR 0x20 |
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33 | |||
34 | #define SYSCALL_VECTOR 0x80 |
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35 | |||
36 | /* |
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37 | * Vectors 0x20-0x2f are used for ISA interrupts. |
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38 | */ |
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39 | |||
40 | /* |
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41 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff |
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42 | * |
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43 | * some of the following vectors are 'rare', they are merged |
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44 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. |
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45 | * TLB, reschedule and local APIC vectors are performance-critical. |
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46 | * |
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47 | * Vectors 0xf0-0xfa are free (reserved for future Linux use). |
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48 | */ |
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49 | #define SPURIOUS_APIC_VECTOR 0xff |
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50 | #define ERROR_APIC_VECTOR 0xfe |
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51 | #define INVALIDATE_TLB_VECTOR 0xfd |
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52 | #define RESCHEDULE_VECTOR 0xfc |
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53 | #define CALL_FUNCTION_VECTOR 0xfb |
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54 | |||
55 | #define THERMAL_APIC_VECTOR 0xf0 |
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56 | /* |
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57 | * Local APIC timer IRQ vector is on a different priority level, |
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58 | * to work around the 'lost local interrupt if more than 2 IRQ |
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59 | * sources per level' errata. |
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60 | */ |
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61 | #define LOCAL_TIMER_VECTOR 0xef |
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62 | |||
63 | /* |
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64 | * First APIC vector available to drivers: (vectors 0x30-0xee) |
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65 | * we start at 0x31 to spread out vectors evenly between priority |
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66 | * levels. (0x80 is the syscall vector) |
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67 | */ |
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68 | #define FIRST_DEVICE_VECTOR 0x31 |
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69 | #define FIRST_SYSTEM_VECTOR 0xef |
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70 | |||
71 | #define TIMER_IRQ 0 |
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72 | |||
73 | /* |
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74 | * 16 8259A IRQ's, 208 potential APIC interrupt sources. |
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75 | * Right now the APIC is mostly only used for SMP. |
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76 | * 256 vectors is an architectural limit. (we can have |
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77 | * more than 256 devices theoretically, but they will |
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78 | * have to use shared interrupts) |
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79 | * Since vectors 0x00-0x1f are used/reserved for the CPU, |
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80 | * the usable vector space is 0x20-0xff (224 vectors) |
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81 | */ |
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82 | #ifdef CONFIG_X86_IO_APIC |
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83 | #define NR_IRQS 224 |
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84 | #else |
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85 | #define NR_IRQS 16 |
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86 | #endif |
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87 | |||
88 | #define NR_IRQ_VECTORS NR_IRQS |
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89 | |||
90 | #define FPU_IRQ 8 |
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91 | |||
92 | #define FIRST_VM86_IRQ 2 |
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93 | #define LAST_VM86_IRQ 15 |
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94 | #define invalid_vm86_irq(irq) ((irq) < 2 || (irq) == 7 || (irq) > 15) |
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95 | |||
96 | #endif /* _ASM_IRQ_VECTORS_H */ |
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97 | |||
98 |