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| Rev | Author | Line No. | Line |
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| 422 | giacomo | 1 | #ifndef __ASM_MPSPEC_DEF_H |
| 2 | #define __ASM_MPSPEC_DEF_H |
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| 3 | |||
| 4 | /* |
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| 5 | * Structure definitions for SMP machines following the |
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| 6 | * Intel Multiprocessing Specification 1.1 and 1.4. |
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| 7 | */ |
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| 8 | |||
| 9 | /* |
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| 10 | * This tag identifies where the SMP configuration |
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| 11 | * information is. |
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| 12 | */ |
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| 13 | |||
| 14 | #define SMP_MAGIC_IDENT (('_'<<24)|('P'<<16)|('M'<<8)|'_') |
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| 15 | |||
| 16 | #define MAX_MPC_ENTRY 1024 |
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| 17 | |||
| 18 | struct intel_mp_floating |
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| 19 | { |
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| 20 | char mpf_signature[4]; /* "_MP_" */ |
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| 21 | unsigned long mpf_physptr; /* Configuration table address */ |
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| 22 | unsigned char mpf_length; /* Our length (paragraphs) */ |
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| 23 | unsigned char mpf_specification;/* Specification version */ |
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| 24 | unsigned char mpf_checksum; /* Checksum (makes sum 0) */ |
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| 25 | unsigned char mpf_feature1; /* Standard or configuration ? */ |
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| 26 | unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */ |
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| 27 | unsigned char mpf_feature3; /* Unused (0) */ |
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| 28 | unsigned char mpf_feature4; /* Unused (0) */ |
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| 29 | unsigned char mpf_feature5; /* Unused (0) */ |
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| 30 | }; |
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| 31 | |||
| 32 | struct mp_config_table |
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| 33 | { |
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| 34 | char mpc_signature[4]; |
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| 35 | #define MPC_SIGNATURE "PCMP" |
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| 36 | unsigned short mpc_length; /* Size of table */ |
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| 37 | char mpc_spec; /* 0x01 */ |
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| 38 | char mpc_checksum; |
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| 39 | char mpc_oem[8]; |
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| 40 | char mpc_productid[12]; |
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| 41 | unsigned long mpc_oemptr; /* 0 if not present */ |
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| 42 | unsigned short mpc_oemsize; /* 0 if not present */ |
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| 43 | unsigned short mpc_oemcount; |
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| 44 | unsigned long mpc_lapic; /* APIC address */ |
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| 45 | unsigned long reserved; |
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| 46 | }; |
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| 47 | |||
| 48 | /* Followed by entries */ |
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| 49 | |||
| 50 | #define MP_PROCESSOR 0 |
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| 51 | #define MP_BUS 1 |
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| 52 | #define MP_IOAPIC 2 |
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| 53 | #define MP_INTSRC 3 |
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| 54 | #define MP_LINTSRC 4 |
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| 55 | #define MP_TRANSLATION 192 /* Used by IBM NUMA-Q to describe node locality */ |
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| 56 | |||
| 57 | struct mpc_config_processor |
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| 58 | { |
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| 59 | unsigned char mpc_type; |
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| 60 | unsigned char mpc_apicid; /* Local APIC number */ |
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| 61 | unsigned char mpc_apicver; /* Its versions */ |
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| 62 | unsigned char mpc_cpuflag; |
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| 63 | #define CPU_ENABLED 1 /* Processor is available */ |
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| 64 | #define CPU_BOOTPROCESSOR 2 /* Processor is the BP */ |
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| 65 | unsigned long mpc_cpufeature; |
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| 66 | #define CPU_STEPPING_MASK 0x0F |
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| 67 | #define CPU_MODEL_MASK 0xF0 |
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| 68 | #define CPU_FAMILY_MASK 0xF00 |
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| 69 | unsigned long mpc_featureflag; /* CPUID feature value */ |
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| 70 | unsigned long mpc_reserved[2]; |
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| 71 | }; |
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| 72 | |||
| 73 | struct mpc_config_bus |
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| 74 | { |
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| 75 | unsigned char mpc_type; |
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| 76 | unsigned char mpc_busid; |
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| 77 | unsigned char mpc_bustype[6] __attribute((packed)); |
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| 78 | }; |
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| 79 | |||
| 80 | /* List of Bus Type string values, Intel MP Spec. */ |
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| 81 | #define BUSTYPE_EISA "EISA" |
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| 82 | #define BUSTYPE_ISA "ISA" |
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| 83 | #define BUSTYPE_INTERN "INTERN" /* Internal BUS */ |
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| 84 | #define BUSTYPE_MCA "MCA" |
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| 85 | #define BUSTYPE_VL "VL" /* Local bus */ |
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| 86 | #define BUSTYPE_PCI "PCI" |
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| 87 | #define BUSTYPE_PCMCIA "PCMCIA" |
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| 88 | #define BUSTYPE_CBUS "CBUS" |
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| 89 | #define BUSTYPE_CBUSII "CBUSII" |
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| 90 | #define BUSTYPE_FUTURE "FUTURE" |
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| 91 | #define BUSTYPE_MBI "MBI" |
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| 92 | #define BUSTYPE_MBII "MBII" |
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| 93 | #define BUSTYPE_MPI "MPI" |
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| 94 | #define BUSTYPE_MPSA "MPSA" |
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| 95 | #define BUSTYPE_NUBUS "NUBUS" |
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| 96 | #define BUSTYPE_TC "TC" |
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| 97 | #define BUSTYPE_VME "VME" |
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| 98 | #define BUSTYPE_XPRESS "XPRESS" |
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| 99 | #define BUSTYPE_NEC98 "NEC98" |
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| 100 | |||
| 101 | struct mpc_config_ioapic |
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| 102 | { |
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| 103 | unsigned char mpc_type; |
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| 104 | unsigned char mpc_apicid; |
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| 105 | unsigned char mpc_apicver; |
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| 106 | unsigned char mpc_flags; |
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| 107 | #define MPC_APIC_USABLE 0x01 |
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| 108 | unsigned long mpc_apicaddr; |
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| 109 | }; |
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| 110 | |||
| 111 | struct mpc_config_intsrc |
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| 112 | { |
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| 113 | unsigned char mpc_type; |
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| 114 | unsigned char mpc_irqtype; |
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| 115 | unsigned short mpc_irqflag; |
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| 116 | unsigned char mpc_srcbus; |
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| 117 | unsigned char mpc_srcbusirq; |
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| 118 | unsigned char mpc_dstapic; |
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| 119 | unsigned char mpc_dstirq; |
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| 120 | }; |
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| 121 | |||
| 122 | enum mp_irq_source_types { |
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| 123 | mp_INT = 0, |
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| 124 | mp_NMI = 1, |
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| 125 | mp_SMI = 2, |
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| 126 | mp_ExtINT = 3 |
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| 127 | }; |
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| 128 | |||
| 129 | #define MP_IRQDIR_DEFAULT 0 |
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| 130 | #define MP_IRQDIR_HIGH 1 |
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| 131 | #define MP_IRQDIR_LOW 3 |
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| 132 | |||
| 133 | |||
| 134 | struct mpc_config_lintsrc |
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| 135 | { |
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| 136 | unsigned char mpc_type; |
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| 137 | unsigned char mpc_irqtype; |
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| 138 | unsigned short mpc_irqflag; |
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| 139 | unsigned char mpc_srcbusid; |
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| 140 | unsigned char mpc_srcbusirq; |
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| 141 | unsigned char mpc_destapic; |
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| 142 | #define MP_APIC_ALL 0xFF |
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| 143 | unsigned char mpc_destapiclint; |
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| 144 | }; |
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| 145 | |||
| 146 | struct mp_config_oemtable |
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| 147 | { |
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| 148 | char oem_signature[4]; |
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| 149 | #define MPC_OEM_SIGNATURE "_OEM" |
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| 150 | unsigned short oem_length; /* Size of table */ |
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| 151 | char oem_rev; /* 0x01 */ |
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| 152 | char oem_checksum; |
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| 153 | char mpc_oem[8]; |
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| 154 | }; |
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| 155 | |||
| 156 | struct mpc_config_translation |
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| 157 | { |
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| 158 | unsigned char mpc_type; |
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| 159 | unsigned char trans_len; |
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| 160 | unsigned char trans_type; |
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| 161 | unsigned char trans_quad; |
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| 162 | unsigned char trans_global; |
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| 163 | unsigned char trans_local; |
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| 164 | unsigned short trans_reserved; |
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| 165 | }; |
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| 166 | |||
| 167 | /* |
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| 168 | * Default configurations |
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| 169 | * |
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| 170 | * 1 2 CPU ISA 82489DX |
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| 171 | * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining |
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| 172 | * 3 2 CPU EISA 82489DX |
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| 173 | * 4 2 CPU MCA 82489DX |
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| 174 | * 5 2 CPU ISA+PCI |
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| 175 | * 6 2 CPU EISA+PCI |
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| 176 | * 7 2 CPU MCA+PCI |
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| 177 | */ |
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| 178 | |||
| 179 | enum mp_bustype { |
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| 180 | MP_BUS_ISA = 1, |
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| 181 | MP_BUS_EISA, |
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| 182 | MP_BUS_PCI, |
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| 183 | MP_BUS_MCA, |
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| 184 | MP_BUS_NEC98 |
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| 185 | }; |
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| 186 | #endif |
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| 187 |