Rev 422 | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
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| 422 | giacomo | 1 | /* |
| 2 | * Written by: Patricia Gaughen, IBM Corporation |
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| 3 | * |
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| 4 | * Copyright (C) 2002, IBM Corp. |
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| 5 | * |
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| 6 | * All rights reserved. |
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| 7 | * |
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| 8 | * This program is free software; you can redistribute it and/or modify |
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| 9 | * it under the terms of the GNU General Public License as published by |
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| 10 | * the Free Software Foundation; either version 2 of the License, or |
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| 11 | * (at your option) any later version. |
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| 12 | * |
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| 13 | * This program is distributed in the hope that it will be useful, but |
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| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 15 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or |
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| 16 | * NON INFRINGEMENT. See the GNU General Public License for more |
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| 17 | * details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with this program; if not, write to the Free Software |
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| 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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| 22 | * |
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| 23 | * Send feedback to <gone@us.ibm.com> |
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| 24 | */ |
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| 25 | |||
| 26 | #ifndef NUMAQ_H |
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| 27 | #define NUMAQ_H |
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| 28 | |||
| 29 | #ifdef CONFIG_X86_NUMAQ |
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| 30 | |||
| 31 | extern int get_memcfg_numaq(void); |
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| 32 | |||
| 33 | /* |
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| 34 | * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the |
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| 35 | */ |
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| 36 | #define SYS_CFG_DATA_PRIV_ADDR 0x0009d000 /* place for scd in private quad space */ |
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| 37 | |||
| 38 | /* |
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| 39 | * Communication area for each processor on lynxer-processor tests. |
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| 40 | * |
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| 41 | * NOTE: If you change the size of this eachproc structure you need |
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| 42 | * to change the definition for EACH_QUAD_SIZE. |
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| 43 | */ |
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| 44 | struct eachquadmem { |
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| 45 | unsigned int priv_mem_start; /* Starting address of this */ |
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| 46 | /* quad's private memory. */ |
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| 47 | /* This is always 0. */ |
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| 48 | /* In MB. */ |
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| 49 | unsigned int priv_mem_size; /* Size of this quad's */ |
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| 50 | /* private memory. */ |
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| 51 | /* In MB. */ |
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| 52 | unsigned int low_shrd_mem_strp_start;/* Starting address of this */ |
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| 53 | /* quad's low shared block */ |
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| 54 | /* (untranslated). */ |
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| 55 | /* In MB. */ |
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| 56 | unsigned int low_shrd_mem_start; /* Starting address of this */ |
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| 57 | /* quad's low shared memory */ |
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| 58 | /* (untranslated). */ |
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| 59 | /* In MB. */ |
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| 60 | unsigned int low_shrd_mem_size; /* Size of this quad's low */ |
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| 61 | /* shared memory. */ |
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| 62 | /* In MB. */ |
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| 63 | unsigned int lmmio_copb_start; /* Starting address of this */ |
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| 64 | /* quad's local memory */ |
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| 65 | /* mapped I/O in the */ |
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| 66 | /* compatibility OPB. */ |
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| 67 | /* In MB. */ |
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| 68 | unsigned int lmmio_copb_size; /* Size of this quad's local */ |
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| 69 | /* memory mapped I/O in the */ |
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| 70 | /* compatibility OPB. */ |
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| 71 | /* In MB. */ |
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| 72 | unsigned int lmmio_nopb_start; /* Starting address of this */ |
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| 73 | /* quad's local memory */ |
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| 74 | /* mapped I/O in the */ |
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| 75 | /* non-compatibility OPB. */ |
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| 76 | /* In MB. */ |
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| 77 | unsigned int lmmio_nopb_size; /* Size of this quad's local */ |
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| 78 | /* memory mapped I/O in the */ |
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| 79 | /* non-compatibility OPB. */ |
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| 80 | /* In MB. */ |
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| 81 | unsigned int io_apic_0_start; /* Starting address of I/O */ |
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| 82 | /* APIC 0. */ |
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| 83 | unsigned int io_apic_0_sz; /* Size I/O APIC 0. */ |
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| 84 | unsigned int io_apic_1_start; /* Starting address of I/O */ |
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| 85 | /* APIC 1. */ |
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| 86 | unsigned int io_apic_1_sz; /* Size I/O APIC 1. */ |
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| 87 | unsigned int hi_shrd_mem_start; /* Starting address of this */ |
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| 88 | /* quad's high shared memory.*/ |
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| 89 | /* In MB. */ |
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| 90 | unsigned int hi_shrd_mem_size; /* Size of this quad's high */ |
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| 91 | /* shared memory. */ |
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| 92 | /* In MB. */ |
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| 93 | unsigned int mps_table_addr; /* Address of this quad's */ |
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| 94 | /* MPS tables from BIOS, */ |
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| 95 | /* in system space.*/ |
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| 96 | unsigned int lcl_MDC_pio_addr; /* Port-I/O address for */ |
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| 97 | /* local access of MDC. */ |
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| 98 | unsigned int rmt_MDC_mmpio_addr; /* MM-Port-I/O address for */ |
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| 99 | /* remote access of MDC. */ |
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| 100 | unsigned int mm_port_io_start; /* Starting address of this */ |
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| 101 | /* quad's memory mapped Port */ |
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| 102 | /* I/O space. */ |
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| 103 | unsigned int mm_port_io_size; /* Size of this quad's memory*/ |
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| 104 | /* mapped Port I/O space. */ |
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| 105 | unsigned int mm_rmt_io_apic_start; /* Starting address of this */ |
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| 106 | /* quad's memory mapped */ |
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| 107 | /* remote I/O APIC space. */ |
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| 108 | unsigned int mm_rmt_io_apic_size; /* Size of this quad's memory*/ |
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| 109 | /* mapped remote I/O APIC */ |
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| 110 | /* space. */ |
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| 111 | unsigned int mm_isa_start; /* Starting address of this */ |
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| 112 | /* quad's memory mapped ISA */ |
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| 113 | /* space (contains MDC */ |
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| 114 | /* memory space). */ |
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| 115 | unsigned int mm_isa_size; /* Size of this quad's memory*/ |
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| 116 | /* mapped ISA space (contains*/ |
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| 117 | /* MDC memory space). */ |
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| 118 | unsigned int rmt_qmi_addr; /* Remote addr to access QMI.*/ |
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| 119 | unsigned int lcl_qmi_addr; /* Local addr to access QMI. */ |
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| 120 | }; |
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| 121 | |||
| 122 | /* |
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| 123 | * Note: This structure must be NOT be changed unless the multiproc and |
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| 124 | * OS are changed to reflect the new structure. |
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| 125 | */ |
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| 126 | struct sys_cfg_data { |
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| 127 | unsigned int quad_id; |
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| 128 | unsigned int bsp_proc_id; /* Boot Strap Processor in this quad. */ |
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| 129 | unsigned int scd_version; /* Version number of this table. */ |
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| 130 | unsigned int first_quad_id; |
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| 131 | unsigned int quads_present31_0; /* 1 bit for each quad */ |
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| 132 | unsigned int quads_present63_32; /* 1 bit for each quad */ |
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| 133 | unsigned int config_flags; |
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| 134 | unsigned int boot_flags; |
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| 135 | unsigned int csr_start_addr; /* Absolute value (not in MB) */ |
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| 136 | unsigned int csr_size; /* Absolute value (not in MB) */ |
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| 137 | unsigned int lcl_apic_start_addr; /* Absolute value (not in MB) */ |
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| 138 | unsigned int lcl_apic_size; /* Absolute value (not in MB) */ |
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| 139 | unsigned int low_shrd_mem_base; /* 0 or 512MB or 1GB */ |
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| 140 | unsigned int low_shrd_mem_quad_offset; /* 0,128M,256M,512M,1G */ |
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| 141 | /* may not be totally populated */ |
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| 142 | unsigned int split_mem_enbl; /* 0 for no low shared memory */ |
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| 143 | unsigned int mmio_sz; /* Size of total system memory mapped I/O */ |
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| 144 | /* (in MB). */ |
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| 145 | unsigned int quad_spin_lock; /* Spare location used for quad */ |
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| 146 | /* bringup. */ |
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| 147 | unsigned int nonzero55; /* For checksumming. */ |
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| 148 | unsigned int nonzeroaa; /* For checksumming. */ |
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| 149 | unsigned int scd_magic_number; |
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| 150 | unsigned int system_type; |
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| 151 | unsigned int checksum; |
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| 152 | /* |
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| 153 | * memory configuration area for each quad |
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| 154 | */ |
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| 155 | struct eachquadmem eq[MAX_NUMNODES]; /* indexed by quad id */ |
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| 156 | }; |
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| 157 | |||
| 158 | static inline unsigned long *get_zholes_size(int nid) |
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| 159 | { |
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| 160 | return NULL; |
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| 161 | } |
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| 162 | #endif /* CONFIG_X86_NUMAQ */ |
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| 163 | #endif /* NUMAQ_H */ |
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| 164 |