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Rev | Author | Line No. | Line |
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422 | giacomo | 1 | /* |
2 | * linux/include/asm-i386/timex.h |
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3 | * |
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4 | * i386 architecture timex specifications |
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5 | */ |
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6 | #ifndef _ASMi386_TIMEX_H |
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7 | #define _ASMi386_TIMEX_H |
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8 | |||
9 | #include <linux/config.h> |
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10 | #include <asm/msr.h> |
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11 | |||
12 | #ifdef CONFIG_X86_PC9800 |
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13 | extern int CLOCK_TICK_RATE; |
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14 | #else |
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15 | #ifdef CONFIG_MELAN |
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16 | # define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ |
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17 | #else |
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18 | # define CLOCK_TICK_RATE 1193182 /* Underlying HZ */ |
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19 | #endif |
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20 | #endif |
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21 | |||
22 | #define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */ |
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23 | #define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \ |
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24 | (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \ |
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25 | << (SHIFT_SCALE-SHIFT_HZ)) / HZ) |
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26 | |||
27 | /* |
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28 | * Standard way to access the cycle counter on i586+ CPUs. |
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29 | * Currently only used on SMP. |
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30 | * |
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31 | * If you really have a SMP machine with i486 chips or older, |
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32 | * compile for that, and this will just always return zero. |
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33 | * That's ok, it just means that the nicer scheduling heuristics |
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34 | * won't work for you. |
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35 | * |
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36 | * We only use the low 32 bits, and we'd simply better make sure |
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37 | * that we reschedule before that wraps. Scheduling at least every |
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38 | * four billion cycles just basically sounds like a good idea, |
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39 | * regardless of how fast the machine is. |
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40 | */ |
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41 | typedef unsigned long long cycles_t; |
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42 | |||
43 | extern cycles_t cacheflush_time; |
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44 | |||
45 | static inline cycles_t get_cycles (void) |
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46 | { |
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47 | #ifndef CONFIG_X86_TSC |
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48 | return 0; |
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49 | #else |
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50 | unsigned long long ret; |
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51 | |||
52 | rdtscll(ret); |
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53 | return ret; |
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54 | #endif |
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55 | } |
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56 | |||
57 | extern unsigned long cpu_khz; |
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58 | |||
59 | #endif |