Rev 422 | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
422 | giacomo | 1 | /* |
2 | * serial167.h |
||
3 | * |
||
4 | * Richard Hirst [richard@sleepie.demon.co.uk] |
||
5 | * |
||
6 | * Based on cyclades.h |
||
7 | */ |
||
8 | |||
9 | struct cyclades_monitor { |
||
10 | unsigned long int_count; |
||
11 | unsigned long char_count; |
||
12 | unsigned long char_max; |
||
13 | unsigned long char_last; |
||
14 | }; |
||
15 | |||
16 | /* |
||
17 | * This is our internal structure for each serial port's state. |
||
18 | * |
||
19 | * Many fields are paralleled by the structure used by the serial_struct |
||
20 | * structure. |
||
21 | * |
||
22 | * For definitions of the flags field, see tty.h |
||
23 | */ |
||
24 | |||
25 | struct cyclades_port { |
||
26 | int magic; |
||
27 | int type; |
||
28 | int card; |
||
29 | int line; |
||
30 | int flags; /* defined in tty.h */ |
||
31 | struct tty_struct *tty; |
||
32 | int read_status_mask; |
||
33 | int timeout; |
||
34 | int xmit_fifo_size; |
||
35 | int cor1,cor2,cor3,cor4,cor5,cor6,cor7; |
||
36 | int tbpr,tco,rbpr,rco; |
||
37 | int ignore_status_mask; |
||
38 | int close_delay; |
||
39 | int IER; /* Interrupt Enable Register */ |
||
40 | unsigned long event; |
||
41 | unsigned long last_active; |
||
42 | int count; /* # of fd on device */ |
||
43 | int x_char; /* to be pushed out ASAP */ |
||
44 | int x_break; |
||
45 | int blocked_open; /* # of blocked opens */ |
||
46 | unsigned char *xmit_buf; |
||
47 | int xmit_head; |
||
48 | int xmit_tail; |
||
49 | int xmit_cnt; |
||
50 | int default_threshold; |
||
51 | int default_timeout; |
||
52 | struct work_struct tqueue; |
||
53 | wait_queue_head_t open_wait; |
||
54 | wait_queue_head_t close_wait; |
||
55 | struct cyclades_monitor mon; |
||
56 | }; |
||
57 | |||
58 | #define CYCLADES_MAGIC 0x4359 |
||
59 | |||
60 | #define CYGETMON 0x435901 |
||
61 | #define CYGETTHRESH 0x435902 |
||
62 | #define CYSETTHRESH 0x435903 |
||
63 | #define CYGETDEFTHRESH 0x435904 |
||
64 | #define CYSETDEFTHRESH 0x435905 |
||
65 | #define CYGETTIMEOUT 0x435906 |
||
66 | #define CYSETTIMEOUT 0x435907 |
||
67 | #define CYGETDEFTIMEOUT 0x435908 |
||
68 | #define CYSETDEFTIMEOUT 0x435909 |
||
69 | |||
70 | /* |
||
71 | * Events are used to schedule things to happen at timer-interrupt |
||
72 | * time, instead of at cy interrupt time. |
||
73 | */ |
||
74 | #define Cy_EVENT_READ_PROCESS 0 |
||
75 | #define Cy_EVENT_WRITE_WAKEUP 1 |
||
76 | #define Cy_EVENT_HANGUP 2 |
||
77 | #define Cy_EVENT_BREAK 3 |
||
78 | #define Cy_EVENT_OPEN_WAKEUP 4 |
||
79 | |||
80 | |||
81 | |||
82 | #define CyMaxChipsPerCard 1 |
||
83 | |||
84 | /**** cd2401 registers ****/ |
||
85 | |||
86 | #define CyGFRCR (0x81) |
||
87 | #define CyCCR (0x13) |
||
88 | #define CyCLR_CHAN (0x40) |
||
89 | #define CyINIT_CHAN (0x20) |
||
90 | #define CyCHIP_RESET (0x10) |
||
91 | #define CyENB_XMTR (0x08) |
||
92 | #define CyDIS_XMTR (0x04) |
||
93 | #define CyENB_RCVR (0x02) |
||
94 | #define CyDIS_RCVR (0x01) |
||
95 | #define CyCAR (0xee) |
||
96 | #define CyIER (0x11) |
||
97 | #define CyMdmCh (0x80) |
||
98 | #define CyRxExc (0x20) |
||
99 | #define CyRxData (0x08) |
||
100 | #define CyTxMpty (0x02) |
||
101 | #define CyTxRdy (0x01) |
||
102 | #define CyLICR (0x26) |
||
103 | #define CyRISR (0x89) |
||
104 | #define CyTIMEOUT (0x80) |
||
105 | #define CySPECHAR (0x70) |
||
106 | #define CyOVERRUN (0x08) |
||
107 | #define CyPARITY (0x04) |
||
108 | #define CyFRAME (0x02) |
||
109 | #define CyBREAK (0x01) |
||
110 | #define CyREOIR (0x84) |
||
111 | #define CyTEOIR (0x85) |
||
112 | #define CyMEOIR (0x86) |
||
113 | #define CyNOTRANS (0x08) |
||
114 | #define CyRFOC (0x30) |
||
115 | #define CyRDR (0xf8) |
||
116 | #define CyTDR (0xf8) |
||
117 | #define CyMISR (0x8b) |
||
118 | #define CyRISR (0x89) |
||
119 | #define CyTISR (0x8a) |
||
120 | #define CyMSVR1 (0xde) |
||
121 | #define CyMSVR2 (0xdf) |
||
122 | #define CyDSR (0x80) |
||
123 | #define CyDCD (0x40) |
||
124 | #define CyCTS (0x20) |
||
125 | #define CyDTR (0x02) |
||
126 | #define CyRTS (0x01) |
||
127 | #define CyRTPRL (0x25) |
||
128 | #define CyRTPRH (0x24) |
||
129 | #define CyCOR1 (0x10) |
||
130 | #define CyPARITY_NONE (0x00) |
||
131 | #define CyPARITY_E (0x40) |
||
132 | #define CyPARITY_O (0xC0) |
||
133 | #define Cy_5_BITS (0x04) |
||
134 | #define Cy_6_BITS (0x05) |
||
135 | #define Cy_7_BITS (0x06) |
||
136 | #define Cy_8_BITS (0x07) |
||
137 | #define CyCOR2 (0x17) |
||
138 | #define CyETC (0x20) |
||
139 | #define CyCtsAE (0x02) |
||
140 | #define CyCOR3 (0x16) |
||
141 | #define Cy_1_STOP (0x02) |
||
142 | #define Cy_2_STOP (0x04) |
||
143 | #define CyCOR4 (0x15) |
||
144 | #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */ |
||
145 | #define CyCOR5 (0x14) |
||
146 | #define CyCOR6 (0x18) |
||
147 | #define CyCOR7 (0x07) |
||
148 | #define CyRBPR (0xcb) |
||
149 | #define CyRCOR (0xc8) |
||
150 | #define CyTBPR (0xc3) |
||
151 | #define CyTCOR (0xc0) |
||
152 | #define CySCHR1 (0x1f) |
||
153 | #define CySCHR2 (0x1e) |
||
154 | #define CyTPR (0xda) |
||
155 | #define CyPILR1 (0xe3) |
||
156 | #define CyPILR2 (0xe0) |
||
157 | #define CyPILR3 (0xe1) |
||
158 | #define CyCMR (0x1b) |
||
159 | #define CyASYNC (0x02) |
||
160 | #define CyLICR (0x26) |
||
161 | #define CyLIVR (0x09) |
||
162 | #define CySCRL (0x23) |
||
163 | #define CySCRH (0x22) |
||
164 | #define CyTFTC (0x80) |
||
165 | |||
166 | |||
167 | /* max number of chars in the FIFO */ |
||
168 | |||
169 | #define CyMAX_CHAR_FIFO 12 |
||
170 | |||
171 | /***************************************************************************/ |