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Rev | Author | Line No. | Line |
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587 | giacomo | 1 | /* |
2 | * numa.c - Low-level PCI access for NUMA-Q machines |
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3 | */ |
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4 | |||
5 | #include <linux/pci.h> |
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6 | #include <linux/init.h> |
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7 | #include "pci.h" |
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8 | |||
9 | #define BUS2QUAD(global) (mp_bus_id_to_node[global]) |
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10 | #define BUS2LOCAL(global) (mp_bus_id_to_local[global]) |
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11 | #define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local]) |
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12 | |||
13 | #define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \ |
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14 | (0x80000000 | (BUS2LOCAL(bus) << 16) | (devfn << 8) | (reg & ~3)) |
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15 | |||
16 | static int pci_conf1_mq_read (int seg, int bus, int devfn, int reg, int len, u32 *value) |
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17 | { |
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18 | unsigned long flags; |
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19 | |||
20 | if (!value || (bus > MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) |
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21 | return -EINVAL; |
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22 | |||
23 | spin_lock_irqsave(&pci_config_lock, flags); |
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24 | |||
25 | outl_quad(PCI_CONF1_MQ_ADDRESS(bus, devfn, reg), 0xCF8, BUS2QUAD(bus)); |
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26 | |||
27 | switch (len) { |
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28 | case 1: |
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29 | *value = inb_quad(0xCFC + (reg & 3), BUS2QUAD(bus)); |
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30 | break; |
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31 | case 2: |
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32 | *value = inw_quad(0xCFC + (reg & 2), BUS2QUAD(bus)); |
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33 | break; |
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34 | case 4: |
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35 | *value = inl_quad(0xCFC, BUS2QUAD(bus)); |
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36 | break; |
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37 | } |
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38 | |||
39 | spin_unlock_irqrestore(&pci_config_lock, flags); |
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40 | |||
41 | return 0; |
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42 | } |
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43 | |||
44 | static int pci_conf1_mq_write (int seg, int bus, int devfn, int reg, int len, u32 value) |
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45 | { |
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46 | unsigned long flags; |
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47 | |||
48 | if ((bus > MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) |
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49 | return -EINVAL; |
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50 | |||
51 | spin_lock_irqsave(&pci_config_lock, flags); |
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52 | |||
53 | outl_quad(PCI_CONF1_MQ_ADDRESS(bus, devfn, reg), 0xCF8, BUS2QUAD(bus)); |
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54 | |||
55 | switch (len) { |
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56 | case 1: |
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57 | outb_quad((u8)value, 0xCFC + (reg & 3), BUS2QUAD(bus)); |
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58 | break; |
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59 | case 2: |
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60 | outw_quad((u16)value, 0xCFC + (reg & 2), BUS2QUAD(bus)); |
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61 | break; |
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62 | case 4: |
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63 | outl_quad((u32)value, 0xCFC, BUS2QUAD(bus)); |
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64 | break; |
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65 | } |
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66 | |||
67 | spin_unlock_irqrestore(&pci_config_lock, flags); |
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68 | |||
69 | return 0; |
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70 | } |
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71 | |||
72 | #undef PCI_CONF1_MQ_ADDRESS |
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73 | |||
74 | static struct pci_raw_ops pci_direct_conf1_mq = { |
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75 | .read = pci_conf1_mq_read, |
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76 | .write = pci_conf1_mq_write |
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77 | }; |
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78 | |||
79 | |||
80 | static void __devinit pci_fixup_i450nx(struct pci_dev *d) |
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81 | { |
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82 | /* |
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83 | * i450NX -- Find and scan all secondary buses on all PXB's. |
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84 | */ |
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85 | int pxb, reg; |
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86 | u8 busno, suba, subb; |
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87 | int quad = BUS2QUAD(d->bus->number); |
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88 | |||
89 | printk("PCI: Searching for i450NX host bridges on %s\n", pci_name(d)); |
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90 | reg = 0xd0; |
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91 | for(pxb=0; pxb<2; pxb++) { |
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92 | pci_read_config_byte(d, reg++, &busno); |
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93 | pci_read_config_byte(d, reg++, &suba); |
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94 | pci_read_config_byte(d, reg++, &subb); |
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95 | DBG("i450NX PXB %d: %02x/%02x/%02x\n", pxb, busno, suba, subb); |
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96 | if (busno) |
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97 | pci_scan_bus(QUADLOCAL2BUS(quad,busno), &pci_root_ops, NULL); /* Bus A */ |
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98 | if (suba < subb) |
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99 | pci_scan_bus(QUADLOCAL2BUS(quad,suba+1), &pci_root_ops, NULL); /* Bus B */ |
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100 | } |
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101 | pcibios_last_bus = -1; |
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102 | } |
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103 | |||
104 | struct pci_fixup pcibios_fixups[] = { |
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105 | { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, pci_fixup_i450nx }, |
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106 | }; |
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107 | |||
108 | static int __init pci_numa_init(void) |
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109 | { |
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110 | int quad; |
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111 | |||
112 | raw_pci_ops = &pci_direct_conf1_mq; |
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113 | |||
114 | if (pcibios_scanned++) |
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115 | return 0; |
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116 | |||
117 | pci_root_bus = pcibios_scan_root(0); |
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118 | if (numnodes > 1) { |
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119 | for (quad = 1; quad < numnodes; ++quad) { |
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120 | printk("Scanning PCI bus %d for quad %d\n", |
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121 | QUADLOCAL2BUS(quad,0), quad); |
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122 | pci_scan_bus(QUADLOCAL2BUS(quad,0), |
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123 | &pci_root_ops, NULL); |
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124 | } |
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125 | } |
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126 | return 0; |
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127 | } |
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128 | |||
129 | subsys_initcall(pci_numa_init); |