WebSVN - shark - Blame - Rev 1618 - /shark/branches/xen/drivers/usb/host/ehci-q.c

Rev	Author	Line No.	Line
846	giacomo	1	/*
		2	* Copyright (c) 2001-2002 by David Brownell
		3	*
		4	* This program is free software; you can redistribute it and/or modify it
		5	* under the terms of the GNU General Public License as published by the
		6	* Free Software Foundation; either version 2 of the License, or (at your
		7	* option) any later version.
		8	*
		9	* This program is distributed in the hope that it will be useful, but
		10	* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
		11	* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
		12	* for more details.
		13	*
		14	* You should have received a copy of the GNU General Public License
		15	* along with this program; if not, write to the Free Software Foundation,
		16	* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
		17	*/
		18
		19	/* this file is part of ehci-hcd.c */
		20
		21	/-------------------------------------------------------------------------/
		22
		23	/*
		24	* EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
		25	*
		26	* Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
		27	* entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
		28	* buffers needed for the larger number). We use one QH per endpoint, queue
		29	* multiple urbs (all three types) per endpoint. URBs may need several qtds.
		30	*
		31	* ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
		32	* interrupts) needs careful scheduling. Performance improvements can be
		33	* an ongoing challenge. That's in "ehci-sched.c".
		34	*
		35	* USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
		36	* or otherwise through transaction translators (TTs) in USB 2.0 hubs using
		37	* (b) special fields in qh entries or (c) split iso entries. TTs will
		38	* buffer low/full speed data so the host collects it at high speed.
		39	*/
		40
		41	/-------------------------------------------------------------------------/
		42
		43	/* fill a qtd, returning how much of the buffer we were able to queue up */
		44
		45	static int
		46	qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
		47	int token, int maxpacket)
		48	{
		49	int i, count;
		50	u64 addr = buf;
		51
		52	/* one buffer entry per 4K ... first might be short or unaligned */
		53	qtd->hw_buf [0] = cpu_to_le32 ((u32)addr);
		54	qtd->hw_buf_hi [0] = cpu_to_le32 ((u32)(addr >> 32));
		55	count = 0x1000 - (buf & 0x0fff); /* rest of that page */
		56	if (likely (len < count)) /* ... iff needed */
		57	count = len;
		58	else {
		59	buf += 0x1000;
		60	buf &= ~0x0fff;
		61
		62	/* per-qtd limit: from 16K to 20K (best alignment) */
		63	for (i = 1; count < len && i < 5; i++) {
		64	addr = buf;
		65	qtd->hw_buf [i] = cpu_to_le32 ((u32)addr);
		66	qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32));
		67	buf += 0x1000;
		68	if ((count + 0x1000) < len)
		69	count += 0x1000;
		70	else
		71	count = len;
		72	}
		73
		74	/* short packets may only terminate transfers */
		75	if (count != len)
		76	count -= (count % maxpacket);
		77	}
		78	qtd->hw_token = cpu_to_le32 ((count << 16) \| token);
		79	qtd->length = count;
		80
		81	return count;
		82	}
		83
		84	/-------------------------------------------------------------------------/
		85
		86	/* update halted (but potentially linked) qh */
		87
		88	static inline void
		89	qh_update (struct ehci_hcd ehci, struct ehci_qh qh, struct ehci_qtd *qtd)
		90	{
		91	qh->hw_qtd_next = QTD_NEXT (qtd->qtd_dma);
		92	qh->hw_alt_next = EHCI_LIST_END;
		93
		94	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
		95	wmb ();
		96	qh->hw_token &= __constant_cpu_to_le32 (QTD_TOGGLE \| QTD_STS_PING);
		97	}
		98
		99	/-------------------------------------------------------------------------/
		100
		101	static void qtd_copy_status (
		102	struct ehci_hcd *ehci,
		103	struct urb *urb,
		104	size_t length,
		105	u32 token
		106	)
		107	{
		108	/* count IN/OUT bytes, not SETUP (even short packets) */
		109	if (likely (QTD_PID (token) != 2))
		110	urb->actual_length += length - QTD_LENGTH (token);
		111
		112	/* don't modify error codes */
		113	if (unlikely (urb->status != -EINPROGRESS))
		114	return;
		115
		116	/* force cleanup after short read; not always an error */
		117	if (unlikely (IS_SHORT_READ (token)))
		118	urb->status = -EREMOTEIO;
		119
		120	/* serious "can't proceed" faults reported by the hardware */
		121	if (token & QTD_STS_HALT) {
		122	if (token & QTD_STS_BABBLE) {
		123	/* FIXME "must" disable babbling device's port too */
		124	urb->status = -EOVERFLOW;
		125	} else if (token & QTD_STS_MMF) {
		126	/* fs/ls interrupt xfer missed the complete-split */
		127	urb->status = -EPROTO;
		128	} else if (token & QTD_STS_DBE) {
		129	urb->status = (QTD_PID (token) == 1) /* IN ? */
		130	? -ENOSR /* hc couldn't read data */
		131	: -ECOMM; /* hc couldn't write data */
		132	} else if (token & QTD_STS_XACT) {
		133	/* timeout, bad crc, wrong PID, etc; retried */
		134	if (QTD_CERR (token))
		135	urb->status = -EPIPE;
		136	else {
		137	ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
		138	urb->dev->devpath,
		139	usb_pipeendpoint (urb->pipe),
		140	usb_pipein (urb->pipe) ? "in" : "out");
		141	urb->status = -EPROTO;
		142	}
		143	/* CERR nonzero + no errors + halt --> stall */
		144	} else if (QTD_CERR (token))
		145	urb->status = -EPIPE;
		146	else /* unknown */
		147	urb->status = -EPROTO;
		148
		149	ehci_vdbg (ehci,
		150	"dev%d ep%d%s qtd token %08x --> status %d\n",
		151	usb_pipedevice (urb->pipe),
		152	usb_pipeendpoint (urb->pipe),
		153	usb_pipein (urb->pipe) ? "in" : "out",
		154	token, urb->status);
		155
		156	/* stall indicates some recovery action is needed */
		157	if (urb->status == -EPIPE) {
		158	int pipe = urb->pipe;
		159
		160	if (!usb_pipecontrol (pipe))
		161	usb_endpoint_halt (urb->dev,
		162	usb_pipeendpoint (pipe),
		163	usb_pipeout (pipe));
		164
		165	/* if async CSPLIT failed, try cleaning out the TT buffer */
		166	} else if (urb->dev->tt && !usb_pipeint (urb->pipe)
		167	&& QTD_CERR(token) == 0) {
		168	#ifdef DEBUG
		169	struct usb_device *tt = urb->dev->tt->hub;
		170	dev_dbg (&tt->dev,
		171	"clear tt buffer port %d, a%d ep%d t%08x\n",
		172	urb->dev->ttport, urb->dev->devnum,
		173	usb_pipeendpoint (urb->pipe), token);
		174	#endif /* DEBUG */
		175	usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
		176	}
		177	}
		178	}
		179
		180	static void
		181	ehci_urb_done (struct ehci_hcd ehci, struct urb urb, struct pt_regs *regs)
		182	{
		183	if (likely (urb->hcpriv != 0)) {
		184	struct ehci_qh qh = (struct ehci_qh ) urb->hcpriv;
		185
		186	/* S-mask in a QH means it's an interrupt urb */
		187	if ((qh->hw_info2 & __constant_cpu_to_le32 (0x00ff)) != 0) {
		188
		189	/* ... update hc-wide periodic stats (for usbfs) */
		190	hcd_to_bus (&ehci->hcd)->bandwidth_int_reqs--;
		191	}
		192	qh_put (ehci, qh);
		193	}
		194
		195	spin_lock (&urb->lock);
		196	urb->hcpriv = 0;
		197	switch (urb->status) {
		198	case -EINPROGRESS: /* success */
		199	urb->status = 0;
		200	default: /* fault */
		201	COUNT (ehci->stats.complete);
		202	break;
		203	case -EREMOTEIO: /* fault or normal */
		204	if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
		205	urb->status = 0;
		206	COUNT (ehci->stats.complete);
		207	break;
		208	case -ECONNRESET: /* canceled */
		209	case -ENOENT:
		210	COUNT (ehci->stats.unlink);
		211	break;
		212	}
		213	spin_unlock (&urb->lock);
		214
		215	/* complete() can reenter this HCD */
		216	spin_unlock (&ehci->lock);
		217	usb_hcd_giveback_urb (&ehci->hcd, urb, regs);
		218	spin_lock (&ehci->lock);
		219	}
		220
		221
		222	/*
		223	* Process and free completed qtds for a qh, returning URBs to drivers.
		224	* Chases up to qh->hw_current. Returns number of completions called,
		225	* indicating how much "real" work we did.
		226	*/
		227	#define HALT_BIT __constant_cpu_to_le32(QTD_STS_HALT)
		228	static unsigned
		229	qh_completions (struct ehci_hcd ehci, struct ehci_qh qh, struct pt_regs *regs)
		230	{
		231	struct ehci_qtd last = 0, end = qh->dummy;
		232	struct list_head entry, tmp;
		233	int stopped;
		234	unsigned count = 0;
		235	int do_status = 0;
		236	u8 state;
		237
		238	if (unlikely (list_empty (&qh->qtd_list)))
		239	return count;
		240
		241	/* completions (or tasks on other cpus) must never clobber HALT
		242	* till we've gone through and cleaned everything up, even when
		243	* they add urbs to this qh's queue or mark them for unlinking.
		244	*
		245	* NOTE: unlinking expects to be done in queue order.
		246	*/
		247	state = qh->qh_state;
		248	qh->qh_state = QH_STATE_COMPLETING;
		249	stopped = (state == QH_STATE_IDLE);
		250
		251	/* remove de-activated QTDs from front of queue.
		252	* after faults (including short reads), cleanup this urb
		253	* then let the queue advance.
		254	* if queue is stopped, handles unlinks.
		255	*/
		256	list_for_each_safe (entry, tmp, &qh->qtd_list) {
		257	struct ehci_qtd *qtd;
		258	struct urb *urb;
		259	u32 token = 0;
		260
		261	qtd = list_entry (entry, struct ehci_qtd, qtd_list);
		262	urb = qtd->urb;
		263
		264	/* clean up any state from previous QTD ...*/
		265	if (last) {
		266	if (likely (last->urb != urb)) {
		267	ehci_urb_done (ehci, last->urb, regs);
		268	count++;
		269	}
		270	ehci_qtd_free (ehci, last);
		271	last = 0;
		272	}
		273
		274	/* ignore urbs submitted during completions we reported */
		275	if (qtd == end)
		276	break;
		277
		278	/* hardware copies qtd out of qh overlay */
		279	rmb ();
		280	token = le32_to_cpu (qtd->hw_token);
		281
		282	/* always clean up qtds the hc de-activated */
		283	if ((token & QTD_STS_ACTIVE) == 0) {
		284
		285	if ((token & QTD_STS_HALT) != 0) {
		286	stopped = 1;
		287
		288	/* magic dummy for some short reads; qh won't advance */
		289	} else if (IS_SHORT_READ (token)
		290	&& (qh->hw_alt_next & QTD_MASK)
		291	== ehci->async->hw_alt_next) {
		292	stopped = 1;
		293	goto halt;
		294	}
		295
		296	/* stop scanning when we reach qtds the hc is using */
		297	} else if (likely (!stopped
		298	&& HCD_IS_RUNNING (ehci->hcd.state))) {
		299	break;
		300
		301	} else {
		302	stopped = 1;
		303
		304	/* ignore active urbs unless some previous qtd
		305	* for the urb faulted (including short read) or
		306	* its urb was canceled. we may patch qh or qtds.
		307	*/
		308	if (likely (urb->status == -EINPROGRESS))
		309	continue;
		310
		311	/* issue status after short control reads */
		312	if (unlikely (do_status != 0)
		313	&& QTD_PID (token) == 0 /* OUT */) {
		314	do_status = 0;
		315	continue;
		316	}
		317
		318	/* token in overlay may be most current */
		319	if (state == QH_STATE_IDLE
		320	&& cpu_to_le32 (qtd->qtd_dma)
		321	== qh->hw_current)
		322	token = le32_to_cpu (qh->hw_token);
		323
		324	/* force halt for unlinked or blocked qh, so we'll
		325	* patch the qh later and so that completions can't
		326	* activate it while we "know" it's stopped.
		327	*/
		328	if ((HALT_BIT & qh->hw_token) == 0) {
		329	halt:
		330	qh->hw_token \|= HALT_BIT;
		331	wmb ();
		332	}
		333	}
		334
		335	/* remove it from the queue */
		336	spin_lock (&urb->lock);
		337	qtd_copy_status (ehci, urb, qtd->length, token);
		338	do_status = (urb->status == -EREMOTEIO)
		339	&& usb_pipecontrol (urb->pipe);
		340	spin_unlock (&urb->lock);
		341
		342	if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
		343	last = list_entry (qtd->qtd_list.prev,
		344	struct ehci_qtd, qtd_list);
		345	last->hw_next = qtd->hw_next;
		346	}
		347	list_del (&qtd->qtd_list);
		348	last = qtd;
		349	}
		350
		351	/* last urb's completion might still need calling */
		352	if (likely (last != 0)) {
		353	ehci_urb_done (ehci, last->urb, regs);
		354	count++;
		355	ehci_qtd_free (ehci, last);
		356	}
		357
		358	/* restore original state; caller must unlink or relink */
		359	qh->qh_state = state;
		360
		361	/* update qh after fault cleanup */
		362	if (unlikely (stopped != 0)
		363	/* some EHCI 0.95 impls will overlay dummy qtds */
		364	\|\| qh->hw_qtd_next == EHCI_LIST_END) {
		365	if (list_empty (&qh->qtd_list))
		366	end = qh->dummy;
		367	else {
		368	end = list_entry (qh->qtd_list.next,
		369	struct ehci_qtd, qtd_list);
		370	/* first qtd may already be partially processed */
		371	if (cpu_to_le32 (end->qtd_dma) == qh->hw_current)
		372	end = 0;
		373	}
		374	if (end)
		375	qh_update (ehci, qh, end);
		376	}
		377
		378	return count;
		379	}
		380
		381	/-------------------------------------------------------------------------/
		382
		383	// high bandwidth multiplier, as encoded in highspeed endpoint descriptors
		384	#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
		385	// ... and packet size, for any kind of endpoint descriptor
		386	#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
		387
		388	/*
		389	* reverse of qh_urb_transaction: free a list of TDs.
		390	* used for cleanup after errors, before HC sees an URB's TDs.
		391	*/
		392	static void qtd_list_free (
		393	struct ehci_hcd *ehci,
		394	struct urb *urb,
		395	struct list_head *qtd_list
		396	) {
		397	struct list_head entry, temp;
		398
		399	list_for_each_safe (entry, temp, qtd_list) {
		400	struct ehci_qtd *qtd;
		401
		402	qtd = list_entry (entry, struct ehci_qtd, qtd_list);
		403	list_del (&qtd->qtd_list);
		404	ehci_qtd_free (ehci, qtd);
		405	}
		406	}
		407
		408	/*
		409	* create a list of filled qtds for this URB; won't link into qh.
		410	*/
		411	static struct list_head *
		412	qh_urb_transaction (
		413	struct ehci_hcd *ehci,
		414	struct urb *urb,
		415	struct list_head *head,
		416	int flags
		417	) {
		418	struct ehci_qtd qtd, qtd_prev;
		419	dma_addr_t buf;
		420	int len, maxpacket;
		421	int is_input;
		422	u32 token;
		423
		424	/*
		425	* URBs map to sequences of QTDs: one logical transaction
		426	*/
		427	qtd = ehci_qtd_alloc (ehci, flags);
		428	if (unlikely (!qtd))
		429	return 0;
		430	list_add_tail (&qtd->qtd_list, head);
		431	qtd->urb = urb;
		432
		433	token = QTD_STS_ACTIVE;
		434	token \|= (EHCI_TUNE_CERR << 10);
		435	/* for split transactions, SplitXState initialized to zero */
		436
		437	len = urb->transfer_buffer_length;
		438	is_input = usb_pipein (urb->pipe);
		439	if (usb_pipecontrol (urb->pipe)) {
		440	/* SETUP pid */
		441	qtd_fill (qtd, urb->setup_dma, sizeof (struct usb_ctrlrequest),
		442	token \| (2 /* "setup" */ << 8), 8);
		443
		444	/* ... and always at least one more pid */
		445	token ^= QTD_TOGGLE;
		446	qtd_prev = qtd;
		447	qtd = ehci_qtd_alloc (ehci, flags);
		448	if (unlikely (!qtd))
		449	goto cleanup;
		450	qtd->urb = urb;
		451	qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
		452	list_add_tail (&qtd->qtd_list, head);
		453	}
		454
		455	/*
		456	* data transfer stage: buffer setup
		457	*/
		458	if (likely (len > 0))
		459	buf = urb->transfer_dma;
		460	else
		461	buf = 0;
		462
		463	// FIXME this 'buf' check break some zlps...
		464	if (!buf \|\| is_input)
		465	token \|= (1 /* "in" */ << 8);
		466	/* else it's already initted to "out" pid (0 << 8) */
		467
		468	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
		469
		470	/*
		471	* buffer gets wrapped in one or more qtds;
		472	* last one may be "short" (including zero len)
		473	* and may serve as a control status ack
		474	*/
		475	for (;;) {
		476	int this_qtd_len;
		477
		478	this_qtd_len = qtd_fill (qtd, buf, len, token, maxpacket);
		479	len -= this_qtd_len;
		480	buf += this_qtd_len;
		481	if (is_input)
		482	qtd->hw_alt_next = ehci->async->hw_alt_next;
		483
		484	/* qh makes control packets use qtd toggle; maybe switch it */
		485	if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
		486	token ^= QTD_TOGGLE;
		487
		488	if (likely (len <= 0))
		489	break;
		490
		491	qtd_prev = qtd;
		492	qtd = ehci_qtd_alloc (ehci, flags);
		493	if (unlikely (!qtd))
		494	goto cleanup;
		495	qtd->urb = urb;
		496	qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
		497	list_add_tail (&qtd->qtd_list, head);
		498	}
		499
		500	/* unless the bulk/interrupt caller wants a chance to clean
		501	* up after short reads, hc should advance qh past this urb
		502	*/
		503	if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
		504	\|\| usb_pipecontrol (urb->pipe)))
		505	qtd->hw_alt_next = EHCI_LIST_END;
		506
		507	/*
		508	* control requests may need a terminating data "status" ack;
		509	* bulk ones may need a terminating short packet (zero length).
		510	*/
		511	if (likely (buf != 0)) {
		512	int one_more = 0;
		513
		514	if (usb_pipecontrol (urb->pipe)) {
		515	one_more = 1;
		516	token ^= 0x0100; /* "in" <--> "out" */
		517	token \|= QTD_TOGGLE; /* force DATA1 */
		518	} else if (usb_pipebulk (urb->pipe)
		519	&& (urb->transfer_flags & URB_ZERO_PACKET)
		520	&& !(urb->transfer_buffer_length % maxpacket)) {
		521	one_more = 1;
		522	}
		523	if (one_more) {
		524	qtd_prev = qtd;
		525	qtd = ehci_qtd_alloc (ehci, flags);
		526	if (unlikely (!qtd))
		527	goto cleanup;
		528	qtd->urb = urb;
		529	qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
		530	list_add_tail (&qtd->qtd_list, head);
		531
		532	/* never any data in such packets */
		533	qtd_fill (qtd, 0, 0, token, 0);
		534	}
		535	}
		536
		537	/* by default, enable interrupt on urb completion */
		538	if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
		539	qtd->hw_token \|= __constant_cpu_to_le32 (QTD_IOC);
		540	return head;
		541
		542	cleanup:
		543	qtd_list_free (ehci, urb, head);
		544	return 0;
		545	}
		546
		547	/-------------------------------------------------------------------------/
		548
		549	/*
		550	* Hardware maintains data toggle (like OHCI) ... here we (re)initialize
		551	* the hardware data toggle in the QH, and set the pseudo-toggle in udev
		552	* so we can see if usb_clear_halt() was called. NOP for control, since
		553	* we set up qh->hw_info1 to always use the QTD toggle bits.
		554	*/
		555	static inline void
		556	clear_toggle (struct usb_device udev, int ep, int is_out, struct ehci_qh qh)
		557	{
		558	vdbg ("clear toggle, dev %d ep 0x%x-%s",
		559	udev->devnum, ep, is_out ? "out" : "in");
		560	qh->hw_token &= ~__constant_cpu_to_le32 (QTD_TOGGLE);
		561	usb_settoggle (udev, ep, is_out, 1);
		562	}
		563
		564	// Would be best to create all qh's from config descriptors,
		565	// when each interface/altsetting is established. Unlink
		566	// any previous qh and cancel its urbs first; endpoints are
		567	// implicitly reset then (data toggle too).
		568	// That'd mean updating how usbcore talks to HCDs. (2.5?)
		569
		570
		571	/*
		572	* Each QH holds a qtd list; a QH is used for everything except iso.
		573	*
		574	* For interrupt urbs, the scheduler must set the microframe scheduling
		575	* mask(s) each time the QH gets scheduled. For highspeed, that's
		576	* just one microframe in the s-mask. For split interrupt transactions
		577	* there are additional complications: c-mask, maybe FSTNs.
		578	*/
		579	static struct ehci_qh *
		580	qh_make (
		581	struct ehci_hcd *ehci,
		582	struct urb *urb,
		583	int flags
		584	) {
		585	struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
		586	u32 info1 = 0, info2 = 0;
		587	int is_input, type;
		588	int maxp = 0;
		589
		590	if (!qh)
		591	return qh;
		592
		593	/*
		594	* init endpoint/device data for this QH
		595	*/
		596	info1 \|= usb_pipeendpoint (urb->pipe) << 8;
		597	info1 \|= usb_pipedevice (urb->pipe) << 0;
		598
		599	is_input = usb_pipein (urb->pipe);
		600	type = usb_pipetype (urb->pipe);
		601	maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
		602
		603	/* Compute interrupt scheduling parameters just once, and save.
		604	* - allowing for high bandwidth, how many nsec/uframe are used?
		605	* - split transactions need a second CSPLIT uframe; same question
		606	* - splits also need a schedule gap (for full/low speed I/O)
		607	* - qh has a polling interval
		608	*
		609	* For control/bulk requests, the HC or TT handles these.
		610	*/
		611	if (type == PIPE_INTERRUPT) {
		612	qh->usecs = usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
		613	hb_mult (maxp) * max_packet (maxp));
		614	qh->start = NO_FRAME;
		615
		616	if (urb->dev->speed == USB_SPEED_HIGH) {
		617	qh->c_usecs = 0;
		618	qh->gap_uf = 0;
		619
		620	/* FIXME handle HS periods of less than 1 frame. */
		621	qh->period = urb->interval >> 3;
		622	if (qh->period < 1) {
		623	dbg ("intr period %d uframes, NYET!",
		624	urb->interval);
		625	goto done;
		626	}
		627	} else {
		628	/* gap is f(FS/LS transfer times) */
		629	qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
		630	is_input, 0, maxp) / (125 * 1000);
		631
		632	/* FIXME this just approximates SPLIT/CSPLIT times */
		633	if (is_input) { // SPLIT, gap, CSPLIT+DATA
		634	qh->c_usecs = qh->usecs + HS_USECS (0);
		635	qh->usecs = HS_USECS (1);
		636	} else { // SPLIT+DATA, gap, CSPLIT
		637	qh->usecs += HS_USECS (1);
		638	qh->c_usecs = HS_USECS (0);
		639	}
		640
		641	qh->period = urb->interval;
		642	}
		643	}
		644
		645	/* using TT? */
		646	switch (urb->dev->speed) {
		647	case USB_SPEED_LOW:
		648	info1 \|= (1 << 12); /* EPS "low" */
		649	/* FALL THROUGH */
		650
		651	case USB_SPEED_FULL:
		652	/* EPS 0 means "full" */
		653	if (type != PIPE_INTERRUPT)
		654	info1 \|= (EHCI_TUNE_RL_TT << 28);
		655	if (type == PIPE_CONTROL) {
		656	info1 \|= (1 << 27); /* for TT */
		657	info1 \|= 1 << 14; /* toggle from qtd */
		658	}
		659	info1 \|= maxp << 16;
		660
		661	info2 \|= (EHCI_TUNE_MULT_TT << 30);
		662	info2 \|= urb->dev->ttport << 23;
		663	info2 \|= urb->dev->tt->hub->devnum << 16;
		664
		665	/* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
		666
		667	break;
		668
		669	case USB_SPEED_HIGH: /* no TT involved */
		670	info1 \|= (2 << 12); /* EPS "high" */
		671	if (type == PIPE_CONTROL) {
		672	info1 \|= (EHCI_TUNE_RL_HS << 28);
		673	info1 \|= 64 << 16; /* usb2 fixed maxpacket */
		674	info1 \|= 1 << 14; /* toggle from qtd */
		675	info2 \|= (EHCI_TUNE_MULT_HS << 30);
		676	} else if (type == PIPE_BULK) {
		677	info1 \|= (EHCI_TUNE_RL_HS << 28);
		678	info1 \|= 512 << 16; /* usb2 fixed maxpacket */
		679	info2 \|= (EHCI_TUNE_MULT_HS << 30);
		680	} else { /* PIPE_INTERRUPT */
		681	info1 \|= max_packet (maxp) << 16;
		682	info2 \|= hb_mult (maxp) << 30;
		683	}
		684	break;
		685	default:
		686	dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
		687	done:
		688	qh_put (ehci, qh);
		689	return 0;
		690	}
		691
		692	/* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
		693
		694	/* init as live, toggle clear, advance to dummy */
		695	qh->qh_state = QH_STATE_IDLE;
		696	qh->hw_info1 = cpu_to_le32 (info1);
		697	qh->hw_info2 = cpu_to_le32 (info2);
		698	qh_update (ehci, qh, qh->dummy);
		699	usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
		700	return qh;
		701	}
		702	#undef hb_mult
		703	#undef hb_packet
		704
		705	/-------------------------------------------------------------------------/
		706
		707	/* move qh (and its qtds) onto async queue; maybe enable queue. */
		708
		709	static void qh_link_async (struct ehci_hcd ehci, struct ehci_qh qh)
		710	{
		711	u32 dma = QH_NEXT (qh->qh_dma);
		712	struct ehci_qh *head;
		713
		714	/* (re)start the async schedule? */
		715	head = ehci->async;
		716	timer_action_done (ehci, TIMER_ASYNC_OFF);
		717	if (!head->qh_next.qh) {
		718	u32 cmd = readl (&ehci->regs->command);
		719
		720	if (!(cmd & CMD_ASE)) {
		721	/* in case a clear of CMD_ASE didn't take yet */
		722	(void) handshake (&ehci->regs->status, STS_ASS, 0, 150);
		723	cmd \|= CMD_ASE \| CMD_RUN;
		724	writel (cmd, &ehci->regs->command);
		725	ehci->hcd.state = USB_STATE_RUNNING;
		726	/* posted write need not be known to HC yet ... */
		727	}
		728	}
		729
		730	qh->hw_token &= ~HALT_BIT;
		731
		732	/* splice right after start */
		733	qh->qh_next = head->qh_next;
		734	qh->hw_next = head->hw_next;
		735	wmb ();
		736
		737	head->qh_next.qh = qh;
		738	head->hw_next = dma;
		739
		740	qh->qh_state = QH_STATE_LINKED;
		741	/* qtd completions reported later by interrupt */
		742	}
		743
		744	/-------------------------------------------------------------------------/
		745
		746	#define QH_ADDR_MASK __constant_le32_to_cpu(0x7f)
		747
		748	/*
		749	* For control/bulk/interrupt, return QH with these TDs appended.
		750	* Allocates and initializes the QH if necessary.
		751	* Returns null if it can't allocate a QH it needs to.
		752	* If the QH has TDs (urbs) already, that's great.
		753	*/
		754	static struct ehci_qh *qh_append_tds (
		755	struct ehci_hcd *ehci,
		756	struct urb *urb,
		757	struct list_head *qtd_list,
		758	int epnum,
		759	void **ptr
		760	)
		761	{
		762	struct ehci_qh *qh = 0;
		763
		764	qh = (struct ehci_qh ) ptr;
		765	if (unlikely (qh == 0)) {
		766	/* can't sleep here, we have ehci->lock... */
		767	qh = qh_make (ehci, urb, SLAB_ATOMIC);
		768	*ptr = qh;
		769	}
		770	if (likely (qh != 0)) {
		771	struct ehci_qtd *qtd;
		772
		773	if (unlikely (list_empty (qtd_list)))
		774	qtd = 0;
		775	else
		776	qtd = list_entry (qtd_list->next, struct ehci_qtd,
		777	qtd_list);
		778
		779	/* control qh may need patching after enumeration */
		780	if (unlikely (epnum == 0)) {
		781	/* set_address changes the address */
		782	if ((qh->hw_info1 & QH_ADDR_MASK) == 0)
		783	qh->hw_info1 \|= cpu_to_le32 (
		784	usb_pipedevice (urb->pipe));
		785
		786	/* for full speed, ep0 maxpacket can grow */
		787	else if (!(qh->hw_info1
		788	& __constant_cpu_to_le32 (0x3 << 12))) {
		789	u32 info, max;
		790
		791	info = le32_to_cpu (qh->hw_info1);
		792	max = urb->dev->descriptor.bMaxPacketSize0;
		793	if (max > (0x07ff & (info >> 16))) {
		794	info &= ~(0x07ff << 16);
		795	info \|= max << 16;
		796	qh->hw_info1 = cpu_to_le32 (info);
		797	}
		798	}
		799
		800	/* usb_reset_device() briefly reverts to address 0 */
		801	if (usb_pipedevice (urb->pipe) == 0)
		802	qh->hw_info1 &= ~QH_ADDR_MASK;
		803	}
		804
		805	/* usb_clear_halt() means qh data toggle gets reset */
		806	if (unlikely (!usb_gettoggle (urb->dev,
		807	(epnum & 0x0f), !(epnum & 0x10)))
		808	&& !usb_pipecontrol (urb->pipe)) {
		809	/* "never happens": drivers do stall cleanup right */
		810	if (qh->qh_state != QH_STATE_IDLE
		811	&& !list_empty (&qh->qtd_list)
		812	&& qh->qh_state != QH_STATE_COMPLETING)
		813	ehci_warn (ehci, "clear toggle dev%d "
		814	"ep%d%s: not idle\n",
		815	usb_pipedevice (urb->pipe),
		816	epnum & 0x0f,
		817	usb_pipein (urb->pipe)
		818	? "in" : "out");
		819	/* else we know this overlay write is safe */
		820	clear_toggle (urb->dev,
		821	epnum & 0x0f, !(epnum & 0x10), qh);
		822	}
		823
		824	/* just one way to queue requests: swap with the dummy qtd.
		825	* only hc or qh_completions() usually modify the overlay.
		826	*/
		827	if (likely (qtd != 0)) {
		828	struct ehci_qtd *dummy;
		829	dma_addr_t dma;
		830	u32 token;
		831
		832	/* to avoid racing the HC, use the dummy td instead of
		833	* the first td of our list (becomes new dummy). both
		834	* tds stay deactivated until we're done, when the
		835	* HC is allowed to fetch the old dummy (4.10.2).
		836	*/
		837	token = qtd->hw_token;
		838	qtd->hw_token = HALT_BIT;
		839	wmb ();
		840	dummy = qh->dummy;
		841
		842	dma = dummy->qtd_dma;
		843	dummy = qtd;
		844	dummy->qtd_dma = dma;
		845
		846	list_del (&qtd->qtd_list);
		847	list_add (&dummy->qtd_list, qtd_list);
		848	__list_splice (qtd_list, qh->qtd_list.prev);
		849
		850	ehci_qtd_init (qtd, qtd->qtd_dma);
		851	qh->dummy = qtd;
		852
		853	/* hc must see the new dummy at list end */
		854	dma = qtd->qtd_dma;
		855	qtd = list_entry (qh->qtd_list.prev,
		856	struct ehci_qtd, qtd_list);
		857	qtd->hw_next = QTD_NEXT (dma);
		858
		859	/* let the hc process these next qtds */
		860	wmb ();
		861	dummy->hw_token = token;
		862
		863	urb->hcpriv = qh_get (qh);
		864	}
		865	}
		866	return qh;
		867	}
		868
		869	/-------------------------------------------------------------------------/
		870
		871	static int
		872	submit_async (
		873	struct ehci_hcd *ehci,
		874	struct urb *urb,
		875	struct list_head *qtd_list,
		876	int mem_flags
		877	) {
		878	struct ehci_qtd *qtd;
		879	struct hcd_dev *dev;
		880	int epnum;
		881	unsigned long flags;
		882	struct ehci_qh *qh = 0;
		883
		884	qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
		885	dev = (struct hcd_dev *)urb->dev->hcpriv;
		886	epnum = usb_pipeendpoint (urb->pipe);
		887	if (usb_pipein (urb->pipe) && !usb_pipecontrol (urb->pipe))
		888	epnum \|= 0x10;
		889
		890	ehci_vdbg (ehci, "submit_async urb %p len %d ep%d%s qtd %p [qh %p]\n",
		891	urb, urb->transfer_buffer_length,
		892	epnum & 0x0f, (epnum & 0x10) ? "in" : "out",
		893	qtd, dev ? dev->ep [epnum] : (void *)~0);
		894
		895	spin_lock_irqsave (&ehci->lock, flags);
		896	qh = qh_append_tds (ehci, urb, qtd_list, epnum, &dev->ep [epnum]);
		897
		898	/* Control/bulk operations through TTs don't need scheduling,
		899	* the HC and TT handle it when the TT has a buffer ready.
		900	*/
		901	if (likely (qh != 0)) {
		902	if (likely (qh->qh_state == QH_STATE_IDLE))
		903	qh_link_async (ehci, qh_get (qh));
		904	}
		905	spin_unlock_irqrestore (&ehci->lock, flags);
		906	if (unlikely (qh == 0)) {
		907	qtd_list_free (ehci, urb, qtd_list);
		908	return -ENOMEM;
		909	}
		910	return 0;
		911	}
		912
		913	/-------------------------------------------------------------------------/
		914
		915	/* the async qh for the qtds being reclaimed are now unlinked from the HC */
		916
		917	static void start_unlink_async (struct ehci_hcd ehci, struct ehci_qh qh);
		918
		919	static void end_unlink_async (struct ehci_hcd ehci, struct pt_regs regs)
		920	{
		921	struct ehci_qh *qh = ehci->reclaim;
		922	struct ehci_qh *next;
		923
		924	timer_action_done (ehci, TIMER_IAA_WATCHDOG);
		925
		926	// qh->hw_next = cpu_to_le32 (qh->qh_dma);
		927	qh->qh_state = QH_STATE_IDLE;
		928	qh->qh_next.qh = 0;
		929	qh_put (ehci, qh); // refcount from reclaim
		930
		931	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
		932	next = qh->reclaim;
		933	ehci->reclaim = next;
		934	ehci->reclaim_ready = 0;
		935	qh->reclaim = 0;
		936
		937	qh_completions (ehci, qh, regs);
		938
		939	if (!list_empty (&qh->qtd_list)
		940	&& HCD_IS_RUNNING (ehci->hcd.state))
		941	qh_link_async (ehci, qh);
		942	else {
		943	qh_put (ehci, qh); // refcount from async list
		944
		945	/* it's not free to turn the async schedule on/off; leave it
		946	* active but idle for a while once it empties.
		947	*/
		948	if (HCD_IS_RUNNING (ehci->hcd.state)
		949	&& ehci->async->qh_next.qh == 0)
		950	timer_action (ehci, TIMER_ASYNC_OFF);
		951	}
		952
		953	if (next) {
		954	ehci->reclaim = 0;
		955	start_unlink_async (ehci, next);
		956	}
		957	}
		958
		959	/* makes sure the async qh will become idle */
		960	/* caller must own ehci->lock */
		961
		962	static void start_unlink_async (struct ehci_hcd ehci, struct ehci_qh qh)
		963	{
		964	int cmd = readl (&ehci->regs->command);
		965	struct ehci_qh *prev;
		966
		967	#ifdef DEBUG
		968	if (ehci->reclaim
		969	\|\| (qh->qh_state != QH_STATE_LINKED
		970	&& qh->qh_state != QH_STATE_UNLINK_WAIT)
		971	#ifdef CONFIG_SMP
		972	// this macro lies except on SMP compiles
		973	\|\| !spin_is_locked (&ehci->lock)
		974	#endif
		975	)
		976	BUG ();
		977	#endif
		978
		979	/* stop async schedule right now? */
		980	if (unlikely (qh == ehci->async)) {
		981	/* can't get here without STS_ASS set */
		982	if (ehci->hcd.state != USB_STATE_HALT) {
		983	writel (cmd & ~CMD_ASE, &ehci->regs->command);
		984	wmb ();
		985	// handshake later, if we need to
		986	}
		987	timer_action_done (ehci, TIMER_ASYNC_OFF);
		988	return;
		989	}
		990
		991	qh->qh_state = QH_STATE_UNLINK;
		992	ehci->reclaim = qh = qh_get (qh);
		993
		994	prev = ehci->async;
		995	while (prev->qh_next.qh != qh)
		996	prev = prev->qh_next.qh;
		997
		998	prev->hw_next = qh->hw_next;
		999	prev->qh_next = qh->qh_next;
		1000	wmb ();
		1001
		1002	if (unlikely (ehci->hcd.state == USB_STATE_HALT)) {
		1003	/* if (unlikely (qh->reclaim != 0))
		1004	* this will recurse, probably not much
		1005	*/
		1006	end_unlink_async (ehci, NULL);
		1007	return;
		1008	}
		1009
		1010	ehci->reclaim_ready = 0;
		1011	cmd \|= CMD_IAAD;
		1012	writel (cmd, &ehci->regs->command);
		1013	(void) readl (&ehci->regs->command);
		1014	timer_action (ehci, TIMER_IAA_WATCHDOG);
		1015	}
		1016
		1017	/-------------------------------------------------------------------------/
		1018
		1019	static void
		1020	scan_async (struct ehci_hcd ehci, struct pt_regs regs)
		1021	{
		1022	struct ehci_qh *qh;
		1023	enum ehci_timer_action action = TIMER_IO_WATCHDOG;
		1024
		1025	if (!++(ehci->stamp))
		1026	ehci->stamp++;
		1027	timer_action_done (ehci, TIMER_ASYNC_SHRINK);
		1028	rescan:
		1029	qh = ehci->async->qh_next.qh;
		1030	if (likely (qh != 0)) {
		1031	do {
		1032	/* clean any finished work for this qh */
		1033	if (!list_empty (&qh->qtd_list)
		1034	&& qh->stamp != ehci->stamp) {
		1035	int temp;
		1036
		1037	/* unlinks could happen here; completion
		1038	* reporting drops the lock. rescan using
		1039	* the latest schedule, but don't rescan
		1040	* qhs we already finished (no looping).
		1041	*/
		1042	qh = qh_get (qh);
		1043	qh->stamp = ehci->stamp;
		1044	temp = qh_completions (ehci, qh, regs);
		1045	qh_put (ehci, qh);
		1046	if (temp != 0) {
		1047	goto rescan;
		1048	}
		1049	}
		1050
		1051	/* unlink idle entries, reducing HC PCI usage as well
		1052	* as HCD schedule-scanning costs. delay for any qh
		1053	* we just scanned, there's a not-unusual case that it
		1054	* doesn't stay idle for long.
		1055	* (plus, avoids some kind of re-activation race.)
		1056	*/
		1057	if (list_empty (&qh->qtd_list)) {
		1058	if (qh->stamp == ehci->stamp)
		1059	action = TIMER_ASYNC_SHRINK;
		1060	else if (!ehci->reclaim
		1061	&& qh->qh_state == QH_STATE_LINKED)
		1062	start_unlink_async (ehci, qh);
		1063	}
		1064
		1065	qh = qh->qh_next.qh;
		1066	} while (qh);
		1067	}
		1068	if (action == TIMER_ASYNC_SHRINK)
		1069	timer_action (ehci, TIMER_ASYNC_SHRINK);
		1070	}

Subversion Repositories shark

(root)/shark/branches/xen/drivers/usb/host/ehci-q.c - Rev 1618