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Rev | Author | Line No. | Line |
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582 | mauro | 1 | /* |
2 | * Cyrix MediaGX and NatSemi Geode Suspend Modulation |
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3 | * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com> |
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4 | * (C) 2002 Hiroshi Miura <miura@da-cha.org> |
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5 | * All Rights Reserved |
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6 | * |
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7 | * This program is free software; you can redistribute it and/or |
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8 | * modify it under the terms of the GNU General Public License |
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9 | * version 2 as published by the Free Software Foundation |
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10 | * |
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11 | * The author(s) of this software shall not be held liable for damages |
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12 | * of any nature resulting due to the use of this software. This |
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13 | * software is provided AS-IS with no warranties. |
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14 | * |
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15 | * Theoritical note: |
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16 | * |
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17 | * (see Geode(tm) CS5530 manual (rev.4.1) page.56) |
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18 | * |
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19 | * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0 |
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20 | * are based on Suspend Moduration. |
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21 | * |
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22 | * Suspend Modulation works by asserting and de-asserting the SUSP# pin |
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23 | * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP# |
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24 | * the CPU enters an idle state. GX1 stops its core clock when SUSP# is |
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25 | * asserted then power consumption is reduced. |
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26 | * |
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27 | * Suspend Modulation's OFF/ON duration are configurable |
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28 | * with 'Suspend Modulation OFF Count Register' |
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29 | * and 'Suspend Modulation ON Count Register'. |
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30 | * These registers are 8bit counters that represent the number of |
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31 | * 32us intervals which the SUSP# pin is asserted/de-asserted to the |
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32 | * processor. |
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33 | * |
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34 | * These counters define a ratio which is the effective frequency |
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35 | * of operation of the system. |
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36 | * |
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37 | * On Count |
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38 | * F_eff = Fgx * ---------------------- |
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39 | * On Count + Off Count |
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40 | * |
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41 | * 0 <= On Count, Off Count <= 255 |
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42 | * |
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43 | * From these limits, we can get register values |
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44 | * |
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45 | * on_duration + off_duration <= MAX_DURATION |
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46 | * off_duration = on_duration * (stock_freq - freq) / freq |
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47 | * |
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48 | * on_duration = (freq * DURATION) / stock_freq |
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49 | * off_duration = DURATION - on_duration |
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50 | * |
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51 | * |
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52 | *--------------------------------------------------------------------------- |
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53 | * |
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54 | * ChangeLog: |
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55 | * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org> |
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56 | * - rewrite for Cyrix MediaGX Cx5510/5520 and |
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57 | * NatSemi Geode Cs5530(A). |
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58 | * |
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59 | * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com> |
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60 | * - cs5530_mod patch for 2.4.19-rc1. |
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61 | * |
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62 | *--------------------------------------------------------------------------- |
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63 | * |
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64 | * Todo |
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65 | * Test on machines with 5510, 5530, 5530A |
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66 | */ |
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67 | |||
68 | /************************************************************************ |
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69 | * Suspend Modulation - Definitions * |
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70 | ************************************************************************/ |
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71 | |||
72 | #include <linuxcomp.h> |
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73 | |||
74 | #include <linux/kernel.h> |
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75 | #include <linux/module.h> |
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76 | #include <linux/sched.h> |
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77 | #include <linux/init.h> |
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78 | #include <linux/smp.h> |
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79 | #include <linux/cpufreq.h> |
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80 | #include <linux/pci.h> |
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81 | #include <asm/processor.h> |
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82 | #include <asm/errno.h> |
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83 | |||
84 | extern struct cpuinfo_x86 new_cpu_data; |
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85 | extern unsigned long cpu_khz; |
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86 | |||
87 | /* PCI config registers, all at F0 */ |
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88 | #define PCI_PMER1 0x80 /* power management enable register 1 */ |
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89 | #define PCI_PMER2 0x81 /* power management enable register 2 */ |
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90 | #define PCI_PMER3 0x82 /* power management enable register 3 */ |
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91 | #define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */ |
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92 | #define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */ |
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93 | #define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */ |
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94 | #define PCI_MODON 0x95 /* suspend modulation ON counter register */ |
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95 | #define PCI_SUSCFG 0x96 /* suspend configuration register */ |
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96 | |||
97 | /* PMER1 bits */ |
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98 | #define GPM (1<<0) /* global power management */ |
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99 | #define GIT (1<<1) /* globally enable PM device idle timers */ |
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100 | #define GTR (1<<2) /* globally enable IO traps */ |
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101 | #define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */ |
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102 | #define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */ |
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103 | |||
104 | /* SUSCFG bits */ |
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105 | #define SUSMOD (1<<0) /* enable/disable suspend modulation */ |
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106 | /* the belows support only with cs5530 (after rev.1.2)/cs5530A */ |
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107 | #define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */ |
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108 | /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */ |
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109 | #define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */ |
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110 | /* the belows support only with cs5530A */ |
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111 | #define PWRSVE_ISA (1<<3) /* stop ISA clock */ |
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112 | #define PWRSVE (1<<4) /* active idle */ |
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113 | |||
114 | struct gxfreq_params { |
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115 | u8 on_duration; |
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116 | u8 off_duration; |
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117 | u8 pci_suscfg; |
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118 | u8 pci_pmer1; |
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119 | u8 pci_pmer2; |
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120 | u8 pci_rev; |
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121 | struct pci_dev *cs55x0; |
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122 | }; |
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123 | |||
124 | static struct gxfreq_params *gx_params; |
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125 | static int stock_freq; |
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126 | |||
127 | /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */ |
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128 | static int pci_busclk = 0; |
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129 | MODULE_PARM(pci_busclk, "i"); |
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130 | |||
131 | /* maximum duration for which the cpu may be suspended |
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132 | * (32us * MAX_DURATION). If no parameter is given, this defaults |
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133 | * to 255. |
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134 | * Note that this leads to a maximum of 8 ms(!) where the CPU clock |
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135 | * is suspended -- processing power is just 0.39% of what it used to be, |
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136 | * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */ |
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137 | static int max_duration = 255; |
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138 | MODULE_PARM(max_duration, "i"); |
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139 | |||
140 | /* For the default policy, we want at least some processing power |
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141 | * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV) |
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142 | */ |
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143 | #define POLICY_MIN_DIV 20 |
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144 | |||
145 | |||
146 | /* DEBUG |
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147 | * Define it if you want verbose debug output |
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148 | */ |
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149 | |||
775 | mauro | 150 | //#define SUSPMOD_DEBUG 1 |
582 | mauro | 151 | |
152 | #ifdef SUSPMOD_DEBUG |
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153 | #define dprintk(msg...) printk(KERN_DEBUG "cpufreq:" msg) |
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154 | #else |
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155 | #define dprintk(msg...) do { } while(0) |
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156 | #endif |
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157 | |||
158 | /** |
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159 | * we can detect a core multipiler from dir0_lsb |
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160 | * from GX1 datasheet p.56, |
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161 | * MULT[3:0]: |
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162 | * 0000 = SYSCLK multiplied by 4 (test only) |
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163 | * 0001 = SYSCLK multiplied by 10 |
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164 | * 0010 = SYSCLK multiplied by 4 |
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165 | * 0011 = SYSCLK multiplied by 6 |
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166 | * 0100 = SYSCLK multiplied by 9 |
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167 | * 0101 = SYSCLK multiplied by 5 |
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168 | * 0110 = SYSCLK multiplied by 7 |
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169 | * 0111 = SYSCLK multiplied by 8 |
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170 | * of 33.3MHz |
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171 | **/ |
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172 | static int gx_freq_mult[16] = { |
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173 | 4, 10, 4, 6, 9, 5, 7, 8, |
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174 | 0, 0, 0, 0, 0, 0, 0, 0 |
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175 | }; |
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176 | |||
177 | |||
178 | /**************************************************************** |
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179 | * Low Level chipset interface * |
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180 | ****************************************************************/ |
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181 | static struct pci_device_id gx_chipset_tbl[] __initdata = { |
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182 | { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, PCI_ANY_ID, PCI_ANY_ID }, |
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183 | { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID }, |
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184 | { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID }, |
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185 | { 0, }, |
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186 | }; |
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187 | |||
188 | /** |
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189 | * gx_detect_chipset: |
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190 | * |
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191 | **/ |
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192 | static __init struct pci_dev *gx_detect_chipset(void) |
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193 | { |
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194 | struct pci_dev *gx_pci = NULL; |
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195 | |||
196 | /* check if CPU is a MediaGX or a Geode. */ |
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197 | if ((new_cpu_data.x86_vendor != X86_VENDOR_NSC) && |
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198 | (new_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) { |
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199 | dprintk(KERN_INFO "gx-suspmod: error: no MediaGX/Geode processor found!\n"); |
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200 | return NULL; |
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201 | } |
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202 | |||
203 | /* detect which companion chip is used */ |
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204 | while ((gx_pci = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, gx_pci)) != NULL) { |
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205 | if ((pci_match_device (gx_chipset_tbl, gx_pci)) != NULL) { |
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206 | return gx_pci; |
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207 | } |
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208 | } |
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209 | |||
210 | dprintk(KERN_INFO "gx-suspmod: error: no supported chipset found!\n"); |
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211 | return NULL; |
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212 | } |
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213 | |||
214 | /** |
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215 | * gx_get_cpuspeed: |
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216 | * |
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217 | * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi Geode CPU runs. |
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218 | */ |
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219 | static int gx_get_cpuspeed(void) |
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220 | { |
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221 | if ((gx_params->pci_suscfg & SUSMOD) == 0) |
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222 | return stock_freq; |
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223 | |||
224 | return (stock_freq * gx_params->on_duration) |
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225 | / (gx_params->on_duration + gx_params->off_duration); |
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226 | } |
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227 | |||
228 | /** |
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229 | * gx_validate_speed: |
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230 | * determine current cpu speed |
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231 | * |
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232 | **/ |
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233 | |||
234 | static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off_duration) |
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235 | { |
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236 | unsigned int i; |
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237 | u8 tmp_on, tmp_off; |
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238 | int old_tmp_freq = stock_freq; |
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239 | int tmp_freq; |
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240 | |||
241 | *on_duration=1; |
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242 | *off_duration=0; |
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243 | |||
244 | for (i=max_duration; i>0; i--) { |
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245 | tmp_on = ((khz * i) / stock_freq) & 0xff; |
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246 | tmp_off = i - tmp_on; |
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247 | tmp_freq = (stock_freq * tmp_on) / i; |
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248 | /* if this relation is closer to khz, use this. If it's equal, |
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249 | * prefer it, too - lower latency */ |
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250 | if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) { |
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251 | *on_duration = tmp_on; |
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252 | *off_duration = tmp_off; |
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253 | old_tmp_freq = tmp_freq; |
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254 | } |
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255 | } |
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256 | |||
257 | return old_tmp_freq; |
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258 | } |
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259 | |||
260 | |||
261 | /** |
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262 | * gx_set_cpuspeed: |
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263 | * set cpu speed in khz. |
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264 | **/ |
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265 | |||
266 | static void gx_set_cpuspeed(unsigned int khz) |
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267 | { |
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268 | u8 suscfg, pmer1; |
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269 | unsigned int new_khz; |
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270 | unsigned long flags; |
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271 | struct cpufreq_freqs freqs; |
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272 | |||
273 | |||
274 | freqs.cpu = 0; |
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275 | freqs.old = gx_get_cpuspeed(); |
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276 | |||
277 | new_khz = gx_validate_speed(khz, &gx_params->on_duration, &gx_params->off_duration); |
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278 | |||
279 | freqs.new = new_khz; |
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280 | |||
281 | if (new_khz == stock_freq) { /* if new khz == 100% of CPU speed, it is special case */ |
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282 | local_irq_save(flags); |
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600 | mauro | 283 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
582 | mauro | 284 | pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, (gx_params->pci_suscfg & ~(SUSMOD))); |
285 | pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &(gx_params->pci_suscfg)); |
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286 | local_irq_restore(flags); |
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287 | dprintk("suspend modulation disabled: cpu runs 100 percent speed.\n"); |
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600 | mauro | 288 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
582 | mauro | 289 | return; |
290 | } |
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291 | |||
600 | mauro | 292 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
582 | mauro | 293 | |
294 | local_irq_save(flags); |
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295 | switch (gx_params->cs55x0->device) { |
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296 | case PCI_DEVICE_ID_CYRIX_5530_LEGACY: |
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297 | pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP; |
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298 | /* FIXME: need to test other values -- Zwane,Miura */ |
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299 | pci_write_config_byte(gx_params->cs55x0, PCI_IRQTC, 4); /* typical 2 to 4ms */ |
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300 | pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */ |
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301 | pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1); |
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302 | |||
303 | if (gx_params->pci_rev < 0x10) { /* CS5530(rev 1.2, 1.3) */ |
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304 | suscfg = gx_params->pci_suscfg | SUSMOD; |
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305 | } else { /* CS5530A,B.. */ |
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306 | suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE; |
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307 | } |
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308 | break; |
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309 | case PCI_DEVICE_ID_CYRIX_5520: |
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310 | case PCI_DEVICE_ID_CYRIX_5510: |
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311 | suscfg = gx_params->pci_suscfg | SUSMOD; |
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312 | break; |
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313 | default: |
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314 | local_irq_restore(flags); |
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315 | dprintk("fatal: try to set unknown chipset.\n"); |
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316 | return; |
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317 | } |
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318 | |||
319 | pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration); |
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320 | pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration); |
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321 | |||
322 | pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg); |
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323 | pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg); |
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324 | |||
325 | local_irq_restore(flags); |
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326 | |||
327 | gx_params->pci_suscfg = suscfg; |
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328 | |||
600 | mauro | 329 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
582 | mauro | 330 | |
331 | dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n", |
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332 | gx_params->on_duration * 32, gx_params->off_duration * 32); |
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333 | dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new); |
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334 | } |
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335 | |||
789 | giacomo | 336 | |
337 | void gx_force_values(unsigned char on_duration, unsigned char off_duration) { |
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338 | |||
339 | u8 suscfg, pmer1; |
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340 | unsigned long flags; |
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797 | giacomo | 341 | u8 val; |
789 | giacomo | 342 | |
343 | if (off_duration == 0) { /* 100% of CPU speed, it is special case */ |
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344 | local_irq_save(flags); |
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797 | giacomo | 345 | |
346 | val = getCx86(0xc2); |
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347 | val &= 0x7F; |
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348 | setCx86(0xc2,val); |
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349 | |||
789 | giacomo | 350 | pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, (gx_params->pci_suscfg & ~(SUSMOD))); |
351 | pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &(gx_params->pci_suscfg)); |
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352 | local_irq_restore(flags); |
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353 | dprintk("suspend modulation disabled: cpu runs 100 percent speed.\n"); |
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354 | return; |
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355 | } |
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356 | |||
357 | local_irq_save(flags); |
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797 | giacomo | 358 | |
359 | val = getCx86(0xc2); |
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360 | val |= 0x80; |
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361 | setCx86(0xc2,val); |
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362 | |||
789 | giacomo | 363 | switch (gx_params->cs55x0->device) { |
364 | case PCI_DEVICE_ID_CYRIX_5530_LEGACY: |
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365 | pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP; |
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366 | /* FIXME: need to test other values -- Zwane,Miura */ |
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790 | giacomo | 367 | pci_write_config_byte(gx_params->cs55x0, PCI_IRQTC, 0); /* typical 2 to 4ms */ |
368 | pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 0); /* typical 50 to 100ms */ |
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789 | giacomo | 369 | pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1); |
370 | |||
371 | if (gx_params->pci_rev < 0x10) { /* CS5530(rev 1.2, 1.3) */ |
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372 | suscfg = gx_params->pci_suscfg | SUSMOD; |
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373 | } else { /* CS5530A,B.. */ |
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374 | suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE; |
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375 | } |
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376 | break; |
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377 | case PCI_DEVICE_ID_CYRIX_5520: |
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378 | case PCI_DEVICE_ID_CYRIX_5510: |
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379 | suscfg = gx_params->pci_suscfg | SUSMOD; |
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380 | break; |
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381 | default: |
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382 | local_irq_restore(flags); |
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383 | dprintk("fatal: try to set unknown chipset.\n"); |
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384 | return; |
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385 | } |
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386 | |||
387 | gx_params->off_duration = off_duration; |
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388 | gx_params->on_duration = on_duration; |
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389 | |||
390 | pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration); |
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391 | pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration); |
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392 | |||
393 | pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg); |
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394 | pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg); |
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395 | |||
396 | local_irq_restore(flags); |
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397 | |||
398 | gx_params->pci_suscfg = suscfg; |
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399 | |||
400 | dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n", |
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401 | gx_params->on_duration * 32, gx_params->off_duration * 32); |
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402 | |||
403 | } |
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404 | |||
582 | mauro | 405 | /**************************************************************** |
406 | * High level functions * |
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407 | ****************************************************************/ |
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408 | |||
409 | /* |
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410 | * cpufreq_gx_verify: test if frequency range is valid |
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411 | * |
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412 | * This function checks if a given frequency range in kHz is valid |
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413 | * for the hardware supported by the driver. |
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414 | */ |
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415 | |||
416 | static int cpufreq_gx_verify(struct cpufreq_policy *policy) |
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417 | { |
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418 | unsigned int tmp_freq = 0; |
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419 | u8 tmp1, tmp2; |
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420 | |||
421 | if (!stock_freq || !policy) |
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422 | return -EINVAL; |
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423 | |||
424 | policy->cpu = 0; |
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425 | cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq); |
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426 | |||
427 | /* it needs to be assured that at least one supported frequency is |
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428 | * within policy->min and policy->max. If it is not, policy->max |
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429 | * needs to be increased until one freuqency is supported. |
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430 | * policy->min may not be decreased, though. This way we guarantee a |
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431 | * specific processing capacity. |
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432 | */ |
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433 | tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); |
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434 | if (tmp_freq < policy->min) |
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435 | tmp_freq += stock_freq / max_duration; |
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436 | policy->min = tmp_freq; |
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437 | if (policy->min > policy->max) |
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438 | policy->max = tmp_freq; |
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439 | tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); |
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440 | if (tmp_freq > policy->max) |
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441 | tmp_freq -= stock_freq / max_duration; |
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442 | policy->max = tmp_freq; |
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443 | if (policy->max < policy->min) |
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444 | policy->max = policy->min; |
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445 | cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq); |
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446 | |||
447 | return 0; |
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448 | } |
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449 | |||
450 | /* |
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451 | * cpufreq_gx_target: |
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452 | * |
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453 | */ |
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454 | static int cpufreq_gx_target(struct cpufreq_policy *policy, |
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455 | unsigned int target_freq, |
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456 | unsigned int relation) |
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457 | { |
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458 | u8 tmp1, tmp2; |
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459 | unsigned int tmp_freq; |
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460 | |||
461 | if (!stock_freq || !policy) |
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462 | return -EINVAL; |
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463 | |||
464 | policy->cpu = 0; |
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465 | |||
466 | tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); |
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467 | while (tmp_freq < policy->min) { |
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468 | tmp_freq += stock_freq / max_duration; |
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469 | tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); |
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470 | } |
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471 | while (tmp_freq > policy->max) { |
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472 | tmp_freq -= stock_freq / max_duration; |
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473 | tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); |
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474 | } |
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475 | |||
476 | gx_set_cpuspeed(tmp_freq); |
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477 | |||
478 | return 0; |
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479 | } |
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480 | |||
481 | static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy) |
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482 | { |
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483 | int maxfreq, curfreq; |
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484 | |||
485 | if (!policy || policy->cpu != 0) |
||
486 | return -ENODEV; |
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487 | |||
488 | /* determine maximum frequency */ |
||
489 | if (pci_busclk) { |
||
490 | maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; |
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491 | } else if (cpu_khz) { |
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492 | maxfreq = cpu_khz; |
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493 | } else { |
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494 | maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; |
||
495 | } |
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496 | stock_freq = maxfreq; |
||
497 | curfreq = gx_get_cpuspeed(); |
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498 | |||
499 | dprintk("cpu max frequency is %d.\n", maxfreq); |
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500 | dprintk("cpu current frequency is %dkHz.\n",curfreq); |
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501 | |||
502 | /* setup basic struct for cpufreq API */ |
||
503 | policy->cpu = 0; |
||
504 | |||
505 | if (max_duration < POLICY_MIN_DIV) |
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506 | policy->min = maxfreq / max_duration; |
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507 | else |
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508 | policy->min = maxfreq / POLICY_MIN_DIV; |
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509 | policy->max = maxfreq; |
||
510 | policy->cur = curfreq; |
||
511 | policy->governor = 0; //!!!CPUFREQ_DEFAULT_GOVERNOR; |
||
512 | policy->cpuinfo.min_freq = maxfreq / max_duration; |
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513 | policy->cpuinfo.max_freq = maxfreq; |
||
514 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; |
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515 | |||
516 | return 0; |
||
517 | } |
||
518 | |||
519 | /* |
||
520 | * cpufreq_gx_init: |
||
521 | * MediaGX/Geode GX initialize cpufreq driver |
||
522 | */ |
||
523 | static struct cpufreq_driver gx_suspmod_driver = { |
||
524 | .verify = cpufreq_gx_verify, |
||
525 | .target = cpufreq_gx_target, |
||
526 | .init = cpufreq_gx_cpu_init, |
||
527 | .name = "gx-suspmod", |
||
528 | .owner = THIS_MODULE, |
||
529 | }; |
||
530 | |||
531 | /*static*/ int __init cpufreq_gx_init(void) |
||
532 | { |
||
533 | int ret; |
||
534 | struct gxfreq_params *params; |
||
535 | struct pci_dev *gx_pci; |
||
536 | u32 class_rev; |
||
537 | |||
538 | /* Test if we have the right hardware */ |
||
539 | if ((gx_pci = gx_detect_chipset()) == NULL) |
||
540 | return -ENODEV; |
||
541 | |||
542 | /* check whether module parameters are sane */ |
||
543 | if (max_duration > 0xff) |
||
544 | max_duration = 0xff; |
||
545 | |||
546 | dprintk("geode suspend modulation available.\n"); |
||
547 | |||
548 | params = kmalloc(sizeof(struct gxfreq_params), GFP_KERNEL); |
||
549 | if (params == NULL) |
||
550 | return -ENOMEM; |
||
551 | memset(params, 0, sizeof(struct gxfreq_params)); |
||
552 | |||
553 | params->cs55x0 = gx_pci; |
||
554 | gx_params = params; |
||
555 | |||
556 | /* keep cs55x0 configurations */ |
||
557 | pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg)); |
||
558 | pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1)); |
||
559 | pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2)); |
||
560 | pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration)); |
||
561 | pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration)); |
||
562 | pci_read_config_dword(params->cs55x0, PCI_CLASS_REVISION, &class_rev); |
||
563 | params->pci_rev = class_rev && 0xff; |
||
564 | |||
565 | if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) { |
||
566 | kfree(params); |
||
567 | return ret; /* register error! */ |
||
568 | } |
||
569 | |||
570 | return 0; |
||
571 | } |
||
572 | |||
573 | /*static*/ void __exit cpufreq_gx_exit(void) |
||
574 | { |
||
575 | cpufreq_unregister_driver(&gx_suspmod_driver); |
||
576 | kfree(gx_params); |
||
577 | } |
||
578 | |||
579 | MODULE_AUTHOR ("Hiroshi Miura <miura@da-cha.org>"); |
||
580 | MODULE_DESCRIPTION ("Cpufreq driver for Cyrix MediaGX and NatSemi Geode"); |
||
581 | MODULE_LICENSE ("GPL"); |
||
582 | |||
583 | module_init(cpufreq_gx_init); |
||
584 | module_exit(cpufreq_gx_exit); |
||
585 |