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846 | giacomo | 1 | /* |
2 | * Copyright (c) 2000-2002 by David Brownell |
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3 | * |
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4 | * This program is free software; you can redistribute it and/or modify it |
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5 | * under the terms of the GNU General Public License as published by the |
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6 | * Free Software Foundation; either version 2 of the License, or (at your |
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7 | * option) any later version. |
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8 | * |
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9 | * This program is distributed in the hope that it will be useful, but |
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10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
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11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 | * for more details. |
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13 | * |
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14 | * You should have received a copy of the GNU General Public License |
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15 | * along with this program; if not, write to the Free Software Foundation, |
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16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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17 | */ |
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18 | |||
19 | #include <linuxcomp.h> |
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20 | |||
21 | #include <linux/config.h> |
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22 | |||
23 | #ifdef CONFIG_USB_DEBUG |
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24 | #define DEBUG |
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25 | #else |
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26 | #undef DEBUG |
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27 | #endif |
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28 | |||
29 | #include <linux/module.h> |
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30 | #include <linux/pci.h> |
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31 | #include <linux/kernel.h> |
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32 | #include <linux/delay.h> |
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33 | #include <linux/ioport.h> |
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34 | #include <linux/sched.h> |
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35 | #include <linux/slab.h> |
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36 | #include <linux/smp_lock.h> |
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37 | #include <linux/errno.h> |
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38 | #include <linux/init.h> |
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39 | #include <linux/timer.h> |
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40 | #include <linux/list.h> |
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41 | #include <linux/interrupt.h> |
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42 | #include <linux/reboot.h> |
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43 | #include <linux/usb.h> |
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44 | #include <linux/moduleparam.h> |
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45 | |||
46 | #include "../core/hcd.h" |
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47 | |||
48 | #include <asm/byteorder.h> |
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49 | #include <asm/io.h> |
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50 | #include <asm/irq.h> |
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51 | #include <asm/system.h> |
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52 | #include <asm/unaligned.h> |
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53 | |||
54 | |||
55 | /*-------------------------------------------------------------------------*/ |
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56 | |||
57 | /* |
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58 | * EHCI hc_driver implementation ... experimental, incomplete. |
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59 | * Based on the final 1.0 register interface specification. |
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60 | * |
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61 | * USB 2.0 shows up in upcoming www.pcmcia.org technology. |
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62 | * First was PCMCIA, like ISA; then CardBus, which is PCI. |
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63 | * Next comes "CardBay", using USB 2.0 signals. |
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64 | * |
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65 | * Contains additional contributions by Brad Hards, Rory Bolt, and others. |
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66 | * Special thanks to Intel and VIA for providing host controllers to |
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67 | * test this driver on, and Cypress (including In-System Design) for |
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68 | * providing early devices for those host controllers to talk to! |
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69 | * |
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70 | * HISTORY: |
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71 | * |
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72 | * 2002-11-29 Correct handling for hw async_next register. |
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73 | * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared; |
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74 | * only scheduling is different, no arbitrary limitations. |
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75 | * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support, |
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76 | * clean up HC run state handshaking. |
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77 | * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts |
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78 | * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other |
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79 | * missing pieces: enabling 64bit dma, handoff from BIOS/SMM. |
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80 | * 2002-05-07 Some error path cleanups to report better errors; wmb(); |
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81 | * use non-CVS version id; better iso bandwidth claim. |
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82 | * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on |
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83 | * errors in submit path. Bugfixes to interrupt scheduling/processing. |
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84 | * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift |
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85 | * more checking to generic hcd framework (db). Make it work with |
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86 | * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt). |
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87 | * 2002-01-14 Minor cleanup; version synch. |
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88 | * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers. |
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89 | * 2002-01-04 Control/Bulk queuing behaves. |
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90 | * |
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91 | * 2001-12-12 Initial patch version for Linux 2.5.1 kernel. |
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92 | * 2001-June Works with usb-storage and NEC EHCI on 2.4 |
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93 | */ |
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94 | |||
95 | #define DRIVER_VERSION "2003-Jun-13" |
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96 | #define DRIVER_AUTHOR "David Brownell" |
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97 | #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver" |
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98 | |||
99 | static const char hcd_name [] = "ehci_hcd"; |
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100 | |||
101 | |||
102 | // #define EHCI_VERBOSE_DEBUG |
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103 | // #define have_split_iso |
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104 | |||
105 | #ifdef DEBUG |
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106 | #define EHCI_STATS |
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107 | #endif |
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108 | |||
109 | /* magic numbers that can affect system performance */ |
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110 | #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */ |
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111 | #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */ |
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112 | #define EHCI_TUNE_RL_TT 0 |
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113 | #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */ |
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114 | #define EHCI_TUNE_MULT_TT 1 |
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115 | #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */ |
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116 | |||
117 | #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */ |
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118 | #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */ |
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119 | #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */ |
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120 | #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */ |
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121 | |||
122 | /* Initial IRQ latency: lower than default */ |
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123 | static int log2_irq_thresh = 0; // 0 to 6 |
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124 | module_param (log2_irq_thresh, int, S_IRUGO); |
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125 | MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes"); |
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126 | |||
127 | #define INTR_MASK (STS_IAA | STS_FATAL | STS_ERR | STS_INT) |
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128 | |||
129 | /*-------------------------------------------------------------------------*/ |
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130 | |||
131 | #include "ehci.h" |
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132 | #include "ehci-dbg.c" |
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133 | |||
134 | /*-------------------------------------------------------------------------*/ |
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135 | |||
136 | /* |
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137 | * handshake - spin reading hc until handshake completes or fails |
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138 | * @ptr: address of hc register to be read |
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139 | * @mask: bits to look at in result of read |
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140 | * @done: value of those bits when handshake succeeds |
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141 | * @usec: timeout in microseconds |
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142 | * |
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143 | * Returns negative errno, or zero on success |
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144 | * |
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145 | * Success happens when the "mask" bits have the specified value (hardware |
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146 | * handshake done). There are two failure modes: "usec" have passed (major |
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147 | * hardware flakeout), or the register reads as all-ones (hardware removed). |
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148 | * |
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149 | * That last failure should_only happen in cases like physical cardbus eject |
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150 | * before driver shutdown. But it also seems to be caused by bugs in cardbus |
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151 | * bridge shutdown: shutting down the bridge before the devices using it. |
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152 | */ |
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153 | static int handshake (u32 *ptr, u32 mask, u32 done, int usec) |
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154 | { |
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155 | u32 result; |
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156 | |||
157 | do { |
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158 | result = readl (ptr); |
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159 | if (result == ~(u32)0) /* card removed */ |
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160 | return -ENODEV; |
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161 | result &= mask; |
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162 | if (result == done) |
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163 | return 0; |
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164 | udelay (1); |
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165 | usec--; |
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166 | } while (usec > 0); |
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167 | return -ETIMEDOUT; |
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168 | } |
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169 | |||
170 | /* |
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171 | * hc states include: unknown, halted, ready, running |
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172 | * transitional states are messy just now |
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173 | * trying to avoid "running" unless urbs are active |
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174 | * a "ready" hc can be finishing prefetched work |
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175 | */ |
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176 | |||
177 | /* force HC to halt state from unknown (EHCI spec section 2.3) */ |
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178 | static int ehci_halt (struct ehci_hcd *ehci) |
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179 | { |
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180 | u32 temp = readl (&ehci->regs->status); |
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181 | |||
182 | if ((temp & STS_HALT) != 0) |
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183 | return 0; |
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184 | |||
185 | temp = readl (&ehci->regs->command); |
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186 | temp &= ~CMD_RUN; |
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187 | writel (temp, &ehci->regs->command); |
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188 | return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125); |
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189 | } |
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190 | |||
191 | /* reset a non-running (STS_HALT == 1) controller */ |
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192 | static int ehci_reset (struct ehci_hcd *ehci) |
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193 | { |
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194 | u32 command = readl (&ehci->regs->command); |
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195 | |||
196 | command |= CMD_RESET; |
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197 | dbg_cmd (ehci, "reset", command); |
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198 | writel (command, &ehci->regs->command); |
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199 | ehci->hcd.state = USB_STATE_HALT; |
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200 | return handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000); |
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201 | } |
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202 | |||
203 | /* idle the controller (from running) */ |
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204 | static void ehci_ready (struct ehci_hcd *ehci) |
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205 | { |
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206 | u32 temp; |
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207 | |||
208 | #ifdef DEBUG |
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209 | if (!HCD_IS_RUNNING (ehci->hcd.state)) |
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210 | BUG (); |
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211 | #endif |
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212 | |||
213 | /* wait for any schedule enables/disables to take effect */ |
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214 | temp = 0; |
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215 | if (ehci->async->qh_next.qh) |
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216 | temp = STS_ASS; |
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217 | if (ehci->next_uframe != -1) |
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218 | temp |= STS_PSS; |
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219 | if (handshake (&ehci->regs->status, STS_ASS | STS_PSS, |
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220 | temp, 16 * 125) != 0) { |
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221 | ehci->hcd.state = USB_STATE_HALT; |
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222 | return; |
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223 | } |
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224 | |||
225 | /* then disable anything that's still active */ |
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226 | temp = readl (&ehci->regs->command); |
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227 | temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE); |
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228 | writel (temp, &ehci->regs->command); |
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229 | |||
230 | /* hardware can take 16 microframes to turn off ... */ |
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231 | if (handshake (&ehci->regs->status, STS_ASS | STS_PSS, |
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232 | 0, 16 * 125) != 0) { |
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233 | ehci->hcd.state = USB_STATE_HALT; |
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234 | return; |
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235 | } |
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236 | } |
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237 | |||
238 | /*-------------------------------------------------------------------------*/ |
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239 | |||
240 | #include "ehci-hub.c" |
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241 | #include "ehci-mem.c" |
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242 | #include "ehci-q.c" |
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243 | #include "ehci-sched.c" |
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244 | |||
245 | /*-------------------------------------------------------------------------*/ |
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246 | |||
247 | static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs); |
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248 | |||
249 | static void ehci_watchdog (unsigned long param) |
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250 | { |
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251 | struct ehci_hcd *ehci = (struct ehci_hcd *) param; |
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252 | unsigned long flags; |
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253 | |||
254 | spin_lock_irqsave (&ehci->lock, flags); |
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255 | |||
256 | /* lost IAA irqs wedge things badly; seen with a vt8235 */ |
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257 | if (ehci->reclaim) { |
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258 | u32 status = readl (&ehci->regs->status); |
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259 | |||
260 | if (status & STS_IAA) { |
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261 | ehci_vdbg (ehci, "lost IAA\n"); |
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262 | COUNT (ehci->stats.lost_iaa); |
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263 | writel (STS_IAA, &ehci->regs->status); |
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264 | ehci->reclaim_ready = 1; |
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265 | } |
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266 | } |
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267 | |||
268 | /* stop async processing after it's idled a bit */ |
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269 | if (test_bit (TIMER_ASYNC_OFF, &ehci->actions)) |
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270 | start_unlink_async (ehci, ehci->async); |
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271 | |||
272 | /* ehci could run by timer, without IRQs ... */ |
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273 | ehci_work (ehci, NULL); |
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274 | |||
275 | spin_unlock_irqrestore (&ehci->lock, flags); |
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276 | } |
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277 | |||
278 | /* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/... |
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279 | * off the controller (maybe it can boot from highspeed USB disks). |
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280 | */ |
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281 | static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) |
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282 | { |
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283 | if (cap & (1 << 16)) { |
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284 | int msec = 500; |
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285 | |||
286 | /* request handoff to OS */ |
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287 | cap &= 1 << 24; |
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288 | pci_write_config_dword (ehci->hcd.pdev, where, cap); |
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289 | |||
290 | /* and wait a while for it to happen */ |
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291 | do { |
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292 | wait_ms (10); |
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293 | msec -= 10; |
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294 | pci_read_config_dword (ehci->hcd.pdev, where, &cap); |
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295 | } while ((cap & (1 << 16)) && msec); |
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296 | if (cap & (1 << 16)) { |
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297 | ehci_err (ehci, "BIOS handoff failed (%d, %04x)\n", |
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298 | where, cap); |
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299 | return 1; |
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300 | } |
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301 | ehci_dbg (ehci, "BIOS handoff succeeded\n"); |
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302 | } |
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303 | return 0; |
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304 | } |
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305 | |||
306 | static int |
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307 | ehci_reboot (struct notifier_block *self, unsigned long code, void *null) |
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308 | { |
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309 | struct ehci_hcd *ehci; |
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310 | |||
311 | ehci = container_of (self, struct ehci_hcd, reboot_notifier); |
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312 | |||
313 | /* make BIOS/etc use companion controller during reboot */ |
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314 | writel (0, &ehci->regs->configured_flag); |
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315 | return 0; |
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316 | } |
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317 | |||
318 | |||
319 | /* called by khubd or root hub init threads */ |
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320 | |||
321 | static int ehci_hc_reset (struct usb_hcd *hcd) |
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322 | { |
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323 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
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324 | u32 temp; |
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325 | |||
326 | spin_lock_init (&ehci->lock); |
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327 | |||
328 | ehci->caps = (struct ehci_caps *) hcd->regs; |
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329 | ehci->regs = (struct ehci_regs *) (hcd->regs + |
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330 | readb (&ehci->caps->length)); |
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331 | dbg_hcs_params (ehci, "reset"); |
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332 | dbg_hcc_params (ehci, "reset"); |
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333 | |||
334 | /* EHCI 0.96 and later may have "extended capabilities" */ |
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335 | temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); |
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336 | while (temp) { |
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337 | u32 cap; |
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338 | |||
339 | pci_read_config_dword (ehci->hcd.pdev, temp, &cap); |
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340 | ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp); |
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341 | switch (cap & 0xff) { |
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342 | case 1: /* BIOS/SMM/... handoff */ |
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343 | if (bios_handoff (ehci, temp, cap) != 0) |
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344 | return -EOPNOTSUPP; |
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345 | break; |
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346 | case 0: /* illegal reserved capability */ |
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347 | ehci_warn (ehci, "illegal capability!\n"); |
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348 | cap = 0; |
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349 | /* FALLTHROUGH */ |
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350 | default: /* unknown */ |
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351 | break; |
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352 | } |
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353 | temp = (cap >> 8) & 0xff; |
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354 | } |
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355 | |||
356 | /* cache this readonly data; minimize PCI reads */ |
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357 | ehci->hcs_params = readl (&ehci->caps->hcs_params); |
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358 | |||
359 | /* force HC to halt state */ |
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360 | return ehci_halt (ehci); |
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361 | } |
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362 | |||
363 | static int ehci_start (struct usb_hcd *hcd) |
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364 | { |
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365 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
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366 | u32 temp; |
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367 | struct usb_device *udev; |
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368 | struct usb_bus *bus; |
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369 | int retval; |
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370 | u32 hcc_params; |
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371 | u8 tempbyte; |
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372 | |||
373 | /* |
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374 | * hw default: 1K periodic list heads, one per frame. |
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375 | * periodic_size can shrink by USBCMD update if hcc_params allows. |
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376 | */ |
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377 | ehci->periodic_size = DEFAULT_I_TDPS; |
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378 | if ((retval = ehci_mem_init (ehci, SLAB_KERNEL)) < 0) |
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379 | return retval; |
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380 | |||
381 | /* controllers may cache some of the periodic schedule ... */ |
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382 | hcc_params = readl (&ehci->caps->hcc_params); |
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383 | if (HCC_ISOC_CACHE (hcc_params)) // full frame cache |
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384 | ehci->i_thresh = 8; |
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385 | else // N microframes cached |
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386 | ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params); |
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387 | |||
388 | ehci->reclaim = 0; |
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389 | ehci->next_uframe = -1; |
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390 | |||
391 | /* controller state: unknown --> reset */ |
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392 | |||
393 | /* EHCI spec section 4.1 */ |
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394 | if ((retval = ehci_reset (ehci)) != 0) { |
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395 | ehci_mem_cleanup (ehci); |
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396 | return retval; |
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397 | } |
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398 | writel (INTR_MASK, &ehci->regs->intr_enable); |
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399 | writel (ehci->periodic_dma, &ehci->regs->frame_list); |
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400 | |||
401 | /* |
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402 | * dedicate a qh for the async ring head, since we couldn't unlink |
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403 | * a 'real' qh without stopping the async schedule [4.8]. use it |
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404 | * as the 'reclamation list head' too. |
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405 | * its dummy is used in hw_alt_next of many tds, to prevent the qh |
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406 | * from automatically advancing to the next td after short reads. |
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407 | */ |
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408 | ehci->async->qh_next.qh = 0; |
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409 | ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma); |
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410 | ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD); |
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411 | ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT); |
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412 | ehci->async->hw_qtd_next = EHCI_LIST_END; |
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413 | ehci->async->qh_state = QH_STATE_LINKED; |
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414 | ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma); |
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415 | writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next); |
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416 | |||
417 | /* |
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418 | * hcc_params controls whether ehci->regs->segment must (!!!) |
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419 | * be used; it constrains QH/ITD/SITD and QTD locations. |
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420 | * pci_pool consistent memory always uses segment zero. |
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421 | * streaming mappings for I/O buffers, like pci_map_single(), |
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422 | * can return segments above 4GB, if the device allows. |
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423 | * |
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424 | * NOTE: the dma mask is visible through dma_supported(), so |
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425 | * drivers can pass this info along ... like NETIF_F_HIGHDMA, |
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426 | * Scsi_Host.highmem_io, and so forth. It's readonly to all |
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427 | * host side drivers though. |
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428 | */ |
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429 | if (HCC_64BIT_ADDR (hcc_params)) { |
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430 | writel (0, &ehci->regs->segment); |
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431 | #if 0 |
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432 | // this is deeply broken on almost all architectures |
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433 | if (!pci_set_dma_mask (ehci->hcd.pdev, 0xffffffffffffffffULL)) |
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434 | ehci_info (ehci, "enabled 64bit PCI DMA\n"); |
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435 | #endif |
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436 | } |
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437 | |||
438 | /* help hc dma work well with cachelines */ |
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439 | pci_set_mwi (ehci->hcd.pdev); |
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440 | |||
441 | /* clear interrupt enables, set irq latency */ |
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442 | temp = readl (&ehci->regs->command) & 0x0fff; |
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443 | if (log2_irq_thresh < 0 || log2_irq_thresh > 6) |
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444 | log2_irq_thresh = 0; |
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445 | temp |= 1 << (16 + log2_irq_thresh); |
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446 | // if hc can park (ehci >= 0.96), default is 3 packets per async QH |
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447 | if (HCC_PGM_FRAMELISTLEN (hcc_params)) { |
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448 | /* periodic schedule size can be smaller than default */ |
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449 | temp &= ~(3 << 2); |
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450 | temp |= (EHCI_TUNE_FLS << 2); |
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451 | switch (EHCI_TUNE_FLS) { |
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452 | case 0: ehci->periodic_size = 1024; break; |
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453 | case 1: ehci->periodic_size = 512; break; |
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454 | case 2: ehci->periodic_size = 256; break; |
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455 | default: BUG (); |
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456 | } |
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457 | } |
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458 | temp &= ~(CMD_IAAD | CMD_ASE | CMD_PSE), |
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459 | // Philips, Intel, and maybe others need CMD_RUN before the |
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460 | // root hub will detect new devices (why?); NEC doesn't |
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461 | temp |= CMD_RUN; |
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462 | writel (temp, &ehci->regs->command); |
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463 | dbg_cmd (ehci, "init", temp); |
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464 | |||
465 | /* set async sleep time = 10 us ... ? */ |
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466 | |||
467 | init_timer (&ehci->watchdog); |
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468 | ehci->watchdog.function = ehci_watchdog; |
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469 | ehci->watchdog.data = (unsigned long) ehci; |
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470 | |||
471 | /* wire up the root hub */ |
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472 | bus = hcd_to_bus (hcd); |
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473 | bus->root_hub = udev = usb_alloc_dev (NULL, bus); |
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474 | if (!udev) { |
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475 | done2: |
||
476 | ehci_mem_cleanup (ehci); |
||
477 | return -ENOMEM; |
||
478 | } |
||
479 | |||
480 | /* |
||
481 | * Start, enabling full USB 2.0 functionality ... usb 1.1 devices |
||
482 | * are explicitly handed to companion controller(s), so no TT is |
||
483 | * involved with the root hub. |
||
484 | */ |
||
485 | ehci->reboot_notifier.notifier_call = ehci_reboot; |
||
486 | register_reboot_notifier (&ehci->reboot_notifier); |
||
487 | |||
488 | ehci->hcd.state = USB_STATE_RUNNING; |
||
489 | writel (FLAG_CF, &ehci->regs->configured_flag); |
||
490 | readl (&ehci->regs->command); /* unblock posted write */ |
||
491 | |||
492 | /* PCI Serial Bus Release Number is at 0x60 offset */ |
||
493 | pci_read_config_byte (hcd->pdev, 0x60, &tempbyte); |
||
494 | temp = readw (&ehci->caps->hci_version); |
||
495 | ehci_info (ehci, |
||
496 | "USB %x.%x enabled, EHCI %x.%02x, driver %s\n", |
||
497 | ((tempbyte & 0xf0)>>4), (tempbyte & 0x0f), |
||
498 | temp >> 8, temp & 0xff, DRIVER_VERSION); |
||
499 | |||
500 | /* |
||
501 | * From here on, khubd concurrently accesses the root |
||
502 | * hub; drivers will be talking to enumerated devices. |
||
503 | * |
||
504 | * Before this point the HC was idle/ready. After, khubd |
||
505 | * and device drivers may start it running. |
||
506 | */ |
||
507 | udev->speed = USB_SPEED_HIGH; |
||
508 | if (hcd_register_root (hcd) != 0) { |
||
509 | if (hcd->state == USB_STATE_RUNNING) |
||
510 | ehci_ready (ehci); |
||
511 | ehci_reset (ehci); |
||
512 | bus->root_hub = 0; |
||
513 | usb_put_dev (udev); |
||
514 | retval = -ENODEV; |
||
515 | goto done2; |
||
516 | } |
||
517 | |||
518 | create_debug_files (ehci); |
||
519 | |||
520 | return 0; |
||
521 | } |
||
522 | |||
523 | /* always called by thread; normally rmmod */ |
||
524 | |||
525 | static void ehci_stop (struct usb_hcd *hcd) |
||
526 | { |
||
527 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
||
528 | |||
529 | ehci_dbg (ehci, "stop\n"); |
||
530 | |||
531 | /* no more interrupts ... */ |
||
532 | if (hcd->state == USB_STATE_RUNNING) |
||
533 | ehci_ready (ehci); |
||
534 | if (in_interrupt ()) { /* must not happen!! */ |
||
535 | ehci_err (ehci, "stopped in_interrupt!\n"); |
||
536 | return; |
||
537 | } |
||
538 | del_timer_sync (&ehci->watchdog); |
||
539 | ehci_reset (ehci); |
||
540 | |||
541 | /* let companion controllers work when we aren't */ |
||
542 | writel (0, &ehci->regs->configured_flag); |
||
543 | unregister_reboot_notifier (&ehci->reboot_notifier); |
||
544 | |||
545 | remove_debug_files (ehci); |
||
546 | |||
547 | /* root hub is shut down separately (first, when possible) */ |
||
548 | spin_lock_irq (&ehci->lock); |
||
549 | ehci_work (ehci, NULL); |
||
550 | spin_unlock_irq (&ehci->lock); |
||
551 | ehci_mem_cleanup (ehci); |
||
552 | |||
553 | #ifdef EHCI_STATS |
||
554 | ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n", |
||
555 | ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim, |
||
556 | ehci->stats.lost_iaa); |
||
557 | ehci_dbg (ehci, "complete %ld unlink %ld\n", |
||
558 | ehci->stats.complete, ehci->stats.unlink); |
||
559 | #endif |
||
560 | |||
561 | dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status)); |
||
562 | } |
||
563 | |||
564 | static int ehci_get_frame (struct usb_hcd *hcd) |
||
565 | { |
||
566 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
||
567 | return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size; |
||
568 | } |
||
569 | |||
570 | /*-------------------------------------------------------------------------*/ |
||
571 | |||
572 | #ifdef CONFIG_PM |
||
573 | |||
574 | /* suspend/resume, section 4.3 */ |
||
575 | |||
576 | static int ehci_suspend (struct usb_hcd *hcd, u32 state) |
||
577 | { |
||
578 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
||
579 | int ports; |
||
580 | int i; |
||
581 | |||
582 | ehci_dbg (ehci, "suspend to %d\n", state); |
||
583 | |||
584 | ports = HCS_N_PORTS (ehci->hcs_params); |
||
585 | |||
586 | // FIXME: This assumes what's probably a D3 level suspend... |
||
587 | |||
588 | // FIXME: usb wakeup events on this bus should resume the machine. |
||
589 | // pci config register PORTWAKECAP controls which ports can do it; |
||
590 | // bios may have initted the register... |
||
591 | |||
592 | /* suspend each port, then stop the hc */ |
||
593 | for (i = 0; i < ports; i++) { |
||
594 | int temp = readl (&ehci->regs->port_status [i]); |
||
595 | |||
596 | if ((temp & PORT_PE) == 0 |
||
597 | || (temp & PORT_OWNER) != 0) |
||
598 | continue; |
||
599 | ehci_dbg (ehci, "suspend port %d", i); |
||
600 | temp |= PORT_SUSPEND; |
||
601 | writel (temp, &ehci->regs->port_status [i]); |
||
602 | } |
||
603 | |||
604 | if (hcd->state == USB_STATE_RUNNING) |
||
605 | ehci_ready (ehci); |
||
606 | writel (readl (&ehci->regs->command) & ~CMD_RUN, &ehci->regs->command); |
||
607 | |||
608 | // save pci FLADJ value |
||
609 | |||
610 | /* who tells PCI to reduce power consumption? */ |
||
611 | |||
612 | return 0; |
||
613 | } |
||
614 | |||
615 | static int ehci_resume (struct usb_hcd *hcd) |
||
616 | { |
||
617 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
||
618 | int ports; |
||
619 | int i; |
||
620 | |||
621 | ehci_dbg (ehci, "resume\n"); |
||
622 | |||
623 | ports = HCS_N_PORTS (ehci->hcs_params); |
||
624 | |||
625 | // FIXME: if controller didn't retain state, |
||
626 | // return and let generic code clean it up |
||
627 | // test configured_flag ? |
||
628 | |||
629 | /* resume HC and each port */ |
||
630 | // restore pci FLADJ value |
||
631 | // khubd and drivers will set HC running, if needed; |
||
632 | hcd->state = USB_STATE_RUNNING; |
||
633 | // FIXME Philips/Intel/... etc don't really have a "READY" |
||
634 | // state ... turn on CMD_RUN too |
||
635 | for (i = 0; i < ports; i++) { |
||
636 | int temp = readl (&ehci->regs->port_status [i]); |
||
637 | |||
638 | if ((temp & PORT_PE) == 0 |
||
639 | || (temp & PORT_SUSPEND) != 0) |
||
640 | continue; |
||
641 | ehci_dbg (ehci, "resume port %d", i); |
||
642 | temp |= PORT_RESUME; |
||
643 | writel (temp, &ehci->regs->port_status [i]); |
||
644 | readl (&ehci->regs->command); /* unblock posted writes */ |
||
645 | |||
646 | wait_ms (20); |
||
647 | temp &= ~PORT_RESUME; |
||
648 | writel (temp, &ehci->regs->port_status [i]); |
||
649 | } |
||
650 | readl (&ehci->regs->command); /* unblock posted writes */ |
||
651 | return 0; |
||
652 | } |
||
653 | |||
654 | #endif |
||
655 | |||
656 | /*-------------------------------------------------------------------------*/ |
||
657 | |||
658 | /* |
||
659 | * ehci_work is called from some interrupts, timers, and so on. |
||
660 | * it calls driver completion functions, after dropping ehci->lock. |
||
661 | */ |
||
662 | static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs) |
||
663 | { |
||
664 | timer_action_done (ehci, TIMER_IO_WATCHDOG); |
||
665 | if (ehci->reclaim_ready) |
||
666 | end_unlink_async (ehci, regs); |
||
667 | scan_async (ehci, regs); |
||
668 | if (ehci->next_uframe != -1) |
||
669 | scan_periodic (ehci, regs); |
||
670 | |||
671 | /* the IO watchdog guards against hardware or driver bugs that |
||
672 | * misplace IRQs, and should let us run completely without IRQs. |
||
673 | */ |
||
674 | if ((ehci->async->qh_next.ptr != 0) || (ehci->periodic_sched != 0)) |
||
675 | timer_action (ehci, TIMER_IO_WATCHDOG); |
||
676 | } |
||
677 | |||
678 | /*-------------------------------------------------------------------------*/ |
||
679 | |||
680 | static void ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs) |
||
681 | { |
||
682 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
||
683 | u32 status; |
||
684 | int bh; |
||
685 | |||
686 | spin_lock (&ehci->lock); |
||
687 | |||
688 | status = readl (&ehci->regs->status); |
||
689 | |||
690 | /* e.g. cardbus physical eject */ |
||
691 | if (status == ~(u32) 0) { |
||
692 | ehci_dbg (ehci, "device removed\n"); |
||
693 | goto dead; |
||
694 | } |
||
695 | |||
696 | status &= INTR_MASK; |
||
697 | if (!status) /* irq sharing? */ |
||
698 | goto done; |
||
699 | |||
700 | /* clear (just) interrupts */ |
||
701 | writel (status, &ehci->regs->status); |
||
702 | readl (&ehci->regs->command); /* unblock posted write */ |
||
703 | bh = 0; |
||
704 | |||
705 | #ifdef EHCI_VERBOSE_DEBUG |
||
706 | /* unrequested/ignored: Port Change Detect, Frame List Rollover */ |
||
707 | dbg_status (ehci, "irq", status); |
||
708 | #endif |
||
709 | |||
710 | /* INT, ERR, and IAA interrupt rates can be throttled */ |
||
711 | |||
712 | /* normal [4.15.1.2] or error [4.15.1.1] completion */ |
||
713 | if (likely ((status & (STS_INT|STS_ERR)) != 0)) { |
||
714 | if (likely ((status & STS_ERR) == 0)) |
||
715 | COUNT (ehci->stats.normal); |
||
716 | else |
||
717 | COUNT (ehci->stats.error); |
||
718 | bh = 1; |
||
719 | } |
||
720 | |||
721 | /* complete the unlinking of some qh [4.15.2.3] */ |
||
722 | if (status & STS_IAA) { |
||
723 | COUNT (ehci->stats.reclaim); |
||
724 | ehci->reclaim_ready = 1; |
||
725 | bh = 1; |
||
726 | } |
||
727 | |||
728 | /* PCI errors [4.15.2.4] */ |
||
729 | if (unlikely ((status & STS_FATAL) != 0)) { |
||
730 | ehci_err (ehci, "fatal error\n"); |
||
731 | dead: |
||
732 | ehci_reset (ehci); |
||
733 | /* generic layer kills/unlinks all urbs, then |
||
734 | * uses ehci_stop to clean up the rest |
||
735 | */ |
||
736 | bh = 1; |
||
737 | } |
||
738 | |||
739 | if (bh) |
||
740 | ehci_work (ehci, regs); |
||
741 | done: |
||
742 | spin_unlock (&ehci->lock); |
||
743 | } |
||
744 | |||
745 | /*-------------------------------------------------------------------------*/ |
||
746 | |||
747 | /* |
||
748 | * non-error returns are a promise to giveback() the urb later |
||
749 | * we drop ownership so next owner (or urb unlink) can get it |
||
750 | * |
||
751 | * urb + dev is in hcd_dev.urb_list |
||
752 | * we're queueing TDs onto software and hardware lists |
||
753 | * |
||
754 | * hcd-specific init for hcpriv hasn't been done yet |
||
755 | * |
||
756 | * NOTE: control, bulk, and interrupt share the same code to append TDs |
||
757 | * to a (possibly active) QH, and the same QH scanning code. |
||
758 | */ |
||
759 | static int ehci_urb_enqueue ( |
||
760 | struct usb_hcd *hcd, |
||
761 | struct urb *urb, |
||
762 | int mem_flags |
||
763 | ) { |
||
764 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
||
765 | struct list_head qtd_list; |
||
766 | |||
767 | urb->transfer_flags &= ~EHCI_STATE_UNLINK; |
||
768 | INIT_LIST_HEAD (&qtd_list); |
||
769 | |||
770 | switch (usb_pipetype (urb->pipe)) { |
||
771 | // case PIPE_CONTROL: |
||
772 | // case PIPE_BULK: |
||
773 | default: |
||
774 | if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) |
||
775 | return -ENOMEM; |
||
776 | return submit_async (ehci, urb, &qtd_list, mem_flags); |
||
777 | |||
778 | case PIPE_INTERRUPT: |
||
779 | if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) |
||
780 | return -ENOMEM; |
||
781 | return intr_submit (ehci, urb, &qtd_list, mem_flags); |
||
782 | |||
783 | case PIPE_ISOCHRONOUS: |
||
784 | if (urb->dev->speed == USB_SPEED_HIGH) |
||
785 | return itd_submit (ehci, urb, mem_flags); |
||
786 | #ifdef have_split_iso |
||
787 | else |
||
788 | return sitd_submit (ehci, urb, mem_flags); |
||
789 | #else |
||
790 | dbg ("no split iso support yet"); |
||
791 | return -ENOSYS; |
||
792 | #endif /* have_split_iso */ |
||
793 | } |
||
794 | } |
||
795 | |||
796 | /* remove from hardware lists |
||
797 | * completions normally happen asynchronously |
||
798 | */ |
||
799 | |||
800 | static int ehci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb) |
||
801 | { |
||
802 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
||
803 | struct ehci_qh *qh; |
||
804 | unsigned long flags; |
||
805 | |||
806 | spin_lock_irqsave (&ehci->lock, flags); |
||
807 | switch (usb_pipetype (urb->pipe)) { |
||
808 | // case PIPE_CONTROL: |
||
809 | // case PIPE_BULK: |
||
810 | default: |
||
811 | qh = (struct ehci_qh *) urb->hcpriv; |
||
812 | if (!qh) |
||
813 | break; |
||
814 | |||
815 | /* if we need to use IAA and it's busy, defer */ |
||
816 | if (qh->qh_state == QH_STATE_LINKED |
||
817 | && ehci->reclaim |
||
818 | && HCD_IS_RUNNING (ehci->hcd.state) |
||
819 | ) { |
||
820 | struct ehci_qh *last; |
||
821 | |||
822 | for (last = ehci->reclaim; |
||
823 | last->reclaim; |
||
824 | last = last->reclaim) |
||
825 | continue; |
||
826 | qh->qh_state = QH_STATE_UNLINK_WAIT; |
||
827 | last->reclaim = qh; |
||
828 | |||
829 | /* bypass IAA if the hc can't care */ |
||
830 | } else if (!HCD_IS_RUNNING (ehci->hcd.state) && ehci->reclaim) |
||
831 | end_unlink_async (ehci, NULL); |
||
832 | |||
833 | /* something else might have unlinked the qh by now */ |
||
834 | if (qh->qh_state == QH_STATE_LINKED) |
||
835 | start_unlink_async (ehci, qh); |
||
836 | break; |
||
837 | |||
838 | case PIPE_INTERRUPT: |
||
839 | qh = (struct ehci_qh *) urb->hcpriv; |
||
840 | if (!qh) |
||
841 | break; |
||
842 | if (qh->qh_state == QH_STATE_LINKED) { |
||
843 | /* messy, can spin or block a microframe ... */ |
||
844 | intr_deschedule (ehci, qh, 1); |
||
845 | /* qh_state == IDLE */ |
||
846 | } |
||
847 | qh_completions (ehci, qh, NULL); |
||
848 | |||
849 | /* reschedule QH iff another request is queued */ |
||
850 | if (!list_empty (&qh->qtd_list) |
||
851 | && HCD_IS_RUNNING (ehci->hcd.state)) { |
||
852 | int status; |
||
853 | |||
854 | status = qh_schedule (ehci, qh); |
||
855 | spin_unlock_irqrestore (&ehci->lock, flags); |
||
856 | |||
857 | if (status != 0) { |
||
858 | // shouldn't happen often, but ... |
||
859 | // FIXME kill those tds' urbs |
||
860 | err ("can't reschedule qh %p, err %d", |
||
861 | qh, status); |
||
862 | } |
||
863 | return status; |
||
864 | } |
||
865 | break; |
||
866 | |||
867 | case PIPE_ISOCHRONOUS: |
||
868 | // itd or sitd ... |
||
869 | |||
870 | // wait till next completion, do it then. |
||
871 | // completion irqs can wait up to 1024 msec, |
||
872 | urb->transfer_flags |= EHCI_STATE_UNLINK; |
||
873 | break; |
||
874 | } |
||
875 | spin_unlock_irqrestore (&ehci->lock, flags); |
||
876 | return 0; |
||
877 | } |
||
878 | |||
879 | /*-------------------------------------------------------------------------*/ |
||
880 | |||
881 | // bulk qh holds the data toggle |
||
882 | |||
883 | static void |
||
884 | ehci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep) |
||
885 | { |
||
886 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
||
887 | int epnum; |
||
888 | unsigned long flags; |
||
889 | struct ehci_qh *qh; |
||
890 | |||
891 | /* ASSERT: any requests/urbs are being unlinked */ |
||
892 | /* ASSERT: nobody can be submitting urbs for this any more */ |
||
893 | |||
894 | epnum = ep & USB_ENDPOINT_NUMBER_MASK; |
||
895 | if (epnum != 0 && (ep & USB_DIR_IN)) |
||
896 | epnum |= 0x10; |
||
897 | |||
898 | rescan: |
||
899 | spin_lock_irqsave (&ehci->lock, flags); |
||
900 | qh = (struct ehci_qh *) dev->ep [epnum]; |
||
901 | if (!qh) |
||
902 | goto done; |
||
903 | |||
904 | if (!HCD_IS_RUNNING (ehci->hcd.state)) |
||
905 | qh->qh_state = QH_STATE_IDLE; |
||
906 | switch (qh->qh_state) { |
||
907 | case QH_STATE_UNLINK: /* wait for hw to finish? */ |
||
908 | spin_unlock_irqrestore (&ehci->lock, flags); |
||
909 | set_current_state (TASK_UNINTERRUPTIBLE); |
||
910 | schedule_timeout (1); |
||
911 | goto rescan; |
||
912 | case QH_STATE_IDLE: /* fully unlinked */ |
||
913 | if (list_empty (&qh->qtd_list)) { |
||
914 | qh_put (ehci, qh); |
||
915 | break; |
||
916 | } |
||
917 | /* else FALL THROUGH */ |
||
918 | default: |
||
919 | /* caller was supposed to have unlinked any requests; |
||
920 | * that's not our job. just leak this memory. |
||
921 | */ |
||
922 | ehci_err (ehci, "qh %p (#%d) state %d%s\n", |
||
923 | qh, epnum, qh->qh_state, |
||
924 | list_empty (&qh->qtd_list) ? "" : "(has tds)"); |
||
925 | break; |
||
926 | } |
||
927 | dev->ep [epnum] = 0; |
||
928 | done: |
||
929 | spin_unlock_irqrestore (&ehci->lock, flags); |
||
930 | return; |
||
931 | } |
||
932 | |||
933 | /*-------------------------------------------------------------------------*/ |
||
934 | |||
935 | static const struct hc_driver ehci_driver = { |
||
936 | .description = hcd_name, |
||
937 | |||
938 | /* |
||
939 | * generic hardware linkage |
||
940 | */ |
||
941 | .irq = ehci_irq, |
||
942 | .flags = HCD_MEMORY | HCD_USB2, |
||
943 | |||
944 | /* |
||
945 | * basic lifecycle operations |
||
946 | */ |
||
947 | .reset = ehci_hc_reset, |
||
948 | .start = ehci_start, |
||
949 | #ifdef CONFIG_PM |
||
950 | .suspend = ehci_suspend, |
||
951 | .resume = ehci_resume, |
||
952 | #endif |
||
953 | .stop = ehci_stop, |
||
954 | |||
955 | /* |
||
956 | * memory lifecycle (except per-request) |
||
957 | */ |
||
958 | .hcd_alloc = ehci_hcd_alloc, |
||
959 | .hcd_free = ehci_hcd_free, |
||
960 | |||
961 | /* |
||
962 | * managing i/o requests and associated device resources |
||
963 | */ |
||
964 | .urb_enqueue = ehci_urb_enqueue, |
||
965 | .urb_dequeue = ehci_urb_dequeue, |
||
966 | .endpoint_disable = ehci_endpoint_disable, |
||
967 | |||
968 | /* |
||
969 | * scheduling support |
||
970 | */ |
||
971 | .get_frame_number = ehci_get_frame, |
||
972 | |||
973 | /* |
||
974 | * root hub support |
||
975 | */ |
||
976 | .hub_status_data = ehci_hub_status_data, |
||
977 | .hub_control = ehci_hub_control, |
||
978 | }; |
||
979 | |||
980 | /*-------------------------------------------------------------------------*/ |
||
981 | |||
982 | /* EHCI spec says PCI is required. */ |
||
983 | |||
984 | /* PCI driver selection metadata; PCI hotplugging uses this */ |
||
985 | static const struct pci_device_id pci_ids [] = { { |
||
986 | /* handle any USB 2.0 EHCI controller */ |
||
987 | PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0), |
||
988 | .driver_data = (unsigned long) &ehci_driver, |
||
989 | }, |
||
990 | { /* end: all zeroes */ } |
||
991 | }; |
||
992 | MODULE_DEVICE_TABLE (pci, pci_ids); |
||
993 | |||
994 | /* pci driver glue; this is a "new style" PCI driver module */ |
||
995 | static struct pci_driver ehci_pci_driver = { |
||
996 | .name = (char *) hcd_name, |
||
997 | .id_table = pci_ids, |
||
998 | |||
999 | .probe = usb_hcd_pci_probe, |
||
1000 | .remove = usb_hcd_pci_remove, |
||
1001 | |||
1002 | #ifdef CONFIG_PM |
||
1003 | .suspend = usb_hcd_pci_suspend, |
||
1004 | .resume = usb_hcd_pci_resume, |
||
1005 | #endif |
||
1006 | }; |
||
1007 | |||
1008 | #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC |
||
1009 | |||
1010 | MODULE_DESCRIPTION (DRIVER_INFO); |
||
1011 | MODULE_AUTHOR (DRIVER_AUTHOR); |
||
1012 | MODULE_LICENSE ("GPL"); |
||
1013 | |||
1014 | static int __init init (void) |
||
1015 | { |
||
1016 | if (usb_disabled()) |
||
1017 | return -ENODEV; |
||
1018 | |||
1019 | pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", |
||
1020 | hcd_name, |
||
1021 | sizeof (struct ehci_qh), sizeof (struct ehci_qtd), |
||
1022 | sizeof (struct ehci_itd), sizeof (struct ehci_sitd)); |
||
1023 | |||
1024 | return pci_module_init (&ehci_pci_driver); |
||
1025 | } |
||
1026 | module_init (init); |
||
1027 | |||
1028 | static void __exit cleanup (void) |
||
1029 | { |
||
1030 | pci_unregister_driver (&ehci_pci_driver); |
||
1031 | } |
||
1032 | module_exit (cleanup); |