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Rev | Author | Line No. | Line |
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582 | mauro | 1 | /* |
2 | * (c) 2003 Advanced Micro Devices, Inc. |
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3 | * Your use of this code is subject to the terms and conditions of the |
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4 | * GNU general public license version 2. See "../../../COPYING" or |
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5 | * http://www.gnu.org/licenses/gpl.html |
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6 | * |
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7 | * Support : paul.devriendt@amd.com |
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8 | * |
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9 | * Based on the powernow-k7.c module written by Dave Jones. |
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10 | * (C) 2003 Dave Jones <davej@codemonkey.ork.uk> on behalf of SuSE Labs |
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11 | * Licensed under the terms of the GNU GPL License version 2. |
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12 | * Based upon datasheets & sample CPUs kindly provided by AMD. |
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13 | * |
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14 | * Processor information obtained from Chapter 9 (Power and Thermal Management) |
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15 | * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD |
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16 | * Opteron Processors", revision 3.03, available for download from www.amd.com |
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17 | * |
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18 | */ |
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19 | |||
20 | #include <linuxcomp.h> |
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21 | |||
22 | #include <linux/kernel.h> |
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23 | #include <linux/smp.h> |
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24 | #include <linux/module.h> |
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25 | #include <linux/init.h> |
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26 | #include <linux/cpufreq.h> |
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27 | #include <linux/slab.h> |
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28 | #include <linux/string.h> |
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29 | |||
30 | #include <asm/msr.h> |
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31 | #include <asm/io.h> |
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32 | #include <asm/delay.h> |
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33 | |||
769 | mauro | 34 | #define DEBUG |
35 | |||
36 | #ifdef DEBUG |
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37 | #define dprintk(msg...) printk(msg) |
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38 | #else |
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39 | #define dprintk(msg...) do { } while(0) |
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40 | #endif |
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41 | |||
582 | mauro | 42 | #define PFX "powernow-k8: " |
43 | #define BFX PFX "BIOS error: " |
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44 | #define VERSION "version 1.00.08 - September 26, 2003" |
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45 | #include "powernow-k8.h" |
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46 | |||
47 | #ifdef CONFIG_PREEMPT |
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48 | #warning this driver has not been tested on a preempt system |
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49 | #endif |
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50 | |||
51 | extern struct cpuinfo_x86 new_cpu_data; |
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52 | |||
53 | static u32 vstable; /* voltage stabalization time, from PSB, units 20 us */ |
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54 | static u32 plllock; /* pll lock time, from PSB, units 1 us */ |
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55 | static u32 numps; /* number of p-states, from PSB */ |
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56 | static u32 rvo; /* ramp voltage offset, from PSB */ |
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57 | static u32 irt; /* isochronous relief time, from PSB */ |
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58 | static u32 vidmvs; /* usable value calculated from mvs, from PSB */ |
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59 | struct pst_s *ppst; /* array of p states, valid for this part */ |
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60 | static u32 currvid; /* keep track of the current fid / vid */ |
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61 | static u32 currfid; |
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62 | |||
63 | /* |
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64 | The PSB table supplied by BIOS allows for the definition of the number of |
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65 | p-states that can be used when running on a/c, and the number of p-states |
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66 | that can be used when running on battery. This allows laptop manufacturers |
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67 | to force the system to save power when running from battery. The relationship |
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68 | is : |
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69 | 1 <= number_of_battery_p_states <= maximum_number_of_p_states |
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70 | |||
71 | This driver does NOT have the support in it to detect transitions from |
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72 | a/c power to battery power, and thus trigger the transition to a lower |
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73 | p-state if required. This is because I need ACPI and the 2.6 kernel to do |
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74 | this, and this is a 2.4 kernel driver. Check back for a new improved driver |
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75 | for the 2.6 kernel soon. |
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76 | |||
77 | This code therefore assumes it is on battery at all times, and thus |
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78 | restricts performance to number_of_battery_p_states. For desktops, |
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79 | number_of_battery_p_states == maximum_number_of_pstates, |
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80 | so this is not actually a restriction. |
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81 | */ |
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82 | |||
83 | static u32 batps; /* limit on the number of p states when on battery */ |
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84 | /* - set by BIOS in the PSB/PST */ |
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85 | |||
86 | static struct cpufreq_driver cpufreq_amd64_driver = { |
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87 | .verify = powernowk8_verify, |
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88 | .target = powernowk8_target, |
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89 | .init = powernowk8_cpu_init, |
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90 | .name = "cpufreq-amd64", |
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91 | .owner = THIS_MODULE, |
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92 | }; |
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93 | |||
94 | #define SEARCH_UP 1 |
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95 | #define SEARCH_DOWN 0 |
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96 | |||
97 | /* Return a frequency in MHz, given an input fid */ |
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98 | u32 find_freq_from_fid(u32 fid) |
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99 | { |
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100 | return 800 + (fid * 100); |
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101 | } |
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102 | |||
103 | /* Return a fid matching an input frequency in MHz */ |
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104 | static u32 find_fid_from_freq(u32 freq) |
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105 | { |
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106 | return (freq - 800) / 100; |
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107 | } |
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108 | |||
109 | /* Return the vco fid for an input fid */ |
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110 | static u32 convert_fid_to_vco_fid(u32 fid) |
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111 | { |
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112 | if (fid < HI_FID_TABLE_BOTTOM) { |
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113 | return 8 + (2 * fid); |
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114 | } else { |
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115 | return fid; |
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116 | } |
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117 | } |
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118 | |||
119 | /* Sort the fid/vid frequency table into ascending order by fid. The spec */ |
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120 | /* implies that it will be sorted by BIOS, but, it only implies it, and I */ |
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121 | /* prefer not to trust when I can check. */ |
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122 | /* Yes, it is a simple bubble sort, but the PST is really small, so the */ |
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123 | /* choice of algorithm is pretty irrelevant. */ |
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124 | static inline void sort_pst(struct pst_s *ppst, u32 numpstates) |
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125 | { |
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126 | u32 i; |
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127 | u8 tempfid; |
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128 | u8 tempvid; |
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129 | int swaps = 1; |
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130 | |||
131 | while (swaps) { |
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132 | swaps = 0; |
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133 | for (i = 0; i < (numpstates - 1); i++) { |
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134 | if (ppst[i].fid > ppst[i + 1].fid) { |
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135 | swaps = 1; |
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136 | tempfid = ppst[i].fid; |
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137 | tempvid = ppst[i].vid; |
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138 | ppst[i].fid = ppst[i + 1].fid; |
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139 | ppst[i].vid = ppst[i + 1].vid; |
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140 | ppst[i + 1].fid = tempfid; |
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141 | ppst[i + 1].vid = tempvid; |
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142 | } |
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143 | } |
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144 | } |
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145 | |||
146 | return; |
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147 | } |
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148 | |||
149 | /* Return 1 if the pending bit is set. Unless we are actually just told the */ |
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150 | /* processor to transition a state, seeing this bit set is really bad news. */ |
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151 | static inline int pending_bit_stuck(void) |
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152 | { |
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153 | u32 lo; |
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154 | u32 hi; |
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155 | |||
156 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
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157 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; |
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158 | } |
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159 | |||
160 | /* Update the global current fid / vid values from the status msr. Returns 1 */ |
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161 | /* on error. */ |
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162 | static int query_current_values_with_pending_wait(void) |
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163 | { |
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164 | u32 lo; |
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165 | u32 hi; |
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166 | u32 i = 0; |
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167 | |||
168 | lo = MSR_S_LO_CHANGE_PENDING; |
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169 | while (lo & MSR_S_LO_CHANGE_PENDING) { |
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170 | if (i++ > 0x1000000) { |
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171 | printk(KERN_ERR PFX "detected change pending stuck\n"); |
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172 | return 1; |
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173 | } |
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174 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
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175 | } |
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176 | |||
177 | currvid = hi & MSR_S_HI_CURRENT_VID; |
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178 | currfid = lo & MSR_S_LO_CURRENT_FID; |
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179 | |||
180 | return 0; |
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181 | } |
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182 | |||
183 | /* the isochronous relief time */ |
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184 | static inline void count_off_irt(void) |
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185 | { |
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186 | udelay((1 << irt) * 10); |
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187 | return; |
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188 | } |
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189 | |||
190 | /* the voltage stabalization time */ |
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191 | static inline void count_off_vst(void) |
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192 | { |
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193 | udelay(vstable * VST_UNITS_20US); |
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194 | return; |
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195 | } |
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196 | |||
197 | /* write the new fid value along with the other control fields to the msr */ |
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198 | static int write_new_fid(u32 fid) |
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199 | { |
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200 | u32 lo; |
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201 | u32 savevid = currvid; |
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202 | |||
203 | if ((fid & INVALID_FID_MASK) || (currvid & INVALID_VID_MASK)) { |
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204 | printk(KERN_ERR PFX "internal error - overflow on fid write\n"); |
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205 | return 1; |
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206 | } |
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207 | |||
208 | lo = fid | (currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; |
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209 | |||
210 | dprintk(KERN_DEBUG PFX "writing fid %x, lo %x, hi %x\n", |
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211 | fid, lo, plllock * PLL_LOCK_CONVERSION); |
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212 | |||
213 | wrmsr(MSR_FIDVID_CTL, lo, plllock * PLL_LOCK_CONVERSION); |
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214 | |||
215 | if (query_current_values_with_pending_wait()) |
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216 | return 1; |
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217 | |||
218 | count_off_irt(); |
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219 | |||
220 | if (savevid != currvid) { |
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221 | printk(KERN_ERR PFX |
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222 | "vid changed on fid transition, save %x, currvid %x\n", |
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223 | savevid, currvid); |
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224 | return 1; |
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225 | } |
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226 | |||
227 | if (fid != currfid) { |
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228 | printk(KERN_ERR PFX |
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229 | "fid transition failed, fid %x, currfid %x\n", |
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230 | fid, currfid); |
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231 | return 1; |
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232 | } |
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233 | |||
234 | return 0; |
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235 | } |
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236 | |||
237 | /* Write a new vid to the hardware */ |
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238 | static int write_new_vid(u32 vid) |
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239 | { |
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240 | u32 lo; |
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241 | u32 savefid = currfid; |
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242 | |||
243 | if ((currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { |
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244 | printk(KERN_ERR PFX "internal error - overflow on vid write\n"); |
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245 | return 1; |
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246 | } |
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247 | |||
248 | lo = currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; |
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249 | |||
250 | dprintk(KERN_DEBUG PFX "writing vid %x, lo %x, hi %x\n", |
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251 | vid, lo, STOP_GRANT_5NS); |
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252 | |||
253 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); |
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254 | |||
255 | if (query_current_values_with_pending_wait()) { |
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256 | return 1; |
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257 | } |
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258 | |||
259 | if (savefid != currfid) { |
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260 | printk(KERN_ERR PFX |
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261 | "fid changed on vid transition, save %x currfid %x\n", |
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262 | savefid, currfid); |
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263 | return 1; |
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264 | } |
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265 | |||
266 | if (vid != currvid) { |
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267 | printk(KERN_ERR PFX |
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268 | "vid transition failed, vid %x, currvid %x\n", |
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269 | vid, currvid); |
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270 | return 1; |
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271 | } |
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272 | |||
273 | return 0; |
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274 | } |
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275 | |||
276 | /* Reduce the vid by the max of step or reqvid. */ |
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277 | /* Decreasing vid codes represent increasing voltages : */ |
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278 | /* vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of 0x1f is off. */ |
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279 | static int decrease_vid_code_by_step(u32 reqvid, u32 step) |
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280 | { |
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281 | if ((currvid - reqvid) > step) |
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282 | reqvid = currvid - step; |
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283 | |||
284 | if (write_new_vid(reqvid)) |
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285 | return 1; |
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286 | |||
287 | count_off_vst(); |
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288 | |||
289 | return 0; |
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290 | } |
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291 | |||
292 | /* Change the fid and vid, by the 3 phases. */ |
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293 | static inline int transition_fid_vid(u32 reqfid, u32 reqvid) |
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294 | { |
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295 | if (core_voltage_pre_transition(reqvid)) |
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296 | return 1; |
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297 | |||
298 | if (core_frequency_transition(reqfid)) |
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299 | return 1; |
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300 | |||
301 | if (core_voltage_post_transition(reqvid)) |
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302 | return 1; |
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303 | |||
304 | if (query_current_values_with_pending_wait()) |
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305 | return 1; |
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306 | |||
307 | if ((reqfid != currfid) || (reqvid != currvid)) { |
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308 | printk(KERN_ERR PFX "failed: req 0x%x 0x%x, curr 0x%x 0x%x\n", |
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309 | reqfid, reqvid, currfid, currvid); |
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310 | return 1; |
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311 | } |
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312 | |||
313 | dprintk(KERN_INFO PFX |
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314 | "transitioned: new fid 0x%x, vid 0x%x\n", currfid, currvid); |
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315 | |||
316 | return 0; |
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317 | } |
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318 | |||
319 | /* Phase 1 - core voltage transition ... setup appropriate voltage for the */ |
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320 | /* fid transition. */ |
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321 | static inline int core_voltage_pre_transition(u32 reqvid) |
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322 | { |
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323 | u32 rvosteps = rvo; |
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324 | u32 savefid = currfid; |
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325 | |||
326 | dprintk(KERN_DEBUG PFX |
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327 | "ph1: start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo %x\n", |
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328 | currfid, currvid, reqvid, rvo); |
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329 | |||
330 | while (currvid > reqvid) { |
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331 | dprintk(KERN_DEBUG PFX "ph1: curr 0x%x, requesting vid 0x%x\n", |
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332 | currvid, reqvid); |
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333 | if (decrease_vid_code_by_step(reqvid, vidmvs)) |
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334 | return 1; |
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335 | } |
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336 | |||
337 | while (rvosteps > 0) { |
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338 | if (currvid == 0) { |
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339 | rvosteps = 0; |
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340 | } else { |
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341 | dprintk(KERN_DEBUG PFX |
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342 | "ph1: changing vid for rvo, requesting 0x%x\n", |
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343 | currvid - 1); |
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344 | if (decrease_vid_code_by_step(currvid - 1, 1)) |
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345 | return 1; |
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346 | rvosteps--; |
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347 | } |
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348 | } |
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349 | |||
350 | if (query_current_values_with_pending_wait()) |
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351 | return 1; |
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352 | |||
353 | if (savefid != currfid) { |
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354 | printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", currfid); |
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355 | return 1; |
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356 | } |
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357 | |||
358 | dprintk(KERN_DEBUG PFX "ph1 complete, currfid 0x%x, currvid 0x%x\n", |
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359 | currfid, currvid); |
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360 | |||
361 | return 0; |
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362 | } |
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363 | |||
364 | /* Phase 2 - core frequency transition */ |
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365 | static inline int core_frequency_transition(u32 reqfid) |
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366 | { |
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367 | u32 vcoreqfid; |
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368 | u32 vcocurrfid; |
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369 | u32 vcofiddiff; |
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370 | u32 savevid = currvid; |
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371 | |||
372 | if ((reqfid < HI_FID_TABLE_BOTTOM) && (currfid < HI_FID_TABLE_BOTTOM)) { |
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373 | printk(KERN_ERR PFX "ph2 illegal lo-lo transition 0x%x 0x%x\n", |
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374 | reqfid, currfid); |
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375 | return 1; |
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376 | } |
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377 | |||
378 | if (currfid == reqfid) { |
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379 | printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", currfid); |
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380 | return 0; |
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381 | } |
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382 | |||
383 | dprintk(KERN_DEBUG PFX |
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384 | "ph2 starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", |
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385 | currfid, currvid, reqfid); |
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386 | |||
387 | vcoreqfid = convert_fid_to_vco_fid(reqfid); |
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388 | vcocurrfid = convert_fid_to_vco_fid(currfid); |
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389 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid |
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390 | : vcoreqfid - vcocurrfid; |
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391 | |||
392 | while (vcofiddiff > 2) { |
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393 | if (reqfid > currfid) { |
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394 | if (currfid > LO_FID_TABLE_TOP) { |
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395 | if (write_new_fid(currfid + 2)) { |
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396 | return 1; |
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397 | } |
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398 | } else { |
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399 | if (write_new_fid |
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400 | (2 + convert_fid_to_vco_fid(currfid))) { |
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401 | return 1; |
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402 | } |
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403 | } |
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404 | } else { |
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405 | if (write_new_fid(currfid - 2)) |
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406 | return 1; |
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407 | } |
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408 | |||
409 | vcocurrfid = convert_fid_to_vco_fid(currfid); |
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410 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid |
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411 | : vcoreqfid - vcocurrfid; |
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412 | } |
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413 | |||
414 | if (write_new_fid(reqfid)) |
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415 | return 1; |
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416 | |||
417 | if (query_current_values_with_pending_wait()) |
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418 | return 1; |
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419 | |||
420 | if (currfid != reqfid) { |
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421 | printk(KERN_ERR PFX |
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422 | "ph2 mismatch, failed fid transition, curr %x, req %x\n", |
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423 | currfid, reqfid); |
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424 | return 1; |
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425 | } |
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426 | |||
427 | if (savevid != currvid) { |
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428 | printk(KERN_ERR PFX |
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429 | "ph2 vid changed, save %x, curr %x\n", savevid, |
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430 | currvid); |
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431 | return 1; |
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432 | } |
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433 | |||
434 | dprintk(KERN_DEBUG PFX "ph2 complete, currfid 0x%x, currvid 0x%x\n", |
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435 | currfid, currvid); |
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436 | |||
437 | return 0; |
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438 | } |
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439 | |||
440 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ |
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441 | static inline int core_voltage_post_transition(u32 reqvid) |
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442 | { |
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443 | u32 savefid = currfid; |
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444 | u32 savereqvid = reqvid; |
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445 | |||
446 | dprintk(KERN_DEBUG PFX "ph3 starting, currfid 0x%x, currvid 0x%x\n", |
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447 | currfid, currvid); |
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448 | |||
449 | if (reqvid != currvid) { |
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450 | if (write_new_vid(reqvid)) |
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451 | return 1; |
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452 | |||
453 | if (savefid != currfid) { |
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454 | printk(KERN_ERR PFX |
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455 | "ph3: bad fid change, save %x, curr %x\n", |
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456 | savefid, currfid); |
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457 | return 1; |
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458 | } |
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459 | |||
460 | if (currvid != reqvid) { |
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461 | printk(KERN_ERR PFX |
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462 | "ph3: failed vid transition\n, req %x, curr %x", |
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463 | reqvid, currvid); |
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464 | return 1; |
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465 | } |
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466 | } |
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467 | |||
468 | if (query_current_values_with_pending_wait()) |
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469 | return 1; |
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470 | |||
471 | if (savereqvid != currvid) { |
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472 | dprintk(KERN_ERR PFX "ph3 failed, currvid 0x%x\n", currvid); |
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473 | return 1; |
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474 | } |
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475 | |||
476 | if (savefid != currfid) { |
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477 | dprintk(KERN_ERR PFX "ph3 failed, currfid changed 0x%x\n", |
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478 | currfid); |
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479 | return 1; |
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480 | } |
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481 | |||
482 | dprintk(KERN_DEBUG PFX "ph3 complete, currfid 0x%x, currvid 0x%x\n", |
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483 | currfid, currvid); |
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484 | |||
485 | return 0; |
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486 | } |
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487 | |||
488 | static inline int check_supported_cpu(void) |
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489 | { |
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490 | struct cpuinfo_x86 *c = &new_cpu_data; |
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491 | u32 eax, ebx, ecx, edx; |
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492 | |||
493 | if (num_online_cpus() != 1) { |
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494 | dprintk(KERN_INFO PFX "multiprocessor systems not supported\n"); |
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495 | return 0; |
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496 | } |
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497 | |||
498 | if (c->x86_vendor != X86_VENDOR_AMD) { |
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499 | dprintk(KERN_INFO PFX "Not an AMD processor\n"); |
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500 | return 0; |
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501 | } |
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502 | |||
503 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
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769 | mauro | 504 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || |
505 | ((eax & CPUID_XFAM) != CPUID_XFAM_K8) || |
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506 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_E)) { |
||
507 | printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax); |
||
508 | return 0; |
||
582 | mauro | 509 | } else { |
769 | mauro | 510 | dprintk(KERN_INFO PFX "AMD Athlon 64 or AMD Opteron processor found\n"); |
582 | mauro | 511 | } |
512 | |||
513 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
||
514 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { |
||
515 | dprintk(KERN_INFO PFX |
||
516 | "No frequency change capabilities detected\n"); |
||
517 | return 0; |
||
518 | } |
||
519 | |||
520 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
||
521 | if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) { |
||
522 | dprintk(KERN_INFO PFX "Power state transitions not supported\n"); |
||
523 | return 0; |
||
524 | } |
||
525 | |||
526 | printk(KERN_INFO PFX "Found AMD Athlon 64 / Opteron processor " |
||
527 | "supporting p-state transitions\n"); |
||
528 | |||
529 | return 1; |
||
530 | } |
||
531 | |||
532 | /* Find and validate the PSB/PST table in BIOS. */ |
||
533 | static inline int find_psb_table(void) |
||
534 | { |
||
535 | struct psb_s *psb; |
||
536 | struct pst_s *pst; |
||
537 | unsigned i, j; |
||
538 | u32 lastfid; |
||
539 | u32 mvs; |
||
540 | u8 maxvid; |
||
541 | |||
542 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { |
||
543 | /* Scan BIOS looking for the signature. */ |
||
544 | /* It can not be at ffff0 - it is too big. */ |
||
545 | |||
546 | psb = phys_to_virt(i); |
||
547 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) |
||
548 | continue; |
||
549 | |||
550 | dprintk(KERN_DEBUG PFX "found PSB header at 0x%p\n", psb); |
||
551 | |||
552 | dprintk(KERN_DEBUG PFX "table vers: 0x%x\n", psb->tableversion); |
||
553 | if (psb->tableversion != PSB_VERSION_1_4) { |
||
554 | printk(KERN_INFO BFX "PSB table is not v1.4\n"); |
||
555 | return -ENODEV; |
||
556 | } |
||
557 | |||
558 | dprintk(KERN_DEBUG PFX "flags: 0x%x\n", psb->flags1); |
||
559 | if (psb->flags1) { |
||
560 | printk(KERN_ERR BFX "unknown flags\n"); |
||
561 | return -ENODEV; |
||
562 | } |
||
563 | |||
564 | vstable = psb->voltagestabilizationtime; |
||
565 | printk(KERN_INFO PFX "voltage stable time: %d (units 20us)\n", |
||
566 | vstable); |
||
567 | |||
568 | dprintk(KERN_DEBUG PFX "flags2: 0x%x\n", psb->flags2); |
||
569 | rvo = psb->flags2 & 3; |
||
570 | irt = ((psb->flags2) >> 2) & 3; |
||
571 | mvs = ((psb->flags2) >> 4) & 3; |
||
572 | vidmvs = 1 << mvs; |
||
573 | batps = ((psb->flags2) >> 6) & 3; |
||
574 | printk(KERN_INFO PFX "p states on battery: %d ", batps); |
||
575 | switch (batps) { |
||
576 | case 0: |
||
577 | printk("- all available\n"); |
||
578 | break; |
||
579 | case 1: |
||
580 | printk("- only the minimum\n"); |
||
581 | break; |
||
582 | case 2: |
||
583 | printk("- only the 2 lowest\n"); |
||
584 | break; |
||
585 | case 3: |
||
586 | printk("- only the 3 lowest\n"); |
||
587 | break; |
||
588 | } |
||
589 | printk(KERN_INFO PFX "ramp voltage offset: %d\n", rvo); |
||
590 | printk(KERN_INFO PFX "isochronous relief time: %d\n", irt); |
||
591 | printk(KERN_INFO PFX "maximum voltage step: %d\n", mvs); |
||
592 | |||
593 | dprintk(KERN_DEBUG PFX "numpst: 0x%x\n", psb->numpst); |
||
594 | if (psb->numpst != 1) { |
||
595 | printk(KERN_ERR BFX "numpst must be 1\n"); |
||
596 | return -ENODEV; |
||
597 | } |
||
598 | |||
599 | dprintk(KERN_DEBUG PFX "cpuid: 0x%x\n", psb->cpuid); |
||
600 | |||
601 | plllock = psb->plllocktime; |
||
602 | printk(KERN_INFO PFX "pll lock time: 0x%x\n", plllock); |
||
603 | |||
604 | maxvid = psb->maxvid; |
||
605 | printk(KERN_INFO PFX "maxfid: 0x%x\n", psb->maxfid); |
||
606 | printk(KERN_INFO PFX "maxvid: 0x%x\n", maxvid); |
||
607 | |||
608 | numps = psb->numpstates; |
||
609 | printk(KERN_INFO PFX "numpstates: 0x%x\n", numps); |
||
610 | if (numps < 2) { |
||
611 | printk(KERN_ERR BFX "no p states to transition\n"); |
||
612 | return -ENODEV; |
||
613 | } |
||
614 | |||
615 | if (batps == 0) { |
||
616 | batps = numps; |
||
617 | } else if (batps > numps) { |
||
618 | printk(KERN_ERR BFX "batterypstates > numpstates\n"); |
||
619 | batps = numps; |
||
620 | } else { |
||
621 | printk(KERN_ERR PFX |
||
622 | "Restricting operation to %d p-states\n", batps); |
||
623 | printk(KERN_ERR PFX |
||
624 | "Check for an updated driver to access all " |
||
625 | "%d p-states\n", numps); |
||
626 | } |
||
627 | |||
628 | if ((numps <= 1) || (batps <= 1)) { |
||
629 | printk(KERN_ERR PFX "only 1 p-state to transition\n"); |
||
630 | return -ENODEV; |
||
631 | } |
||
632 | |||
633 | ppst = kmalloc(sizeof (struct pst_s) * numps, GFP_KERNEL); |
||
634 | if (!ppst) { |
||
635 | printk(KERN_ERR PFX "ppst memory alloc failure\n"); |
||
636 | return -ENOMEM; |
||
637 | } |
||
638 | |||
639 | pst = (struct pst_s *) (psb + 1); |
||
640 | for (j = 0; j < numps; j++) { |
||
641 | ppst[j].fid = pst[j].fid; |
||
642 | ppst[j].vid = pst[j].vid; |
||
643 | printk(KERN_INFO PFX |
||
644 | " %d : fid 0x%x, vid 0x%x\n", j, |
||
645 | ppst[j].fid, ppst[j].vid); |
||
646 | } |
||
647 | sort_pst(ppst, numps); |
||
648 | |||
649 | lastfid = ppst[0].fid; |
||
650 | if (lastfid > LO_FID_TABLE_TOP) |
||
651 | printk(KERN_INFO BFX "first fid not in lo freq tbl\n"); |
||
652 | |||
653 | if ((lastfid > MAX_FID) || (lastfid & 1) || (ppst[0].vid > LEAST_VID)) { |
||
654 | printk(KERN_ERR BFX "first fid/vid bad (0x%x - 0x%x)\n", |
||
655 | lastfid, ppst[0].vid); |
||
656 | kfree(ppst); |
||
657 | return -ENODEV; |
||
658 | } |
||
659 | |||
660 | for (j = 1; j < numps; j++) { |
||
661 | if ((lastfid >= ppst[j].fid) |
||
662 | || (ppst[j].fid & 1) |
||
663 | || (ppst[j].fid < HI_FID_TABLE_BOTTOM) |
||
664 | || (ppst[j].fid > MAX_FID) |
||
665 | || (ppst[j].vid > LEAST_VID)) { |
||
666 | printk(KERN_ERR BFX |
||
667 | "invalid fid/vid in pst(%x %x)\n", |
||
668 | ppst[j].fid, ppst[j].vid); |
||
669 | kfree(ppst); |
||
670 | return -ENODEV; |
||
671 | } |
||
672 | lastfid = ppst[j].fid; |
||
673 | } |
||
674 | |||
675 | for (j = 0; j < numps; j++) { |
||
676 | if (ppst[j].vid < rvo) { /* vid+rvo >= 0 */ |
||
677 | printk(KERN_ERR BFX |
||
678 | "0 vid exceeded with pstate %d\n", j); |
||
679 | return -ENODEV; |
||
680 | } |
||
681 | if (ppst[j].vid < maxvid+rvo) { /* vid+rvo >= maxvid */ |
||
682 | printk(KERN_ERR BFX |
||
683 | "maxvid exceeded with pstate %d\n", j); |
||
684 | return -ENODEV; |
||
685 | } |
||
686 | } |
||
687 | |||
688 | if (query_current_values_with_pending_wait()) { |
||
689 | kfree(ppst); |
||
690 | return -EIO; |
||
691 | } |
||
692 | |||
693 | printk(KERN_INFO PFX "currfid 0x%x, currvid 0x%x\n", |
||
694 | currfid, currvid); |
||
695 | |||
696 | for (j = 0; j < numps; j++) |
||
697 | if ((ppst[j].fid==currfid) && (ppst[j].vid==currvid)) |
||
698 | return (0); |
||
699 | |||
700 | printk(KERN_ERR BFX "currfid/vid do not match PST, ignoring\n"); |
||
701 | return 0; |
||
702 | } |
||
703 | |||
704 | printk(KERN_ERR BFX "no PSB\n"); |
||
705 | return -ENODEV; |
||
706 | } |
||
707 | |||
708 | /* Converts a frequency (that might not necessarily be a multiple of 200) */ |
||
709 | /* to a fid. */ |
||
710 | static u32 find_closest_fid(u32 freq, int searchup) |
||
711 | { |
||
712 | if (searchup == SEARCH_UP) |
||
713 | freq += MIN_FREQ_RESOLUTION - 1; |
||
714 | |||
715 | freq = (freq / MIN_FREQ_RESOLUTION) * MIN_FREQ_RESOLUTION; |
||
716 | |||
717 | if (freq < MIN_FREQ) |
||
718 | freq = MIN_FREQ; |
||
719 | else if (freq > MAX_FREQ) |
||
720 | freq = MAX_FREQ; |
||
721 | |||
722 | return find_fid_from_freq(freq); |
||
723 | } |
||
724 | |||
725 | static int find_match(u32 * ptargfreq, u32 * pmin, u32 * pmax, int searchup, u32 * pfid, u32 * pvid) |
||
726 | { |
||
727 | u32 availpstates = batps; |
||
728 | u32 targfid = find_closest_fid(*ptargfreq, searchup); |
||
729 | u32 minfid = find_closest_fid(*pmin, SEARCH_DOWN); |
||
730 | u32 maxfid = find_closest_fid(*pmax, SEARCH_UP); |
||
731 | u32 minidx = 0; |
||
732 | u32 maxidx = availpstates - 1; |
||
733 | u32 targidx = 0xffffffff; |
||
734 | int i; |
||
735 | |||
736 | dprintk(KERN_DEBUG PFX "find match: freq %d MHz, min %d, max %d\n", |
||
737 | *ptargfreq, *pmin, *pmax); |
||
738 | |||
739 | /* Restrict values to the frequency choices in the PST */ |
||
740 | if (minfid < ppst[0].fid) |
||
741 | minfid = ppst[0].fid; |
||
742 | if (maxfid > ppst[maxidx].fid) |
||
743 | maxfid = ppst[maxidx].fid; |
||
744 | |||
745 | /* Find appropriate PST index for the minimim fid */ |
||
746 | for (i = 0; i < (int) availpstates; i++) { |
||
747 | if (minfid >= ppst[i].fid) |
||
748 | minidx = i; |
||
749 | } |
||
750 | |||
751 | /* Find appropriate PST index for the maximum fid */ |
||
752 | for (i = availpstates - 1; i >= 0; i--) { |
||
753 | if (maxfid <= ppst[i].fid) |
||
754 | maxidx = i; |
||
755 | } |
||
756 | |||
757 | if (minidx > maxidx) |
||
758 | maxidx = minidx; |
||
759 | |||
760 | /* Frequency ids are now constrained by limits matching PST entries */ |
||
761 | minfid = ppst[minidx].fid; |
||
762 | maxfid = ppst[maxidx].fid; |
||
763 | |||
764 | /* Limit the target frequency to these limits */ |
||
765 | if (targfid < minfid) |
||
766 | targfid = minfid; |
||
767 | else if (targfid > maxfid) |
||
768 | targfid = maxfid; |
||
769 | |||
770 | /* Find the best target index into the PST, contrained by the range */ |
||
771 | if (searchup == SEARCH_UP) { |
||
772 | for (i = maxidx; i >= (int) minidx; i--) { |
||
773 | if (targfid <= ppst[i].fid) |
||
774 | targidx = i; |
||
775 | } |
||
776 | } else { |
||
777 | for (i = minidx; i <= (int) maxidx; i++) { |
||
778 | if (targfid >= ppst[i].fid) |
||
779 | targidx = i; |
||
780 | } |
||
781 | } |
||
782 | |||
783 | if (targidx == 0xffffffff) { |
||
784 | printk(KERN_ERR PFX "could not find target\n"); |
||
785 | return 1; |
||
786 | } |
||
787 | |||
788 | *pmin = find_freq_from_fid(minfid); |
||
789 | *pmax = find_freq_from_fid(maxfid); |
||
790 | *ptargfreq = find_freq_from_fid(ppst[targidx].fid); |
||
791 | |||
792 | if (pfid) |
||
793 | *pfid = ppst[targidx].fid; |
||
794 | if (pvid) |
||
795 | *pvid = ppst[targidx].vid; |
||
796 | |||
797 | return 0; |
||
798 | } |
||
799 | |||
800 | /* Take a frequency, and issue the fid/vid transition command */ |
||
801 | static inline int transition_frequency(u32 * preq, u32 * pmin, u32 * pmax, u32 searchup) |
||
802 | { |
||
803 | u32 fid; |
||
804 | u32 vid; |
||
805 | int res; |
||
806 | struct cpufreq_freqs freqs; |
||
807 | |||
808 | if (find_match(preq, pmin, pmax, searchup, &fid, &vid)) |
||
809 | return 1; |
||
810 | |||
811 | dprintk(KERN_DEBUG PFX "table matched fid 0x%x, giving vid 0x%x\n", |
||
812 | fid, vid); |
||
813 | |||
814 | if (query_current_values_with_pending_wait()) |
||
815 | return 1; |
||
816 | |||
817 | if ((currvid == vid) && (currfid == fid)) { |
||
818 | dprintk(KERN_DEBUG PFX |
||
819 | "target matches current values (fid 0x%x, vid 0x%x)\n", |
||
820 | fid, vid); |
||
821 | return 0; |
||
822 | } |
||
823 | |||
824 | if ((fid < HI_FID_TABLE_BOTTOM) && (currfid < HI_FID_TABLE_BOTTOM)) { |
||
825 | printk(KERN_ERR PFX |
||
826 | "ignoring illegal change in lo freq table-%x to %x\n", |
||
827 | currfid, fid); |
||
828 | return 1; |
||
829 | } |
||
830 | |||
831 | dprintk(KERN_DEBUG PFX "changing to fid 0x%x, vid 0x%x\n", fid, vid); |
||
832 | |||
833 | freqs.cpu = 0; /* only true because SMP not supported */ |
||
834 | |||
835 | freqs.old = find_freq_from_fid(currfid); |
||
836 | freqs.new = find_freq_from_fid(fid); |
||
600 | mauro | 837 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
582 | mauro | 838 | |
839 | res = transition_fid_vid(fid, vid); |
||
840 | |||
841 | freqs.new = find_freq_from_fid(currfid); |
||
600 | mauro | 842 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
582 | mauro | 843 | |
844 | return res; |
||
845 | } |
||
846 | |||
847 | /* Driver entry point to switch to the target frequency */ |
||
848 | static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation) |
||
849 | { |
||
850 | u32 checkfid = currfid; |
||
851 | u32 checkvid = currvid; |
||
852 | u32 reqfreq = targfreq / 1000; |
||
853 | u32 minfreq = pol->min / 1000; |
||
854 | u32 maxfreq = pol->max / 1000; |
||
855 | |||
856 | if (ppst == 0) { |
||
857 | printk(KERN_ERR PFX "targ: ppst 0\n"); |
||
858 | return -ENODEV; |
||
859 | } |
||
860 | |||
861 | if (pending_bit_stuck()) { |
||
862 | printk(KERN_ERR PFX "drv targ fail: change pending bit set\n"); |
||
863 | return -EIO; |
||
864 | } |
||
865 | |||
866 | dprintk(KERN_DEBUG PFX "targ: %d kHz, min %d, max %d, relation %d\n", |
||
867 | targfreq, pol->min, pol->max, relation); |
||
868 | |||
869 | if (query_current_values_with_pending_wait()) |
||
870 | return -EIO; |
||
871 | |||
872 | dprintk(KERN_DEBUG PFX "targ: curr fid 0x%x, vid 0x%x\n", |
||
873 | currfid, currvid); |
||
874 | |||
875 | if ((checkvid != currvid) || (checkfid != currfid)) { |
||
876 | printk(KERN_ERR PFX |
||
877 | "error - out of sync, fid 0x%x 0x%x, vid 0x%x 0x%x\n", |
||
878 | checkfid, currfid, checkvid, currvid); |
||
879 | } |
||
880 | |||
881 | if (transition_frequency(&reqfreq, &minfreq, &maxfreq, |
||
882 | relation == |
||
883 | CPUFREQ_RELATION_H ? SEARCH_UP : SEARCH_DOWN)) |
||
884 | { |
||
885 | printk(KERN_ERR PFX "transition frequency failed\n"); |
||
886 | return 1; |
||
887 | } |
||
888 | |||
889 | pol->cur = 1000 * find_freq_from_fid(currfid); |
||
890 | |||
891 | return 0; |
||
892 | } |
||
893 | |||
894 | /* Driver entry point to verify the policy and range of frequencies */ |
||
895 | static int powernowk8_verify(struct cpufreq_policy *pol) |
||
896 | { |
||
897 | u32 min = pol->min / 1000; |
||
898 | u32 max = pol->max / 1000; |
||
899 | u32 targ = min; |
||
900 | int res; |
||
901 | |||
902 | if (ppst == 0) { |
||
903 | printk(KERN_ERR PFX "verify - ppst 0\n"); |
||
904 | return -ENODEV; |
||
905 | } |
||
906 | |||
907 | if (pending_bit_stuck()) { |
||
908 | printk(KERN_ERR PFX "failing verify, change pending bit set\n"); |
||
909 | return -EIO; |
||
910 | } |
||
911 | |||
912 | dprintk(KERN_DEBUG PFX |
||
913 | "ver: cpu%d, min %d, max %d, cur %d, pol %d\n", pol->cpu, |
||
914 | pol->min, pol->max, pol->cur, pol->policy); |
||
915 | |||
916 | if (pol->cpu != 0) { |
||
917 | printk(KERN_ERR PFX "verify - cpu not 0\n"); |
||
918 | return -ENODEV; |
||
919 | } |
||
920 | |||
921 | #warning pol->policy is in undefined state here |
||
922 | res = find_match(&targ, &min, &max, |
||
923 | pol->policy == CPUFREQ_POLICY_POWERSAVE ? |
||
924 | SEARCH_DOWN : SEARCH_UP, 0, 0); |
||
925 | if (!res) { |
||
926 | pol->min = min * 1000; |
||
927 | pol->max = max * 1000; |
||
928 | } |
||
929 | return res; |
||
930 | } |
||
931 | |||
932 | /* per CPU init entry point to the driver */ |
||
933 | static int __init powernowk8_cpu_init(struct cpufreq_policy *pol) |
||
934 | { |
||
935 | if (pol->cpu != 0) { |
||
936 | printk(KERN_ERR PFX "init not cpu 0\n"); |
||
937 | return -ENODEV; |
||
938 | } |
||
939 | |||
940 | pol->governor = 0; //!!!CPUFREQ_DEFAULT_GOVERNOR; |
||
941 | |||
942 | /* Take a crude guess here. */ |
||
943 | pol->cpuinfo.transition_latency = ((rvo + 8) * vstable * VST_UNITS_20US) |
||
944 | + (3 * (1 << irt) * 10); |
||
945 | |||
946 | if (query_current_values_with_pending_wait()) |
||
947 | return -EIO; |
||
948 | |||
949 | pol->cur = 1000 * find_freq_from_fid(currfid); |
||
950 | dprintk(KERN_DEBUG PFX "policy current frequency %d kHz\n", pol->cur); |
||
951 | |||
952 | /* min/max the cpu is capable of */ |
||
953 | pol->cpuinfo.min_freq = 1000 * find_freq_from_fid(ppst[0].fid); |
||
954 | pol->cpuinfo.max_freq = 1000 * find_freq_from_fid(ppst[numps-1].fid); |
||
955 | pol->min = 1000 * find_freq_from_fid(ppst[0].fid); |
||
956 | pol->max = 1000 * find_freq_from_fid(ppst[batps - 1].fid); |
||
957 | |||
958 | printk(KERN_INFO PFX "cpu_init done, current fid 0x%x, vid 0x%x\n", |
||
959 | currfid, currvid); |
||
960 | |||
961 | return 0; |
||
962 | } |
||
963 | |||
964 | /* driver entry point for init */ |
||
965 | /*static*/ int __init powernowk8_init(void) |
||
966 | { |
||
967 | int rc; |
||
968 | |||
969 | dprintk(KERN_INFO PFX VERSION "\n"); |
||
970 | |||
971 | if (check_supported_cpu() == 0) |
||
972 | return -ENODEV; |
||
973 | |||
974 | rc = find_psb_table(); |
||
975 | if (rc) |
||
976 | return rc; |
||
977 | |||
978 | if (pending_bit_stuck()) { |
||
979 | printk(KERN_ERR PFX "powernowk8_init fail, change pending bit set\n"); |
||
980 | kfree(ppst); |
||
981 | return -EIO; |
||
982 | } |
||
983 | |||
984 | return cpufreq_register_driver(&cpufreq_amd64_driver); |
||
985 | } |
||
986 | |||
987 | /* driver entry point for term */ |
||
988 | /*static*/ void __exit powernowk8_exit(void) |
||
989 | { |
||
990 | dprintk(KERN_INFO PFX "powernowk8_exit\n"); |
||
991 | |||
992 | cpufreq_unregister_driver(&cpufreq_amd64_driver); |
||
993 | kfree(ppst); |
||
994 | } |
||
995 | |||
996 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>"); |
||
997 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
||
998 | MODULE_LICENSE("GPL"); |
||
999 | |||
1000 | module_init(powernowk8_init); |
||
1001 | module_exit(powernowk8_exit); |