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582 | mauro | 1 | /* |
2 | * (C) 2001 Dave Jones, Arjan van de ven. |
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3 | * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> |
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4 | * |
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5 | * Licensed under the terms of the GNU GPL License version 2. |
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6 | * Based upon reverse engineered information, and on Intel documentation |
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7 | * for chipsets ICH2-M and ICH3-M. |
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8 | * |
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9 | * Many thanks to Ducrot Bruno for finding and fixing the last |
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10 | * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler |
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11 | * for extensive testing. |
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12 | * |
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13 | * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* |
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14 | */ |
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15 | |||
16 | |||
17 | /********************************************************************* |
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18 | * SPEEDSTEP - DEFINITIONS * |
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19 | *********************************************************************/ |
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20 | |||
21 | #include <linuxcomp.h> |
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22 | |||
23 | #include <linux/kernel.h> |
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24 | #include <linux/module.h> |
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25 | #include <linux/init.h> |
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26 | #include <linux/cpufreq.h> |
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27 | #include <linux/pci.h> |
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28 | #include <linux/slab.h> |
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29 | |||
30 | #include "speedstep-lib.h" |
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31 | |||
32 | |||
33 | /* speedstep_chipset: |
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34 | * It is necessary to know which chipset is used. As accesses to |
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35 | * this device occur at various places in this module, we need a |
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36 | * static struct pci_dev * pointing to that device. |
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37 | */ |
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38 | static struct pci_dev *speedstep_chipset_dev; |
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39 | |||
40 | |||
41 | /* speedstep_processor |
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42 | */ |
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43 | static unsigned int speedstep_processor = 0; |
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44 | |||
45 | |||
46 | /* |
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47 | * There are only two frequency states for each processor. Values |
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48 | * are in kHz for the time being. |
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49 | */ |
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50 | static struct cpufreq_frequency_table speedstep_freqs[] = { |
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51 | {SPEEDSTEP_HIGH, 0}, |
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52 | {SPEEDSTEP_LOW, 0}, |
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53 | {0, CPUFREQ_TABLE_END}, |
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54 | }; |
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55 | |||
56 | |||
57 | /* DEBUG |
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58 | * Define it if you want verbose debug output, e.g. for bug reporting |
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59 | */ |
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60 | #define SPEEDSTEP_DEBUG |
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61 | |||
62 | #ifdef SPEEDSTEP_DEBUG |
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63 | #define dprintk(msg...) printk(msg) |
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64 | #else |
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65 | #define dprintk(msg...) do { } while(0) |
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66 | #endif |
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67 | |||
68 | |||
69 | /** |
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70 | * speedstep_set_state - set the SpeedStep state |
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71 | * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH) |
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72 | * |
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73 | * Tries to change the SpeedStep state. |
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74 | */ |
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75 | static void speedstep_set_state (unsigned int state, unsigned int notify) |
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76 | { |
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77 | u32 pmbase; |
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78 | u8 pm2_blk; |
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79 | u8 value; |
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80 | unsigned long flags; |
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81 | struct cpufreq_freqs freqs; |
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82 | |||
83 | if (!speedstep_chipset_dev || (state > 0x1)) |
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84 | return; |
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85 | |||
86 | freqs.old = speedstep_get_processor_frequency(speedstep_processor); |
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87 | freqs.new = speedstep_freqs[state].frequency; |
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88 | freqs.cpu = 0; /* speedstep.c is UP only driver */ |
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89 | |||
90 | //!!!if (notify) |
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91 | //!!!cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
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92 | |||
93 | /* get PMBASE */ |
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94 | pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase); |
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95 | if (!(pmbase & 0x01)) |
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96 | { |
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97 | printk(KERN_ERR "cpufreq: could not find speedstep register\n"); |
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98 | return; |
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99 | } |
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100 | |||
101 | pmbase &= 0xFFFFFFFE; |
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102 | if (!pmbase) { |
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103 | printk(KERN_ERR "cpufreq: could not find speedstep register\n"); |
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104 | return; |
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105 | } |
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106 | |||
107 | /* Disable IRQs */ |
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108 | local_irq_save(flags); |
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109 | |||
110 | /* read state */ |
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111 | value = inb(pmbase + 0x50); |
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112 | |||
113 | dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); |
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114 | |||
115 | /* write new state */ |
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116 | value &= 0xFE; |
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117 | value |= state; |
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118 | |||
119 | dprintk(KERN_DEBUG "cpufreq: writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase); |
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120 | |||
121 | /* Disable bus master arbitration */ |
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122 | pm2_blk = inb(pmbase + 0x20); |
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123 | pm2_blk |= 0x01; |
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124 | outb(pm2_blk, (pmbase + 0x20)); |
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125 | |||
126 | /* Actual transition */ |
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127 | outb(value, (pmbase + 0x50)); |
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128 | |||
129 | /* Restore bus master arbitration */ |
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130 | pm2_blk &= 0xfe; |
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131 | outb(pm2_blk, (pmbase + 0x20)); |
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132 | |||
133 | /* check if transition was successful */ |
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134 | value = inb(pmbase + 0x50); |
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135 | |||
136 | /* Enable IRQs */ |
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137 | local_irq_restore(flags); |
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138 | |||
139 | dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); |
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140 | |||
141 | if (state == (value & 0x1)) { |
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142 | dprintk (KERN_INFO "cpufreq: change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000)); |
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143 | } else { |
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144 | printk (KERN_ERR "cpufreq: change failed - I/O error\n"); |
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145 | } |
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146 | |||
147 | ///!!!if (notify) |
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148 | //!!!cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
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149 | |||
150 | return; |
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151 | } |
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152 | |||
153 | |||
154 | /** |
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155 | * speedstep_activate - activate SpeedStep control in the chipset |
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156 | * |
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157 | * Tries to activate the SpeedStep status and control registers. |
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158 | * Returns -EINVAL on an unsupported chipset, and zero on success. |
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159 | */ |
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160 | static int speedstep_activate (void) |
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161 | { |
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162 | u16 value = 0; |
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163 | |||
164 | if (!speedstep_chipset_dev) |
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165 | return -EINVAL; |
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166 | |||
167 | pci_read_config_word(speedstep_chipset_dev, |
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168 | 0x00A0, &value); |
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169 | if (!(value & 0x08)) { |
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170 | value |= 0x08; |
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171 | dprintk(KERN_DEBUG "cpufreq: activating SpeedStep (TM) registers\n"); |
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172 | pci_write_config_word(speedstep_chipset_dev, |
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173 | 0x00A0, value); |
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174 | } |
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175 | |||
176 | return 0; |
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177 | } |
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178 | |||
179 | |||
180 | /** |
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181 | * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic |
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182 | * |
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183 | * Detects PIIX4, ICH2-M and ICH3-M so far. The pci_dev points to |
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184 | * the LPC bridge / PM module which contains all power-management |
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185 | * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected |
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186 | * chipset, or zero on failure. |
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187 | */ |
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188 | static unsigned int speedstep_detect_chipset (void) |
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189 | { |
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190 | speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL, |
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191 | PCI_DEVICE_ID_INTEL_82801DB_12, |
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192 | PCI_ANY_ID, |
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193 | PCI_ANY_ID, |
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194 | NULL); |
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195 | if (speedstep_chipset_dev) |
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196 | return 4; /* 4-M */ |
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197 | |||
198 | speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL, |
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199 | PCI_DEVICE_ID_INTEL_82801CA_12, |
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200 | PCI_ANY_ID, |
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201 | PCI_ANY_ID, |
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202 | NULL); |
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203 | if (speedstep_chipset_dev) |
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204 | return 3; /* 3-M */ |
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205 | |||
206 | |||
207 | speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL, |
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208 | PCI_DEVICE_ID_INTEL_82801BA_10, |
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209 | PCI_ANY_ID, |
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210 | PCI_ANY_ID, |
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211 | NULL); |
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212 | if (speedstep_chipset_dev) { |
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213 | /* speedstep.c causes lockups on Dell Inspirons 8000 and |
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214 | * 8100 which use a pretty old revision of the 82815 |
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215 | * host brige. Abort on these systems. |
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216 | */ |
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217 | static struct pci_dev *hostbridge; |
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218 | u8 rev = 0; |
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219 | |||
220 | hostbridge = pci_find_subsys(PCI_VENDOR_ID_INTEL, |
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221 | PCI_DEVICE_ID_INTEL_82815_MC, |
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222 | PCI_ANY_ID, |
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223 | PCI_ANY_ID, |
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224 | NULL); |
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225 | |||
226 | if (!hostbridge) |
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227 | return 2; /* 2-M */ |
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228 | |||
229 | pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev); |
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230 | if (rev < 5) { |
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231 | dprintk(KERN_INFO "cpufreq: hostbridge does not support speedstep\n"); |
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232 | speedstep_chipset_dev = NULL; |
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233 | return 0; |
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234 | } |
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235 | |||
236 | return 2; /* 2-M */ |
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237 | } |
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238 | |||
239 | return 0; |
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240 | } |
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241 | |||
242 | |||
243 | /** |
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244 | * speedstep_setpolicy - set a new CPUFreq policy |
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245 | * @policy: new policy |
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246 | * |
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247 | * Sets a new CPUFreq policy. |
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248 | */ |
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249 | static int speedstep_target (struct cpufreq_policy *policy, |
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250 | unsigned int target_freq, |
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251 | unsigned int relation) |
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252 | { |
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253 | unsigned int newstate = 0; |
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254 | |||
255 | if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate)) |
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256 | return -EINVAL; |
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257 | |||
258 | speedstep_set_state(newstate, 1); |
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259 | |||
260 | return 0; |
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261 | } |
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262 | |||
263 | |||
264 | /** |
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265 | * speedstep_verify - verifies a new CPUFreq policy |
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266 | * @freq: new policy |
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267 | * |
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268 | * Limit must be within speedstep_low_freq and speedstep_high_freq, with |
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269 | * at least one border included. |
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270 | */ |
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271 | static int speedstep_verify (struct cpufreq_policy *policy) |
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272 | { |
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273 | return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]); |
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274 | } |
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275 | |||
276 | |||
277 | static int speedstep_cpu_init(struct cpufreq_policy *policy) |
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278 | { |
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279 | int result = 0; |
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280 | unsigned int speed; |
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281 | |||
282 | /* capability check */ |
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283 | if (policy->cpu != 0) |
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284 | return -ENODEV; |
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285 | |||
286 | /* detect low and high frequency */ |
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287 | result = speedstep_get_freqs(speedstep_processor, |
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288 | &speedstep_freqs[SPEEDSTEP_LOW].frequency, |
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289 | &speedstep_freqs[SPEEDSTEP_HIGH].frequency, |
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290 | &speedstep_set_state); |
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291 | if (result) |
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292 | return result; |
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293 | |||
294 | /* get current speed setting */ |
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295 | speed = speedstep_get_processor_frequency(speedstep_processor); |
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296 | if (!speed) |
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297 | return -EIO; |
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298 | |||
299 | dprintk(KERN_INFO "cpufreq: currently at %s speed setting - %i MHz\n", |
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300 | (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high", |
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301 | (speed / 1000)); |
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302 | |||
303 | /* cpuinfo and default policy values */ |
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304 | policy->governor = 0; //!!!CPUFREQ_DEFAULT_GOVERNOR; |
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305 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; |
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306 | policy->cur = speed; |
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307 | |||
308 | return cpufreq_frequency_table_cpuinfo(policy, &speedstep_freqs[0]); |
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309 | } |
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310 | |||
311 | |||
312 | static struct cpufreq_driver speedstep_driver = { |
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313 | .name = "speedstep-ich", |
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314 | .verify = speedstep_verify, |
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315 | .target = speedstep_target, |
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316 | .init = speedstep_cpu_init, |
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317 | .owner = THIS_MODULE, |
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318 | }; |
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319 | |||
320 | |||
321 | /** |
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322 | * speedstep_init - initializes the SpeedStep CPUFreq driver |
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323 | * |
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324 | * Initializes the SpeedStep support. Returns -ENODEV on unsupported |
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325 | * devices, -EINVAL on problems during initiatization, and zero on |
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326 | * success. |
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327 | */ |
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328 | /*static*/ int __init speedstep_ich_init(void) |
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329 | { |
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330 | /* detect processor */ |
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331 | speedstep_processor = speedstep_detect_processor(); |
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332 | if (!speedstep_processor) |
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333 | return -ENODEV; |
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334 | |||
335 | /* detect chipset */ |
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336 | if (!speedstep_detect_chipset()) { |
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337 | printk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n"); |
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338 | return -ENODEV; |
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339 | } |
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340 | |||
341 | /* activate speedstep support */ |
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342 | if (speedstep_activate()) |
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343 | return -EINVAL; |
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344 | |||
345 | return cpufreq_register_driver(&speedstep_driver); |
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346 | } |
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347 | |||
348 | |||
349 | /** |
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350 | * speedstep_exit - unregisters SpeedStep support |
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351 | * |
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352 | * Unregisters SpeedStep support. |
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353 | */ |
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354 | /*static*/ void __exit speedstep_ich_exit(void) |
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355 | { |
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356 | cpufreq_unregister_driver(&speedstep_driver); |
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357 | } |
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358 | |||
359 | |||
360 | MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>"); |
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361 | MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges."); |
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362 | MODULE_LICENSE ("GPL"); |
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363 | |||
364 | module_init(speedstep_ich_init); |
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365 | module_exit(speedstep_ich_exit); |