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Rev | Author | Line No. | Line |
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489 | giacomo | 1 | #ifndef __MATROXFB_DAC1064_H__ |
2 | #define __MATROXFB_DAC1064_H__ |
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3 | |||
4 | /* make checkconfig does not walk through include tree */ |
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5 | #include <linux/config.h> |
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6 | |||
7 | #include "matroxfb_base.h" |
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8 | |||
9 | #ifdef CONFIG_FB_MATROX_MYSTIQUE |
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10 | extern struct matrox_switch matrox_mystique; |
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11 | #endif |
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12 | #ifdef CONFIG_FB_MATROX_G100 |
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13 | extern struct matrox_switch matrox_G100; |
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14 | #endif |
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15 | #ifdef NEED_DAC1064 |
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16 | void DAC1064_global_init(WPMINFO2); |
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17 | void DAC1064_global_restore(WPMINFO2); |
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18 | #endif |
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19 | |||
20 | #define M1064_INDEX 0x00 |
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21 | #define M1064_PALWRADD 0x00 |
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22 | #define M1064_PALDATA 0x01 |
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23 | #define M1064_PIXRDMSK 0x02 |
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24 | #define M1064_PALRDADD 0x03 |
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25 | #define M1064_X_DATAREG 0x0A |
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26 | #define M1064_CURPOSXL 0x0C /* can be accessed as DWORD */ |
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27 | #define M1064_CURPOSXH 0x0D |
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28 | #define M1064_CURPOSYL 0x0E |
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29 | #define M1064_CURPOSYH 0x0F |
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30 | |||
31 | #define M1064_XCURADDL 0x04 |
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32 | #define M1064_XCURADDH 0x05 |
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33 | #define M1064_XCURCTRL 0x06 |
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34 | #define M1064_XCURCTRL_DIS 0x00 /* transparent, transparent, transparent, transparent */ |
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35 | #define M1064_XCURCTRL_3COLOR 0x01 /* transparent, 0, 1, 2 */ |
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36 | #define M1064_XCURCTRL_XGA 0x02 /* 0, 1, transparent, complement */ |
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37 | #define M1064_XCURCTRL_XWIN 0x03 /* transparent, transparent, 0, 1 */ |
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38 | #define M1064_XCURCOL0RED 0x08 |
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39 | #define M1064_XCURCOL0GREEN 0x09 |
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40 | #define M1064_XCURCOL0BLUE 0x0A |
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41 | #define M1064_XCURCOL1RED 0x0C |
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42 | #define M1064_XCURCOL1GREEN 0x0D |
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43 | #define M1064_XCURCOL1BLUE 0x0E |
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44 | #define M1064_XCURCOL2RED 0x10 |
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45 | #define M1064_XCURCOL2GREEN 0x11 |
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46 | #define M1064_XCURCOL2BLUE 0x12 |
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47 | #define DAC1064_XVREFCTRL 0x18 |
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48 | #define DAC1064_XVREFCTRL_INTERNAL 0x3F |
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49 | #define DAC1064_XVREFCTRL_EXTERNAL 0x00 |
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50 | #define DAC1064_XVREFCTRL_G100_DEFAULT 0x03 |
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51 | #define M1064_XMULCTRL 0x19 |
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52 | #define M1064_XMULCTRL_DEPTH_8BPP 0x00 /* 8 bpp paletized */ |
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53 | #define M1064_XMULCTRL_DEPTH_15BPP_1BPP 0x01 /* 15 bpp paletized + 1 bpp overlay */ |
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54 | #define M1064_XMULCTRL_DEPTH_16BPP 0x02 /* 16 bpp paletized */ |
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55 | #define M1064_XMULCTRL_DEPTH_24BPP 0x03 /* 24 bpp paletized */ |
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56 | #define M1064_XMULCTRL_DEPTH_24BPP_8BPP 0x04 /* 24 bpp direct + 8 bpp overlay paletized */ |
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57 | #define M1064_XMULCTRL_2G8V16 0x05 /* 15 bpp video direct, half xres, 8bpp paletized */ |
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58 | #define M1064_XMULCTRL_G16V16 0x06 /* 15 bpp video, 15bpp graphics, one of them paletized */ |
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59 | #define M1064_XMULCTRL_DEPTH_32BPP 0x07 /* 24 bpp paletized + 8 bpp unused */ |
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60 | #define M1064_XMULCTRL_GRAPHICS_PALETIZED 0x00 |
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61 | #define M1064_XMULCTRL_VIDEO_PALETIZED 0x08 |
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62 | #define M1064_XPIXCLKCTRL 0x1A |
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63 | #define M1064_XPIXCLKCTRL_SRC_PCI 0x00 |
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64 | #define M1064_XPIXCLKCTRL_SRC_PLL 0x01 |
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65 | #define M1064_XPIXCLKCTRL_SRC_EXT 0x02 |
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66 | #define M1064_XPIXCLKCTRL_SRC_SYS 0x03 /* G200/G400 */ |
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67 | #define M1064_XPIXCLKCTRL_SRC_PLL2 0x03 /* G450 */ |
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68 | #define M1064_XPIXCLKCTRL_SRC_MASK 0x03 |
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69 | #define M1064_XPIXCLKCTRL_EN 0x00 |
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70 | #define M1064_XPIXCLKCTRL_DIS 0x04 |
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71 | #define M1064_XPIXCLKCTRL_PLL_DOWN 0x00 |
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72 | #define M1064_XPIXCLKCTRL_PLL_UP 0x08 |
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73 | #define M1064_XGENCTRL 0x1D |
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74 | #define M1064_XGENCTRL_VS_0 0x00 |
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75 | #define M1064_XGENCTRL_VS_1 0x01 |
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76 | #define M1064_XGENCTRL_ALPHA_DIS 0x00 |
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77 | #define M1064_XGENCTRL_ALPHA_EN 0x02 |
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78 | #define M1064_XGENCTRL_BLACK_0IRE 0x00 |
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79 | #define M1064_XGENCTRL_BLACK_75IRE 0x10 |
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80 | #define M1064_XGENCTRL_SYNC_ON_GREEN 0x00 |
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81 | #define M1064_XGENCTRL_NO_SYNC_ON_GREEN 0x20 |
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82 | #define M1064_XGENCTRL_SYNC_ON_GREEN_MASK 0x20 |
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83 | #define M1064_XMISCCTRL 0x1E |
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84 | #define M1064_XMISCCTRL_DAC_DIS 0x00 |
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85 | #define M1064_XMISCCTRL_DAC_EN 0x01 |
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86 | #define M1064_XMISCCTRL_MFC_VGA 0x00 |
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87 | #define M1064_XMISCCTRL_MFC_MAFC 0x02 |
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88 | #define M1064_XMISCCTRL_MFC_DIS 0x06 |
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89 | #define GX00_XMISCCTRL_MFC_MAFC 0x02 |
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90 | #define GX00_XMISCCTRL_MFC_PANELLINK 0x04 |
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91 | #define GX00_XMISCCTRL_MFC_DIS 0x06 |
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92 | #define GX00_XMISCCTRL_MFC_MASK 0x06 |
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93 | #define M1064_XMISCCTRL_DAC_6BIT 0x00 |
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94 | #define M1064_XMISCCTRL_DAC_8BIT 0x08 |
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95 | #define M1064_XMISCCTRL_DAC_WIDTHMASK 0x08 |
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96 | #define M1064_XMISCCTRL_LUT_DIS 0x00 |
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97 | #define M1064_XMISCCTRL_LUT_EN 0x10 |
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98 | #define G400_XMISCCTRL_VDO_MAFC12 0x00 |
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99 | #define G400_XMISCCTRL_VDO_BYPASS656 0x40 |
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100 | #define G400_XMISCCTRL_VDO_C2_MAFC12 0x80 |
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101 | #define G400_XMISCCTRL_VDO_C2_BYPASS656 0xC0 |
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102 | #define G400_XMISCCTRL_VDO_MASK 0xE0 |
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103 | #define M1064_XGENIOCTRL 0x2A |
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104 | #define M1064_XGENIODATA 0x2B |
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105 | #define DAC1064_XSYSPLLM 0x2C |
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106 | #define DAC1064_XSYSPLLN 0x2D |
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107 | #define DAC1064_XSYSPLLP 0x2E |
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108 | #define DAC1064_XSYSPLLSTAT 0x2F |
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109 | #define M1064_XZOOMCTRL 0x38 |
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110 | #define M1064_XZOOMCTRL_1 0x00 |
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111 | #define M1064_XZOOMCTRL_2 0x01 |
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112 | #define M1064_XZOOMCTRL_4 0x03 |
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113 | #define M1064_XSENSETEST 0x3A |
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114 | #define M1064_XSENSETEST_BCOMP 0x01 |
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115 | #define M1064_XSENSETEST_GCOMP 0x02 |
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116 | #define M1064_XSENSETEST_RCOMP 0x04 |
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117 | #define M1064_XSENSETEST_PDOWN 0x00 |
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118 | #define M1064_XSENSETEST_PUP 0x80 |
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119 | #define M1064_XCRCREML 0x3C |
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120 | #define M1064_XCRCREMH 0x3D |
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121 | #define M1064_XCRCBITSEL 0x3E |
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122 | #define M1064_XCOLKEYMASKL 0x40 |
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123 | #define M1064_XCOLKEYMASKH 0x41 |
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124 | #define M1064_XCOLKEYL 0x42 |
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125 | #define M1064_XCOLKEYH 0x43 |
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126 | #define M1064_XPIXPLLAM 0x44 |
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127 | #define M1064_XPIXPLLAN 0x45 |
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128 | #define M1064_XPIXPLLAP 0x46 |
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129 | #define M1064_XPIXPLLBM 0x48 |
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130 | #define M1064_XPIXPLLBN 0x49 |
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131 | #define M1064_XPIXPLLBP 0x4A |
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132 | #define M1064_XPIXPLLCM 0x4C |
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133 | #define M1064_XPIXPLLCN 0x4D |
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134 | #define M1064_XPIXPLLCP 0x4E |
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135 | #define M1064_XPIXPLLSTAT 0x4F |
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136 | |||
137 | #define M1064_XTVO_IDX 0x87 |
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138 | #define M1064_XTVO_DATA 0x88 |
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139 | |||
140 | #define M1064_XOUTPUTCONN 0x8A |
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141 | #define M1064_XSYNCCTRL 0x8B |
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142 | #define M1064_XVIDPLLSTAT 0x8C |
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143 | #define M1064_XVIDPLLP 0x8D |
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144 | #define M1064_XVIDPLLM 0x8E |
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145 | #define M1064_XVIDPLLN 0x8F |
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146 | |||
147 | #define M1064_XPWRCTRL 0xA0 |
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148 | |||
149 | #define M1064_XPANMODE 0xA2 |
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150 | |||
151 | enum POS1064 { |
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152 | POS1064_XCURADDL=0, POS1064_XCURADDH, POS1064_XCURCTRL, |
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153 | POS1064_XCURCOL0RED, POS1064_XCURCOL0GREEN, POS1064_XCURCOL0BLUE, |
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154 | POS1064_XCURCOL1RED, POS1064_XCURCOL1GREEN, POS1064_XCURCOL1BLUE, |
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155 | POS1064_XCURCOL2RED, POS1064_XCURCOL2GREEN, POS1064_XCURCOL2BLUE, |
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156 | POS1064_XVREFCTRL, POS1064_XMULCTRL, POS1064_XPIXCLKCTRL, POS1064_XGENCTRL, |
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157 | POS1064_XMISCCTRL, |
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158 | POS1064_XGENIOCTRL, POS1064_XGENIODATA, POS1064_XZOOMCTRL, POS1064_XSENSETEST, |
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159 | POS1064_XCRCBITSEL, |
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160 | POS1064_XCOLKEYMASKL, POS1064_XCOLKEYMASKH, POS1064_XCOLKEYL, POS1064_XCOLKEYH, |
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161 | POS1064_XOUTPUTCONN, POS1064_XPANMODE, POS1064_XPWRCTRL }; |
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162 | |||
163 | |||
164 | #endif /* __MATROXFB_DAC1064_H__ */ |