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420 giacomo 1
/*
2
    piix4.c - Part of lm_sensors, Linux kernel modules for hardware
3
              monitoring
4
    Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
5
    Philip Edelbrock <phil@netroedge.com>
6
 
7
    This program is free software; you can redistribute it and/or modify
8
    it under the terms of the GNU General Public License as published by
9
    the Free Software Foundation; either version 2 of the License, or
10
    (at your option) any later version.
11
 
12
    This program is distributed in the hope that it will be useful,
13
    but WITHOUT ANY WARRANTY; without even the implied warranty of
14
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
    GNU General Public License for more details.
16
 
17
    You should have received a copy of the GNU General Public License
18
    along with this program; if not, write to the Free Software
19
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20
*/
21
 
22
/*
23
   Supports:
24
        Intel PIIX4, 440MX
25
        Serverworks OSB4, CSB5
26
        SMSC Victory66
27
 
28
   Note: we assume there can only be one device, with one SMBus interface.
29
*/
30
 
31
/* #define DEBUG 1 */
32
 
33
#include <linux/module.h>
34
#include <linux/config.h>
35
#include <linux/pci.h>
36
#include <linux/kernel.h>
37
#include <linux/stddef.h>
38
#include <linux/sched.h>
39
#include <linux/ioport.h>
40
#include <linux/i2c.h>
41
#include <linux/init.h>
42
#include <linux/apm_bios.h>
43
#include <asm/io.h>
44
 
45
 
46
struct sd {
47
        const unsigned short mfr;
48
        const unsigned short dev;
49
        const unsigned char fn;
50
        const char *name;
51
};
52
 
53
/* PIIX4 SMBus address offsets */
54
#define SMBHSTSTS       (0 + piix4_smba)
55
#define SMBHSLVSTS      (1 + piix4_smba)
56
#define SMBHSTCNT       (2 + piix4_smba)
57
#define SMBHSTCMD       (3 + piix4_smba)
58
#define SMBHSTADD       (4 + piix4_smba)
59
#define SMBHSTDAT0      (5 + piix4_smba)
60
#define SMBHSTDAT1      (6 + piix4_smba)
61
#define SMBBLKDAT       (7 + piix4_smba)
62
#define SMBSLVCNT       (8 + piix4_smba)
63
#define SMBSHDWCMD      (9 + piix4_smba)
64
#define SMBSLVEVT       (0xA + piix4_smba)
65
#define SMBSLVDAT       (0xC + piix4_smba)
66
 
67
/* PCI Address Constants */
68
#define SMBBA           0x090
69
#define SMBHSTCFG       0x0D2
70
#define SMBSLVC         0x0D3
71
#define SMBSHDW1        0x0D4
72
#define SMBSHDW2        0x0D5
73
#define SMBREV          0x0D6
74
 
75
/* Other settings */
76
#define MAX_TIMEOUT     500
77
#define  ENABLE_INT9    0
78
 
79
/* PIIX4 constants */
80
#define PIIX4_QUICK             0x00
81
#define PIIX4_BYTE              0x04
82
#define PIIX4_BYTE_DATA         0x08
83
#define PIIX4_WORD_DATA         0x0C
84
#define PIIX4_BLOCK_DATA        0x14
85
 
86
/* insmod parameters */
87
 
88
/* If force is set to anything different from 0, we forcibly enable the
89
   PIIX4. DANGEROUS! */
90
static int force = 0;
91
MODULE_PARM(force, "i");
92
MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
93
 
94
/* If force_addr is set to anything different from 0, we forcibly enable
95
   the PIIX4 at the given address. VERY DANGEROUS! */
96
static int force_addr = 0;
97
MODULE_PARM(force_addr, "i");
98
MODULE_PARM_DESC(force_addr,
99
                 "Forcibly enable the PIIX4 at the given address. "
100
                 "EXTREMELY DANGEROUS!");
101
 
102
static int piix4_transaction(void);
103
 
104
 
105
static unsigned short piix4_smba = 0;
106
static struct i2c_adapter piix4_adapter;
107
 
108
/*
109
 * Get DMI information.
110
 */
111
static int ibm_dmi_probe(void)
112
{
113
#ifdef CONFIG_X86
114
        extern int is_unsafe_smbus;
115
        return is_unsafe_smbus;
116
#else
117
        return 0;
118
#endif
119
}
120
 
121
static int piix4_setup(struct pci_dev *PIIX4_dev, const struct pci_device_id *id)
122
{
123
        int error_return = 0;
124
        unsigned char temp;
125
 
126
        /* match up the function */
127
        if (PCI_FUNC(PIIX4_dev->devfn) != id->driver_data)
128
                return -ENODEV;
129
 
130
        dev_info(&PIIX4_dev->dev, "Found %s device\n", pci_name(PIIX4_dev));
131
 
132
        if(ibm_dmi_probe()) {
133
                dev_err(&PIIX4_dev->dev, "IBM Laptop detected; this module "
134
                        "may corrupt your serial eeprom! Refusing to load "
135
                        "module!\n");
136
                error_return = -EPERM;
137
                goto END;
138
        }
139
 
140
        /* Determine the address of the SMBus areas */
141
        if (force_addr) {
142
                piix4_smba = force_addr & 0xfff0;
143
                force = 0;
144
        } else {
145
                pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
146
                piix4_smba &= 0xfff0;
147
                if(piix4_smba == 0) {
148
                        dev_err(&PIIX4_dev->dev, "SMB base address "
149
                                "uninitialized - upgrade BIOS or use "
150
                                "force_addr=0xaddr\n");
151
                        return -ENODEV;
152
                }
153
        }
154
 
155
        if (!request_region(piix4_smba, 8, "piix4-smbus")) {
156
                dev_err(&PIIX4_dev->dev, "SMB region 0x%x already in use!\n",
157
                        piix4_smba);
158
                error_return = -ENODEV;
159
                goto END;
160
        }
161
 
162
        pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
163
 
164
        /* Some BIOS will set up the chipset incorrectly and leave a register
165
           in an undefined state (causing I2C to act very strangely). */
166
        if (temp & 0x02) {
167
                dev_info(&PIIX4_dev->dev, "Worked around buggy BIOS (I2C)\n");
168
                temp = temp & 0xfd;
169
                pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp);
170
        }
171
 
172
        /* If force_addr is set, we program the new address here. Just to make
173
           sure, we disable the PIIX4 first. */
174
        if (force_addr) {
175
                pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
176
                pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
177
                pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
178
                dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
179
                        "new address %04x!\n", piix4_smba);
180
        } else if ((temp & 1) == 0) {
181
                if (force) {
182
                        /* This should never need to be done, but has been
183
                         * noted that many Dell machines have the SMBus
184
                         * interface on the PIIX4 disabled!? NOTE: This assumes
185
                         * I/O space and other allocations WERE done by the
186
                         * Bios!  Don't complain if your hardware does weird
187
                         * things after enabling this. :') Check for Bios
188
                         * updates before resorting to this.
189
                         */
190
                        pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
191
                                              temp | 1);
192
                        dev_printk(KERN_NOTICE, &PIIX4_dev->dev,
193
                                "WARNING: SMBus interface has been "
194
                                "FORCEFULLY ENABLED!\n");
195
                } else {
196
                        dev_err(&PIIX4_dev->dev,
197
                                "Host SMBus controller not enabled!\n");
198
                        error_return = -ENODEV;
199
                        goto END;
200
                }
201
        }
202
 
203
        if ((temp & 0x0E) == 8)
204
                dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
205
        else if ((temp & 0x0E) == 0)
206
                dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
207
        else
208
                dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
209
                        "(or code out of date)!\n");
210
 
211
        pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
212
        dev_dbg(&PIIX4_dev->dev, "SMBREV = 0x%X\n", temp);
213
        dev_dbg(&PIIX4_dev->dev, "SMBA = 0x%X\n", piix4_smba);
214
 
215
END:
216
        return error_return;
217
}
218
 
219
/* Another internally used function */
220
static int piix4_transaction(void)
221
{
222
        int temp;
223
        int result = 0;
224
        int timeout = 0;
225
 
226
        dev_dbg(&piix4_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
227
                "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
228
                inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
229
                inb_p(SMBHSTDAT1));
230
 
231
        /* Make sure the SMBus host is ready to start transmitting */
232
        if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
233
                dev_dbg(&piix4_adapter.dev, "SMBus busy (%02x). "
234
                        "Resetting... \n", temp);
235
                outb_p(temp, SMBHSTSTS);
236
                if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
237
                        dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp);
238
                        return -1;
239
                } else {
240
                        dev_dbg(&piix4_adapter.dev, "Successfull!\n");
241
                }
242
        }
243
 
244
        /* start the transaction by setting bit 6 */
245
        outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
246
 
247
        /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
248
        do {
249
                i2c_delay(1);
250
                temp = inb_p(SMBHSTSTS);
251
        } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
252
 
253
        /* If the SMBus is still busy, we give up */
254
        if (timeout >= MAX_TIMEOUT) {
255
                dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
256
                result = -1;
257
        }
258
 
259
        if (temp & 0x10) {
260
                result = -1;
261
                dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n");
262
        }
263
 
264
        if (temp & 0x08) {
265
                result = -1;
266
                dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be "
267
                        "locked until next hard reset. (sorry!)\n");
268
                /* Clock stops and slave is stuck in mid-transmission */
269
        }
270
 
271
        if (temp & 0x04) {
272
                result = -1;
273
                dev_dbg(&piix4_adapter.dev, "Error: no response!\n");
274
        }
275
 
276
        if (inb_p(SMBHSTSTS) != 0x00)
277
                outb_p(inb(SMBHSTSTS), SMBHSTSTS);
278
 
279
        if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
280
                dev_err(&piix4_adapter.dev, "Failed reset at end of "
281
                        "transaction (%02x)\n", temp);
282
        }
283
        dev_dbg(&piix4_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
284
                "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
285
                inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
286
                inb_p(SMBHSTDAT1));
287
        return result;
288
}
289
 
290
/* Return -1 on error. */
291
static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
292
                 unsigned short flags, char read_write,
293
                 u8 command, int size, union i2c_smbus_data * data)
294
{
295
        int i, len;
296
 
297
        switch (size) {
298
        case I2C_SMBUS_PROC_CALL:
299
                dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
300
                return -1;
301
        case I2C_SMBUS_QUICK:
302
                outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
303
                       SMBHSTADD);
304
                size = PIIX4_QUICK;
305
                break;
306
        case I2C_SMBUS_BYTE:
307
                outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
308
                       SMBHSTADD);
309
                if (read_write == I2C_SMBUS_WRITE)
310
                        outb_p(command, SMBHSTCMD);
311
                size = PIIX4_BYTE;
312
                break;
313
        case I2C_SMBUS_BYTE_DATA:
314
                outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
315
                       SMBHSTADD);
316
                outb_p(command, SMBHSTCMD);
317
                if (read_write == I2C_SMBUS_WRITE)
318
                        outb_p(data->byte, SMBHSTDAT0);
319
                size = PIIX4_BYTE_DATA;
320
                break;
321
        case I2C_SMBUS_WORD_DATA:
322
                outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
323
                       SMBHSTADD);
324
                outb_p(command, SMBHSTCMD);
325
                if (read_write == I2C_SMBUS_WRITE) {
326
                        outb_p(data->word & 0xff, SMBHSTDAT0);
327
                        outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
328
                }
329
                size = PIIX4_WORD_DATA;
330
                break;
331
        case I2C_SMBUS_BLOCK_DATA:
332
                outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
333
                       SMBHSTADD);
334
                outb_p(command, SMBHSTCMD);
335
                if (read_write == I2C_SMBUS_WRITE) {
336
                        len = data->block[0];
337
                        if (len < 0)
338
                                len = 0;
339
                        if (len > 32)
340
                                len = 32;
341
                        outb_p(len, SMBHSTDAT0);
342
                        i = inb_p(SMBHSTCNT);   /* Reset SMBBLKDAT */
343
                        for (i = 1; i <= len; i++)
344
                                outb_p(data->block[i], SMBBLKDAT);
345
                }
346
                size = PIIX4_BLOCK_DATA;
347
                break;
348
        }
349
 
350
        outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
351
 
352
        if (piix4_transaction())        /* Error in transaction */
353
                return -1;
354
 
355
        if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
356
                return 0;
357
 
358
 
359
        switch (size) {
360
        case PIIX4_BYTE:        /* Where is the result put? I assume here it is in
361
                                   SMBHSTDAT0 but it might just as well be in the
362
                                   SMBHSTCMD. No clue in the docs */
363
 
364
                data->byte = inb_p(SMBHSTDAT0);
365
                break;
366
        case PIIX4_BYTE_DATA:
367
                data->byte = inb_p(SMBHSTDAT0);
368
                break;
369
        case PIIX4_WORD_DATA:
370
                data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
371
                break;
372
        case PIIX4_BLOCK_DATA:
373
                data->block[0] = inb_p(SMBHSTDAT0);
374
                i = inb_p(SMBHSTCNT);   /* Reset SMBBLKDAT */
375
                for (i = 1; i <= data->block[0]; i++)
376
                        data->block[i] = inb_p(SMBBLKDAT);
377
                break;
378
        }
379
        return 0;
380
}
381
 
382
static u32 piix4_func(struct i2c_adapter *adapter)
383
{
384
        return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
385
            I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
386
            I2C_FUNC_SMBUS_BLOCK_DATA;
387
}
388
 
389
static struct i2c_algorithm smbus_algorithm = {
390
        .name           = "Non-I2C SMBus adapter",
391
        .id             = I2C_ALGO_SMBUS,
392
        .smbus_xfer     = piix4_access,
393
        .functionality  = piix4_func,
394
};
395
 
396
static struct i2c_adapter piix4_adapter = {
397
        .owner          = THIS_MODULE,
398
        .class          = I2C_ADAP_CLASS_SMBUS,
399
        .algo           = &smbus_algorithm,
400
        .name           = "unset",
401
};
402
 
403
static struct pci_device_id piix4_ids[] = {
404
        {
405
                .vendor =       PCI_VENDOR_ID_INTEL,
406
                .device =       PCI_DEVICE_ID_INTEL_82371AB_3,
407
                .subvendor =    PCI_ANY_ID,
408
                .subdevice =    PCI_ANY_ID,
409
                .driver_data =  3
410
        },
411
        {
412
                .vendor =       PCI_VENDOR_ID_SERVERWORKS,
413
                .device =       PCI_DEVICE_ID_SERVERWORKS_OSB4,
414
                .subvendor =    PCI_ANY_ID,
415
                .subdevice =    PCI_ANY_ID,
416
                .driver_data =  0,
417
        },
418
        {
419
                .vendor =       PCI_VENDOR_ID_SERVERWORKS,
420
                .device =       PCI_DEVICE_ID_SERVERWORKS_CSB5,
421
                .subvendor =    PCI_ANY_ID,
422
                .subdevice =    PCI_ANY_ID,
423
                .driver_data =  0,
424
        },
425
        {
426
                .vendor =       PCI_VENDOR_ID_INTEL,
427
                .device =       PCI_DEVICE_ID_INTEL_82443MX_3,
428
                .subvendor =    PCI_ANY_ID,
429
                .subdevice =    PCI_ANY_ID,
430
                .driver_data =  3,
431
        },
432
        {
433
                .vendor =       PCI_VENDOR_ID_EFAR,
434
                .device =       PCI_DEVICE_ID_EFAR_SLC90E66_3,
435
                .subvendor =    PCI_ANY_ID,
436
                .subdevice =    PCI_ANY_ID,
437
                .driver_data =  0,
438
        },
439
        { 0, }
440
};
441
 
442
static int __devinit piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
443
{
444
        int retval;
445
 
446
        retval = piix4_setup(dev, id);
447
        if (retval)
448
                return retval;
449
 
450
        /* set up the driverfs linkage to our parent device */
451
        piix4_adapter.dev.parent = &dev->dev;
452
 
453
        snprintf(piix4_adapter.name, I2C_NAME_SIZE,
454
                "SMBus PIIX4 adapter at %04x", piix4_smba);
455
 
456
        retval = i2c_add_adapter(&piix4_adapter);
457
 
458
        return retval;
459
}
460
 
461
static void __devexit piix4_remove(struct pci_dev *dev)
462
{
463
        i2c_del_adapter(&piix4_adapter);
464
}
465
 
466
 
467
static struct pci_driver piix4_driver = {
468
        .name           = "piix4-smbus",
469
        .id_table       = piix4_ids,
470
        .probe          = piix4_probe,
471
        .remove         = __devexit_p(piix4_remove),
472
};
473
 
474
static int __init i2c_piix4_init(void)
475
{
476
        return pci_module_init(&piix4_driver);
477
}
478
 
479
 
480
static void __exit i2c_piix4_exit(void)
481
{
482
        pci_unregister_driver(&piix4_driver);
483
        release_region(piix4_smba, 8);
484
}
485
 
486
MODULE_AUTHOR
487
    ("Frodo Looijaard <frodol@dds.nl> and Philip Edelbrock <phil@netroedge.com>");
488
MODULE_DESCRIPTION("PIIX4 SMBus driver");
489
MODULE_LICENSE("GPL");
490
 
491
module_init(i2c_piix4_init);
492
module_exit(i2c_piix4_exit);