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| Rev | Author | Line No. | Line |
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| 434 | giacomo | 1 | /****************************************************************************** |
| 2 | * |
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| 3 | * Name: actbl71.h - IA-64 Extensions to the ACPI Spec Rev. 0.71 |
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| 4 | * This file includes tables specific to this |
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| 5 | * specification revision. |
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| 6 | * |
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| 7 | *****************************************************************************/ |
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| 8 | |||
| 9 | /* |
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| 10 | * Copyright (C) 2000 - 2003, R. Byron Moore |
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| 11 | * |
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| 12 | * This program is free software; you can redistribute it and/or modify |
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| 13 | * it under the terms of the GNU General Public License as published by |
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| 14 | * the Free Software Foundation; either version 2 of the License, or |
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| 15 | * (at your option) any later version. |
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| 16 | * |
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| 17 | * This program is distributed in the hope that it will be useful, |
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| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 20 | * GNU General Public License for more details. |
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| 21 | * |
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| 22 | * You should have received a copy of the GNU General Public License |
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| 23 | * along with this program; if not, write to the Free Software |
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| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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| 25 | */ |
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| 26 | |||
| 27 | #ifndef __ACTBL71_H__ |
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| 28 | #define __ACTBL71_H__ |
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| 29 | |||
| 30 | |||
| 31 | /* 0.71 FADT address_space data item bitmasks defines */ |
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| 32 | /* If the associated bit is zero then it is in memory space else in io space */ |
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| 33 | |||
| 34 | #define SMI_CMD_ADDRESS_SPACE 0x01 |
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| 35 | #define PM1_BLK_ADDRESS_SPACE 0x02 |
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| 36 | #define PM2_CNT_BLK_ADDRESS_SPACE 0x04 |
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| 37 | #define PM_TMR_BLK_ADDRESS_SPACE 0x08 |
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| 38 | #define GPE0_BLK_ADDRESS_SPACE 0x10 |
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| 39 | #define GPE1_BLK_ADDRESS_SPACE 0x20 |
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| 40 | |||
| 41 | /* Only for clarity in declarations */ |
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| 42 | |||
| 43 | typedef u64 IO_ADDRESS; |
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| 44 | |||
| 45 | |||
| 46 | #pragma pack(1) |
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| 47 | struct /* Root System Descriptor Pointer */ |
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| 48 | { |
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| 49 | NATIVE_CHAR signature [8]; /* contains "RSD PTR " */ |
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| 50 | u8 checksum; /* to make sum of struct == 0 */ |
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| 51 | NATIVE_CHAR oem_id [6]; /* OEM identification */ |
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| 52 | u8 reserved; /* Must be 0 for 1.0, 2 for 2.0 */ |
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| 53 | u64 rsdt_physical_address; /* 64-bit physical address of RSDT */ |
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| 54 | }; |
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| 55 | |||
| 56 | |||
| 57 | /*****************************************/ |
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| 58 | /* IA64 Extensions to ACPI Spec Rev 0.71 */ |
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| 59 | /* for the Root System Description Table */ |
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| 60 | /*****************************************/ |
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| 61 | struct |
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| 62 | { |
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| 63 | struct acpi_table_header header; /* Table header */ |
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| 64 | u32 reserved_pad; /* IA64 alignment, must be 0 */ |
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| 65 | u64 table_offset_entry [1]; /* Array of pointers to other */ |
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| 66 | /* tables' headers */ |
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| 67 | }; |
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| 68 | |||
| 69 | |||
| 70 | /*******************************************/ |
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| 71 | /* IA64 Extensions to ACPI Spec Rev 0.71 */ |
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| 72 | /* for the Firmware ACPI Control Structure */ |
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| 73 | /*******************************************/ |
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| 74 | struct |
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| 75 | { |
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| 76 | NATIVE_CHAR signature[4]; /* signature "FACS" */ |
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| 77 | u32 length; /* length of structure, in bytes */ |
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| 78 | u32 hardware_signature; /* hardware configuration signature */ |
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| 79 | u32 reserved4; /* must be 0 */ |
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| 80 | u64 firmware_waking_vector; /* ACPI OS waking vector */ |
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| 81 | u64 global_lock; /* Global Lock */ |
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| 82 | u32 S4bios_f : 1; /* Indicates if S4BIOS support is present */ |
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| 83 | u32 reserved1 : 31; /* must be 0 */ |
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| 84 | u8 reserved3 [28]; /* reserved - must be zero */ |
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| 85 | }; |
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| 86 | |||
| 87 | |||
| 88 | /******************************************/ |
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| 89 | /* IA64 Extensions to ACPI Spec Rev 0.71 */ |
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| 90 | /* for the Fixed ACPI Description Table */ |
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| 91 | /******************************************/ |
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| 92 | struct |
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| 93 | { |
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| 94 | struct acpi_table_header header; /* table header */ |
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| 95 | u32 reserved_pad; /* IA64 alignment, must be 0 */ |
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| 96 | u64 firmware_ctrl; /* 64-bit Physical address of FACS */ |
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| 97 | u64 dsdt; /* 64-bit Physical address of DSDT */ |
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| 98 | u8 model; /* System Interrupt Model */ |
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| 99 | u8 address_space; /* Address Space Bitmask */ |
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| 100 | u16 sci_int; /* System vector of SCI interrupt */ |
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| 101 | u8 acpi_enable; /* value to write to smi_cmd to enable ACPI */ |
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| 102 | u8 acpi_disable; /* value to write to smi_cmd to disable ACPI */ |
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| 103 | u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ |
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| 104 | u8 reserved2; /* reserved - must be zero */ |
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| 105 | u64 smi_cmd; /* Port address of SMI command port */ |
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| 106 | u64 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ |
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| 107 | u64 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ |
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| 108 | u64 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ |
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| 109 | u64 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ |
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| 110 | u64 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ |
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| 111 | u64 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ |
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| 112 | u64 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ |
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| 113 | u64 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ |
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| 114 | u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ |
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| 115 | u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ |
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| 116 | u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ |
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| 117 | u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */ |
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| 118 | u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ |
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| 119 | u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ |
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| 120 | u8 gpe1_base; /* offset in gpe model where gpe1 events start */ |
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| 121 | u8 reserved3; /* reserved */ |
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| 122 | u16 plvl2_lat; /* worst case HW latency to enter/exit C2 state */ |
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| 123 | u16 plvl3_lat; /* worst case HW latency to enter/exit C3 state */ |
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| 124 | u8 day_alrm; /* index to day-of-month alarm in RTC CMOS RAM */ |
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| 125 | u8 mon_alrm; /* index to month-of-year alarm in RTC CMOS RAM */ |
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| 126 | u8 century; /* index to century in RTC CMOS RAM */ |
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| 127 | u8 reserved4; /* reserved */ |
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| 128 | u32 flush_cash : 1; /* PAL_FLUSH_CACHE is correctly supported */ |
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| 129 | u32 reserved5 : 1; /* reserved - must be zero */ |
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| 130 | u32 proc_c1 : 1; /* all processors support C1 state */ |
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| 131 | u32 plvl2_up : 1; /* C2 state works on MP system */ |
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| 132 | u32 pwr_button : 1; /* Power button is handled as a generic feature */ |
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| 133 | u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */ |
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| 134 | u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */ |
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| 135 | u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */ |
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| 136 | u32 tmr_val_ext : 1; /* tmr_val is 32 bits */ |
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| 137 | u32 dock_cap : 1; /* Supports Docking */ |
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| 138 | u32 reserved6 : 22; /* reserved - must be zero */ |
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| 139 | }; |
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| 140 | |||
| 141 | #pragma pack() |
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| 142 | |||
| 143 | #endif /* __ACTBL71_H__ */ |
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| 144 |