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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 422 | giacomo | 1 | /* |
| 2 | * include/asm-i386/bugs.h |
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| 3 | * |
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| 4 | * Copyright (C) 1994 Linus Torvalds |
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| 5 | * |
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| 6 | * Cyrix stuff, June 1998 by: |
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| 7 | * - Rafael R. Reilova (moved everything from head.S), |
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| 8 | * <rreilova@ececs.uc.edu> |
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| 9 | * - Channing Corn (tests & fixes), |
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| 10 | * - Andrew D. Balsa (code cleanup). |
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| 11 | * |
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| 12 | * Pentium III FXSR, SSE support |
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| 13 | * Gareth Hughes <gareth@valinux.com>, May 2000 |
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| 14 | */ |
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| 15 | |||
| 16 | /* |
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| 17 | * This is included by init/main.c to check for architecture-dependent bugs. |
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| 18 | * |
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| 19 | * Needs: |
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| 20 | * void check_bugs(void); |
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| 21 | */ |
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| 22 | |||
| 23 | #include <linux/config.h> |
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| 24 | #include <linux/init.h> |
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| 25 | #include <asm/processor.h> |
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| 26 | #include <asm/i387.h> |
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| 27 | #include <asm/msr.h> |
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| 28 | |||
| 29 | static int __init no_halt(char *s) |
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| 30 | { |
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| 31 | boot_cpu_data.hlt_works_ok = 0; |
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| 32 | return 1; |
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| 33 | } |
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| 34 | |||
| 35 | __setup("no-hlt", no_halt); |
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| 36 | |||
| 37 | static int __init mca_pentium(char *s) |
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| 38 | { |
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| 39 | mca_pentium_flag = 1; |
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| 40 | return 1; |
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| 41 | } |
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| 42 | |||
| 43 | __setup("mca-pentium", mca_pentium); |
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| 44 | |||
| 45 | static int __init no_387(char *s) |
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| 46 | { |
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| 47 | boot_cpu_data.hard_math = 0; |
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| 48 | write_cr0(0xE | read_cr0()); |
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| 49 | return 1; |
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| 50 | } |
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| 51 | |||
| 52 | __setup("no387", no_387); |
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| 53 | |||
| 54 | static double __initdata x = 4195835.0; |
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| 55 | static double __initdata y = 3145727.0; |
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| 56 | |||
| 57 | /* |
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| 58 | * This used to check for exceptions.. |
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| 59 | * However, it turns out that to support that, |
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| 60 | * the XMM trap handlers basically had to |
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| 61 | * be buggy. So let's have a correct XMM trap |
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| 62 | * handler, and forget about printing out |
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| 63 | * some status at boot. |
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| 64 | * |
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| 65 | * We should really only care about bugs here |
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| 66 | * anyway. Not features. |
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| 67 | */ |
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| 68 | static void __init check_fpu(void) |
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| 69 | { |
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| 70 | if (!boot_cpu_data.hard_math) { |
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| 71 | #ifndef CONFIG_MATH_EMULATION |
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| 72 | printk(KERN_EMERG "No coprocessor found and no math emulation present.\n"); |
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| 73 | printk(KERN_EMERG "Giving up.\n"); |
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| 74 | for (;;) ; |
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| 75 | #endif |
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| 76 | return; |
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| 77 | } |
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| 78 | |||
| 79 | /* Enable FXSR and company _before_ testing for FP problems. */ |
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| 80 | /* |
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| 81 | * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned. |
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| 82 | */ |
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| 83 | if (offsetof(struct task_struct, thread.i387.fxsave) & 15) { |
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| 84 | extern void __buggy_fxsr_alignment(void); |
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| 85 | __buggy_fxsr_alignment(); |
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| 86 | } |
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| 87 | if (cpu_has_fxsr) { |
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| 88 | printk(KERN_INFO "Enabling fast FPU save and restore... "); |
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| 89 | set_in_cr4(X86_CR4_OSFXSR); |
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| 90 | printk("done.\n"); |
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| 91 | } |
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| 92 | if (cpu_has_xmm) { |
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| 93 | printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... "); |
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| 94 | set_in_cr4(X86_CR4_OSXMMEXCPT); |
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| 95 | printk("done.\n"); |
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| 96 | } |
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| 97 | |||
| 98 | /* Test for the divl bug.. */ |
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| 99 | __asm__("fninit\n\t" |
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| 100 | "fldl %1\n\t" |
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| 101 | "fdivl %2\n\t" |
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| 102 | "fmull %2\n\t" |
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| 103 | "fldl %1\n\t" |
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| 104 | "fsubp %%st,%%st(1)\n\t" |
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| 105 | "fistpl %0\n\t" |
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| 106 | "fwait\n\t" |
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| 107 | "fninit" |
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| 108 | : "=m" (*&boot_cpu_data.fdiv_bug) |
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| 109 | : "m" (*&x), "m" (*&y)); |
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| 110 | if (boot_cpu_data.fdiv_bug) |
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| 111 | printk("Hmm, FPU with FDIV bug.\n"); |
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| 112 | } |
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| 113 | |||
| 114 | static void __init check_hlt(void) |
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| 115 | { |
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| 116 | printk(KERN_INFO "Checking 'hlt' instruction... "); |
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| 117 | if (!boot_cpu_data.hlt_works_ok) { |
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| 118 | printk("disabled\n"); |
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| 119 | return; |
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| 120 | } |
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| 121 | __asm__ __volatile__("hlt ; hlt ; hlt ; hlt"); |
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| 122 | printk("OK.\n"); |
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| 123 | } |
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| 124 | |||
| 125 | /* |
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| 126 | * Most 386 processors have a bug where a POPAD can lock the |
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| 127 | * machine even from user space. |
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| 128 | */ |
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| 129 | |||
| 130 | static void __init check_popad(void) |
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| 131 | { |
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| 132 | #ifndef CONFIG_X86_POPAD_OK |
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| 133 | int res, inp = (int) &res; |
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| 134 | |||
| 135 | printk(KERN_INFO "Checking for popad bug... "); |
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| 136 | __asm__ __volatile__( |
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| 137 | "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx " |
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| 138 | : "=&a" (res) |
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| 139 | : "d" (inp) |
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| 140 | : "ecx", "edi" ); |
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| 141 | /* If this fails, it means that any user program may lock the CPU hard. Too bad. */ |
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| 142 | if (res != 12345678) printk( "Buggy.\n" ); |
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| 143 | else printk( "OK.\n" ); |
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| 144 | #endif |
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| 145 | } |
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| 146 | |||
| 147 | /* |
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| 148 | * Check whether we are able to run this kernel safely on SMP. |
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| 149 | * |
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| 150 | * - In order to run on a i386, we need to be compiled for i386 |
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| 151 | * (for due to lack of "invlpg" and working WP on a i386) |
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| 152 | * - In order to run on anything without a TSC, we need to be |
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| 153 | * compiled for a i486. |
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| 154 | * - In order to support the local APIC on a buggy Pentium machine, |
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| 155 | * we need to be compiled with CONFIG_X86_GOOD_APIC disabled, |
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| 156 | * which happens implicitly if compiled for a Pentium or lower |
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| 157 | * (unless an advanced selection of CPU features is used) as an |
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| 158 | * otherwise config implies a properly working local APIC without |
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| 159 | * the need to do extra reads from the APIC. |
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| 160 | */ |
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| 161 | |||
| 162 | static void __init check_config(void) |
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| 163 | { |
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| 164 | /* |
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| 165 | * We'd better not be a i386 if we're configured to use some |
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| 166 | * i486+ only features! (WP works in supervisor mode and the |
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| 167 | * new "invlpg" and "bswap" instructions) |
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| 168 | */ |
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| 169 | #if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP) |
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| 170 | if (boot_cpu_data.x86 == 3) |
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| 171 | panic("Kernel requires i486+ for 'invlpg' and other features"); |
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| 172 | #endif |
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| 173 | |||
| 174 | /* |
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| 175 | * If we configured ourselves for a TSC, we'd better have one! |
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| 176 | */ |
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| 177 | #ifdef CONFIG_X86_TSC |
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| 178 | if (!cpu_has_tsc) |
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| 179 | panic("Kernel compiled for Pentium+, requires TSC feature!"); |
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| 180 | #endif |
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| 181 | |||
| 182 | /* |
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| 183 | * If we were told we had a good local APIC, check for buggy Pentia, |
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| 184 | * i.e. all B steppings and the C2 stepping of P54C when using their |
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| 185 | * integrated APIC (see 11AP erratum in "Pentium Processor |
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| 186 | * Specification Update"). |
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| 187 | */ |
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| 188 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC) |
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| 189 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL |
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| 190 | && cpu_has_apic |
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| 191 | && boot_cpu_data.x86 == 5 |
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| 192 | && boot_cpu_data.x86_model == 2 |
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| 193 | && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11)) |
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| 194 | panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!"); |
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| 195 | #endif |
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| 196 | } |
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| 197 | |||
| 198 | extern void alternative_instructions(void); |
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| 199 | |||
| 200 | static void __init check_bugs(void) |
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| 201 | { |
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| 202 | identify_cpu(&boot_cpu_data); |
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| 203 | #ifndef CONFIG_SMP |
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| 204 | printk("CPU: "); |
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| 205 | print_cpu_info(&boot_cpu_data); |
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| 206 | #endif |
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| 207 | check_config(); |
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| 208 | check_fpu(); |
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| 209 | check_hlt(); |
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| 210 | check_popad(); |
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| 211 | system_utsname.machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); |
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| 212 | alternative_instructions(); |
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| 213 | } |