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Rev | Author | Line No. | Line |
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422 | giacomo | 1 | #ifndef __ARCH_DESC_H |
2 | #define __ARCH_DESC_H |
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3 | |||
4 | #include <asm/ldt.h> |
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5 | #include <asm/segment.h> |
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6 | |||
7 | #ifndef __ASSEMBLY__ |
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8 | |||
9 | #include <linux/preempt.h> |
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10 | #include <linux/smp.h> |
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11 | |||
12 | #include <asm/mmu.h> |
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13 | |||
14 | extern struct desc_struct cpu_gdt_table[NR_CPUS][GDT_ENTRIES]; |
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15 | |||
16 | struct Xgt_desc_struct { |
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17 | unsigned short size; |
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18 | unsigned long address __attribute__((packed)); |
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19 | unsigned short pad; |
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20 | } __attribute__ ((packed)); |
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21 | |||
22 | extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; |
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23 | |||
24 | #define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8)) |
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25 | #define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8)) |
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26 | |||
27 | /* |
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28 | * This is the ldt that every process will get unless we need |
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29 | * something other than this. |
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30 | */ |
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31 | extern struct desc_struct default_ldt[]; |
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32 | extern void set_intr_gate(unsigned int irq, void * addr); |
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33 | |||
34 | #define _set_tssldt_desc(n,addr,limit,type) \ |
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35 | __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \ |
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36 | "movw %%ax,2(%2)\n\t" \ |
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37 | "rorl $16,%%eax\n\t" \ |
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38 | "movb %%al,4(%2)\n\t" \ |
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39 | "movb %4,5(%2)\n\t" \ |
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40 | "movb $0,6(%2)\n\t" \ |
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41 | "movb %%ah,7(%2)\n\t" \ |
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42 | "rorl $16,%%eax" \ |
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43 | : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type)) |
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44 | |||
45 | static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) |
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46 | { |
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47 | _set_tssldt_desc(&cpu_gdt_table[cpu][entry], (int)addr, 235, 0x89); |
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48 | } |
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49 | |||
50 | #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr) |
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51 | |||
52 | static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size) |
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53 | { |
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54 | _set_tssldt_desc(&cpu_gdt_table[cpu][GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82); |
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55 | } |
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56 | |||
57 | #define LDT_entry_a(info) \ |
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58 | ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) |
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59 | |||
60 | #define LDT_entry_b(info) \ |
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61 | (((info)->base_addr & 0xff000000) | \ |
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62 | (((info)->base_addr & 0x00ff0000) >> 16) | \ |
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63 | ((info)->limit & 0xf0000) | \ |
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64 | (((info)->read_exec_only ^ 1) << 9) | \ |
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65 | ((info)->contents << 10) | \ |
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66 | (((info)->seg_not_present ^ 1) << 15) | \ |
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67 | ((info)->seg_32bit << 22) | \ |
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68 | ((info)->limit_in_pages << 23) | \ |
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69 | ((info)->useable << 20) | \ |
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70 | 0x7000) |
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71 | |||
72 | #define LDT_empty(info) (\ |
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73 | (info)->base_addr == 0 && \ |
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74 | (info)->limit == 0 && \ |
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75 | (info)->contents == 0 && \ |
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76 | (info)->read_exec_only == 1 && \ |
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77 | (info)->seg_32bit == 0 && \ |
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78 | (info)->limit_in_pages == 0 && \ |
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79 | (info)->seg_not_present == 1 && \ |
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80 | (info)->useable == 0 ) |
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81 | |||
82 | #if TLS_SIZE != 24 |
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83 | # error update this code. |
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84 | #endif |
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85 | |||
86 | static inline void load_TLS(struct thread_struct *t, unsigned int cpu) |
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87 | { |
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88 | #define C(i) cpu_gdt_table[cpu][GDT_ENTRY_TLS_MIN + i] = t->tls_array[i] |
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89 | C(0); C(1); C(2); |
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90 | #undef C |
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91 | } |
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92 | |||
93 | static inline void clear_LDT(void) |
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94 | { |
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95 | int cpu = get_cpu(); |
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96 | |||
97 | set_ldt_desc(cpu, &default_ldt[0], 5); |
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98 | load_LDT_desc(); |
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99 | put_cpu(); |
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100 | } |
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101 | |||
102 | /* |
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103 | * load one particular LDT into the current CPU |
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104 | */ |
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105 | static inline void load_LDT_nolock(mm_context_t *pc, int cpu) |
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106 | { |
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107 | void *segments = pc->ldt; |
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108 | int count = pc->size; |
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109 | |||
110 | if (likely(!count)) { |
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111 | segments = &default_ldt[0]; |
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112 | count = 5; |
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113 | } |
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114 | |||
115 | set_ldt_desc(cpu, segments, count); |
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116 | load_LDT_desc(); |
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117 | } |
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118 | |||
119 | static inline void load_LDT(mm_context_t *pc) |
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120 | { |
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121 | int cpu = get_cpu(); |
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122 | load_LDT_nolock(pc, cpu); |
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123 | put_cpu(); |
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124 | } |
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125 | |||
126 | #endif /* !__ASSEMBLY__ */ |
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127 | |||
128 | #endif |