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422 | giacomo | 1 | #ifndef _ASM_I386_DMA_MAPPING_H |
2 | #define _ASM_I386_DMA_MAPPING_H |
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3 | |||
4 | #include <asm/cache.h> |
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5 | |||
6 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
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7 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) |
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8 | |||
9 | void *dma_alloc_coherent(struct device *dev, size_t size, |
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10 | dma_addr_t *dma_handle, int flag); |
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11 | |||
12 | void dma_free_coherent(struct device *dev, size_t size, |
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13 | void *vaddr, dma_addr_t dma_handle); |
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14 | |||
15 | static inline dma_addr_t |
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16 | dma_map_single(struct device *dev, void *ptr, size_t size, |
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17 | enum dma_data_direction direction) |
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18 | { |
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19 | BUG_ON(direction == DMA_NONE); |
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20 | flush_write_buffers(); |
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21 | return virt_to_phys(ptr); |
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22 | } |
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23 | |||
24 | static inline void |
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25 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, |
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26 | enum dma_data_direction direction) |
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27 | { |
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28 | BUG_ON(direction == DMA_NONE); |
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29 | } |
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30 | |||
31 | static inline int |
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32 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, |
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33 | enum dma_data_direction direction) |
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34 | { |
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35 | int i; |
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36 | |||
37 | BUG_ON(direction == DMA_NONE); |
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38 | |||
39 | for (i = 0; i < nents; i++ ) { |
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40 | BUG_ON(!sg[i].page); |
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41 | |||
42 | sg[i].dma_address = page_to_phys(sg[i].page) + sg[i].offset; |
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43 | } |
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44 | |||
45 | flush_write_buffers(); |
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46 | return nents; |
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47 | } |
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48 | |||
49 | static inline dma_addr_t |
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50 | dma_map_page(struct device *dev, struct page *page, unsigned long offset, |
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51 | size_t size, enum dma_data_direction direction) |
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52 | { |
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53 | BUG_ON(direction == DMA_NONE); |
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54 | return (dma_addr_t)(page_to_pfn(page)) * PAGE_SIZE + offset; |
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55 | } |
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56 | |||
57 | static inline void |
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58 | dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, |
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59 | enum dma_data_direction direction) |
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60 | { |
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61 | BUG_ON(direction == DMA_NONE); |
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62 | } |
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63 | |||
64 | |||
65 | static inline void |
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66 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, |
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67 | enum dma_data_direction direction) |
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68 | { |
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69 | BUG_ON(direction == DMA_NONE); |
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70 | } |
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71 | |||
72 | static inline void |
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73 | dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size, |
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74 | enum dma_data_direction direction) |
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75 | { |
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76 | flush_write_buffers(); |
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77 | } |
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78 | |||
79 | static inline void |
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80 | dma_sync_single_range(struct device *dev, dma_addr_t dma_handle, |
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81 | unsigned long offset, size_t size, |
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82 | enum dma_data_direction direction) |
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83 | { |
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84 | flush_write_buffers(); |
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85 | } |
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86 | |||
87 | |||
88 | static inline void |
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89 | dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems, |
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90 | enum dma_data_direction direction) |
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91 | { |
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92 | flush_write_buffers(); |
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93 | } |
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94 | |||
95 | static inline int |
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96 | dma_supported(struct device *dev, u64 mask) |
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97 | { |
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98 | /* |
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99 | * we fall back to GFP_DMA when the mask isn't all 1s, |
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100 | * so we can't guarantee allocations that must be |
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101 | * within a tighter range than GFP_DMA.. |
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102 | */ |
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103 | if(mask < 0x00ffffff) |
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104 | return 0; |
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105 | |||
106 | return 1; |
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107 | } |
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108 | |||
109 | static inline int |
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110 | dma_set_mask(struct device *dev, u64 mask) |
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111 | { |
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112 | if(!dev->dma_mask || !dma_supported(dev, mask)) |
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113 | return -EIO; |
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114 | |||
115 | *dev->dma_mask = mask; |
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116 | |||
117 | return 0; |
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118 | } |
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119 | |||
120 | static inline int |
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121 | dma_get_cache_alignment(void) |
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122 | { |
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123 | /* no easy way to get cache size on all x86, so return the |
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124 | * maximum possible, to be safe */ |
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125 | return (1 << L1_CACHE_SHIFT_MAX); |
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126 | } |
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127 | |||
128 | #define dma_is_consistent(d) (1) |
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129 | |||
130 | static inline void |
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131 | dma_cache_sync(void *vaddr, size_t size, |
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132 | enum dma_data_direction direction) |
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133 | { |
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134 | flush_write_buffers(); |
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135 | } |
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136 | |||
137 | #endif |