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424 | giacomo | 1 | /* |
2 | * include/asm-i386/mach-default/mach_timer.h |
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3 | * |
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4 | * Machine specific calibrate_tsc() for generic. |
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5 | * Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp> |
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6 | */ |
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7 | /* ------ Calibrate the TSC ------- |
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8 | * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset(). |
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9 | * Too much 64-bit arithmetic here to do this cleanly in C, and for |
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10 | * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2) |
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11 | * output busy loop as low as possible. We avoid reading the CTC registers |
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12 | * directly because of the awkward 8-bit access mechanism of the 82C54 |
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13 | * device. |
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14 | */ |
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15 | #ifndef _MACH_TIMER_H |
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16 | #define _MACH_TIMER_H |
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17 | |||
18 | #define CALIBRATE_LATCH (5 * LATCH) |
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19 | |||
20 | static inline void mach_prepare_counter(void) |
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21 | { |
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22 | /* Set the Gate high, disable speaker */ |
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23 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); |
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24 | |||
25 | /* |
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26 | * Now let's take care of CTC channel 2 |
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27 | * |
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28 | * Set the Gate high, program CTC channel 2 for mode 0, |
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29 | * (interrupt on terminal count mode), binary count, |
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30 | * load 5 * LATCH count, (LSB and MSB) to begin countdown. |
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31 | * |
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32 | * Some devices need a delay here. |
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33 | */ |
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34 | outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */ |
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35 | outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */ |
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36 | outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */ |
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37 | } |
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38 | |||
39 | static inline void mach_countup(unsigned long *count_p) |
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40 | { |
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41 | unsigned long count = 0; |
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42 | do { |
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43 | count++; |
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44 | } while ((inb_p(0x61) & 0x20) == 0); |
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45 | *count_p = count; |
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46 | } |
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47 | |||
48 | #endif /* !_MACH_TIMER_H */ |