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424 giacomo 1
/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws
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 * which needs to alter them. */
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static inline void smpboot_clear_io_apic_irqs(void)
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{
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        io_apic_irqs = 0;
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}
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static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
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{
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        /* reset code is stored in 8255 on PC-9800. */
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        outb(0x0e, 0x37);       /* SHUT0 = 0 */
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        local_flush_tlb();
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        Dprintk("1.\n");
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        *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4;
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        Dprintk("2.\n");
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        *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf;
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        Dprintk("3.\n");
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        /*
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         * On PC-9800, continuation on warm reset is done by loading
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         * %ss:%sp from 0x0000:0404 and executing 'lret', so:
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         */
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        /* 0x3f0 is on unused interrupt vector and should be safe... */
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        *((volatile unsigned long *) phys_to_virt(0x404)) = 0x000003f0;
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        Dprintk("4.\n");
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}
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static inline void smpboot_restore_warm_reset_vector(void)
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{
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        /*
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         * Install writable page 0 entry to set BIOS data area.
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         */
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        local_flush_tlb();
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        /*
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         * Paranoid:  Set warm reset code and vector here back
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         * to default values.
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         */
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        outb(0x0f, 0x37);       /* SHUT0 = 1 */
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        *((volatile long *) phys_to_virt(0x404)) = 0;
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}
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static inline void smpboot_setup_io_apic(void)
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{
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        /*
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         * Here we can be sure that there is an IO-APIC in the system. Let's
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         * go and set it up:
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         */
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        if (!skip_ioapic_setup && nr_ioapics)
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                setup_IO_APIC();
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}