WebSVN - shark - Blame - Rev 422 - /shark/trunk/drivers/linuxc26/include/linux/ata.h

Rev	Author	Line No.	Line
422	giacomo	1
		2	/*
		3	Copyright 2003 Red Hat, Inc. All rights reserved.
		4	Copyright 2003 Jeff Garzik
		5
		6	The contents of this file are subject to the Open
		7	Software License version 1.1 that can be found at
		8	http://www.opensource.org/licenses/osl-1.1.txt and is included herein
		9	by reference.
		10
		11	Alternatively, the contents of this file may be used under the terms
		12	of the GNU General Public License version 2 (the "GPL") as distributed
		13	in the kernel source COPYING file, in which case the provisions of
		14	the GPL are applicable instead of the above. If you wish to allow
		15	the use of your version of this file only under the terms of the
		16	GPL and not to allow others to use your version of this file under
		17	the OSL, indicate your decision by deleting the provisions above and
		18	replace them with the notice and other provisions required by the GPL.
		19	If you do not delete the provisions above, a recipient may use your
		20	version of this file under either the OSL or the GPL.
		21
		22	*/
		23
		24	#ifndef __LINUX_ATA_H__
		25	#define __LINUX_ATA_H__
		26
		27	/* defines only for the constants which don't work well as enums */
		28	#define ATA_DMA_BOUNDARY 0xffffUL
		29	#define ATA_DMA_MASK 0xffffffffULL
		30
		31	enum {
		32	/* various global constants */
		33	ATA_MAX_DEVICES = 2, /* per bus/port */
		34	ATA_MAX_PRD = 256, /* we could make these 256/256 */
		35	ATA_SECT_SIZE = 512,
		36	ATA_SECT_SIZE_MASK = (ATA_SECT_SIZE - 1),
		37	ATA_SECT_DWORDS = ATA_SECT_SIZE / sizeof(u32),
		38
		39	ATA_ID_WORDS = 256,
		40	ATA_ID_PROD_OFS = 27,
		41	ATA_ID_SERNO_OFS = 10,
		42	ATA_ID_MAJOR_VER = 80,
		43	ATA_ID_PIO_MODES = 64,
		44	ATA_ID_UDMA_MODES = 88,
		45	ATA_ID_PIO4 = (1 << 1),
		46
		47	ATA_PCI_CTL_OFS = 2,
		48	ATA_SERNO_LEN = 20,
		49	ATA_UDMA0 = (1 << 0),
		50	ATA_UDMA1 = ATA_UDMA0 \| (1 << 1),
		51	ATA_UDMA2 = ATA_UDMA1 \| (1 << 2),
		52	ATA_UDMA3 = ATA_UDMA2 \| (1 << 3),
		53	ATA_UDMA4 = ATA_UDMA3 \| (1 << 4),
		54	ATA_UDMA5 = ATA_UDMA4 \| (1 << 5),
		55	ATA_UDMA6 = ATA_UDMA5 \| (1 << 6),
		56	ATA_UDMA7 = ATA_UDMA6 \| (1 << 7),
		57	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
		58
		59	ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
		60
		61	/* DMA-related */
		62	ATA_PRD_SZ = 8,
		63	ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
		64	ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
		65
		66	ATA_DMA_TABLE_OFS = 4,
		67	ATA_DMA_STATUS = 2,
		68	ATA_DMA_CMD = 0,
		69	ATA_DMA_WR = (1 << 3),
		70	ATA_DMA_START = (1 << 0),
		71	ATA_DMA_INTR = (1 << 2),
		72	ATA_DMA_ERR = (1 << 1),
		73	ATA_DMA_ACTIVE = (1 << 0),
		74
		75	/* bits in ATA command block registers */
		76	ATA_HOB = (1 << 7), /* LBA48 selector */
		77	ATA_NIEN = (1 << 1), /* disable-irq flag */
		78	ATA_LBA = (1 << 6), /* LBA28 selector */
		79	ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
		80	ATA_BUSY = (1 << 7), /* BSY status bit */
		81	ATA_DEVICE_OBS = (1 << 7) \| (1 << 5), /* obs bits in dev reg */
		82	ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
		83	ATA_DRQ = (1 << 3), /* data request i/o */
		84	ATA_ERR = (1 << 0), /* have an error */
		85	ATA_SRST = (1 << 2), /* software reset */
		86	ATA_ABORTED = (1 << 2), /* command aborted */
		87
		88	/* ATA command block registers */
		89	ATA_REG_DATA = 0x00,
		90	ATA_REG_ERR = 0x01,
		91	ATA_REG_NSECT = 0x02,
		92	ATA_REG_LBAL = 0x03,
		93	ATA_REG_LBAM = 0x04,
		94	ATA_REG_LBAH = 0x05,
		95	ATA_REG_DEVICE = 0x06,
		96	ATA_REG_STATUS = 0x07,
		97
		98	ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
		99	ATA_REG_CMD = ATA_REG_STATUS,
		100	ATA_REG_BYTEL = ATA_REG_LBAM,
		101	ATA_REG_BYTEH = ATA_REG_LBAH,
		102	ATA_REG_DEVSEL = ATA_REG_DEVICE,
		103	ATA_REG_IRQ = ATA_REG_NSECT,
		104
		105	/* ATA taskfile protocols */
		106	ATA_PROT_UNKNOWN = 0,
		107	ATA_PROT_NODATA = 1,
		108	ATA_PROT_PIO_READ = 2,
		109	ATA_PROT_PIO_WRITE = 3,
		110	ATA_PROT_DMA_READ = 4,
		111	ATA_PROT_DMA_WRITE = 5,
		112	ATA_PROT_ATAPI = 6,
		113	ATA_PROT_ATAPI_DMA = 7,
		114
		115	/* ATA device commands */
		116	ATA_CMD_EDD = 0x90, /* execute device diagnostic */
		117	ATA_CMD_ID_ATA = 0xEC,
		118	ATA_CMD_ID_ATAPI = 0xA1,
		119	ATA_CMD_READ = 0xC8,
		120	ATA_CMD_READ_EXT = 0x25,
		121	ATA_CMD_WRITE = 0xCA,
		122	ATA_CMD_WRITE_EXT = 0x35,
		123	ATA_CMD_PIO_READ = 0x20,
		124	ATA_CMD_PIO_READ_EXT = 0x24,
		125	ATA_CMD_PIO_WRITE = 0x30,
		126	ATA_CMD_PIO_WRITE_EXT = 0x34,
		127	ATA_CMD_SET_FEATURES = 0xEF,
		128	ATA_CMD_PACKET = 0xA0,
		129
		130	/* SETFEATURES stuff */
		131	SETFEATURES_XFER = 0x03,
		132	XFER_UDMA_7 = 0x47,
		133	XFER_UDMA_6 = 0x46,
		134	XFER_UDMA_5 = 0x45,
		135	XFER_UDMA_4 = 0x44,
		136	XFER_UDMA_3 = 0x43,
		137	XFER_UDMA_2 = 0x42,
		138	XFER_UDMA_1 = 0x41,
		139	XFER_UDMA_0 = 0x40,
		140	XFER_PIO_4 = 0x0C,
		141	XFER_PIO_3 = 0x0B,
		142
		143	/* ATAPI stuff */
		144	ATAPI_PKT_DMA = (1 << 0),
		145
		146	/* cable types */
		147	ATA_CBL_NONE = 0,
		148	ATA_CBL_PATA40 = 1,
		149	ATA_CBL_PATA80 = 2,
		150	ATA_CBL_PATA_UNK = 3,
		151	ATA_CBL_SATA = 4,
		152
		153	/* SATA Status and Control Registers */
		154	SCR_STATUS = 0,
		155	SCR_ERROR = 1,
		156	SCR_CONTROL = 2,
		157	SCR_ACTIVE = 3,
		158	SCR_NOTIFICATION = 4,
		159	};
		160
		161	/* core structures */
		162	struct ata_prd {
		163	u32 addr;
		164	u32 flags_len;
		165	} __attribute__((packed));
		166
		167	#define ata_id_is_ata(dev) (((dev)->id[0] & (1 << 15)) == 0)
		168	#define ata_id_has_lba48(dev) ((dev)->id[83] & (1 << 10))
		169	#define ata_id_has_lba(dev) ((dev)->id[49] & (1 << 8))
		170	#define ata_id_has_dma(dev) ((dev)->id[49] & (1 << 9))
		171	#define ata_id_u32(dev,n) \
		172	(((u32) (dev)->id[(n) + 1] << 16) \| ((u32) (dev)->id[(n)]))
		173	#define ata_id_u64(dev,n) \
		174	( ((u64) dev->id[(n) + 3] << 48) \| \
		175	((u64) dev->id[(n) + 2] << 32) \| \
		176	((u64) dev->id[(n) + 1] << 16) \| \
		177	((u64) dev->id[(n) + 0]) )
		178
		179	#endif /* __LINUX_ATA_H__ */

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