Subversion Repositories shark

Rev

Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
422 giacomo 1
/* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
2
 * Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993
3
 * derived from Data Sheet, Copyright Motorola 1984 (!).
4
 * It was written to be part of the Linux operating system.
5
 */
6
/* permission is hereby granted to copy, modify and redistribute this code
7
 * in terms of the GNU Library General Public License, Version 2 or later,
8
 * at your option.
9
 */
10
 
11
#ifndef _MC146818RTC_H
12
#define _MC146818RTC_H
13
 
14
#include <asm/io.h>
15
#include <linux/rtc.h>                  /* get the user-level API */
16
#include <linux/spinlock.h>             /* spinlock_t */
17
#include <asm/mc146818rtc.h>            /* register access macros */
18
 
19
extern spinlock_t rtc_lock;             /* serialize CMOS RAM access */
20
 
21
/**********************************************************************
22
 * register summary
23
 **********************************************************************/
24
#define RTC_SECONDS             0
25
#define RTC_SECONDS_ALARM       1
26
#define RTC_MINUTES             2
27
#define RTC_MINUTES_ALARM       3
28
#define RTC_HOURS               4
29
#define RTC_HOURS_ALARM         5
30
/* RTC_*_alarm is always true if 2 MSBs are set */
31
# define RTC_ALARM_DONT_CARE    0xC0
32
 
33
#define RTC_DAY_OF_WEEK         6
34
#define RTC_DAY_OF_MONTH        7
35
#define RTC_MONTH               8
36
#define RTC_YEAR                9
37
 
38
/* control registers - Moto names
39
 */
40
#define RTC_REG_A               10
41
#define RTC_REG_B               11
42
#define RTC_REG_C               12
43
#define RTC_REG_D               13
44
 
45
/**********************************************************************
46
 * register details
47
 **********************************************************************/
48
#define RTC_FREQ_SELECT RTC_REG_A
49
 
50
/* update-in-progress  - set to "1" 244 microsecs before RTC goes off the bus,
51
 * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
52
 * totalling to a max high interval of 2.228 ms.
53
 */
54
# define RTC_UIP                0x80
55
# define RTC_DIV_CTL            0x70
56
   /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
57
#  define RTC_REF_CLCK_4MHZ     0x00
58
#  define RTC_REF_CLCK_1MHZ     0x10
59
#  define RTC_REF_CLCK_32KHZ    0x20
60
   /* 2 values for divider stage reset, others for "testing purposes only" */
61
#  define RTC_DIV_RESET1        0x60
62
#  define RTC_DIV_RESET2        0x70
63
  /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
64
# define RTC_RATE_SELECT        0x0F
65
 
66
/**********************************************************************/
67
#define RTC_CONTROL     RTC_REG_B
68
# define RTC_SET 0x80           /* disable updates for clock setting */
69
# define RTC_PIE 0x40           /* periodic interrupt enable */
70
# define RTC_AIE 0x20           /* alarm interrupt enable */
71
# define RTC_UIE 0x10           /* update-finished interrupt enable */
72
# define RTC_SQWE 0x08          /* enable square-wave output */
73
# define RTC_DM_BINARY 0x04     /* all time/date values are BCD if clear */
74
# define RTC_24H 0x02           /* 24 hour mode - else hours bit 7 means pm */
75
# define RTC_DST_EN 0x01        /* auto switch DST - works f. USA only */
76
 
77
/**********************************************************************/
78
#define RTC_INTR_FLAGS  RTC_REG_C
79
/* caution - cleared by read */
80
# define RTC_IRQF 0x80          /* any of the following 3 is active */
81
# define RTC_PF 0x40
82
# define RTC_AF 0x20
83
# define RTC_UF 0x10
84
 
85
/**********************************************************************/
86
#define RTC_VALID       RTC_REG_D
87
# define RTC_VRT 0x80           /* valid RAM and time */
88
/**********************************************************************/
89
 
90
#endif /* _MC146818RTC_H */