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422 | giacomo | 1 | /* |
2 | * INET An implementation of the TCP/IP protocol suite for the LINUX |
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3 | * operating system. INET is implemented using the BSD Socket |
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4 | * interface as the means of communication with the user level. |
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5 | * |
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6 | * Global definitions for the Frame relay interface. |
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7 | * |
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8 | * Version: @(#)if_ifrad.h 0.20 13 Apr 96 |
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9 | * |
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10 | * Author: Mike McLagan <mike.mclagan@linux.org> |
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11 | * |
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12 | * Changes: |
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13 | * 0.15 Mike McLagan Structure packing |
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14 | * |
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15 | * 0.20 Mike McLagan New flags for S508 buffer handling |
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16 | * |
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17 | * This program is free software; you can redistribute it and/or |
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18 | * modify it under the terms of the GNU General Public License |
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19 | * as published by the Free Software Foundation; either version |
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20 | * 2 of the License, or (at your option) any later version. |
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21 | */ |
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22 | |||
23 | #ifndef SDLA_H |
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24 | #define SDLA_H |
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25 | |||
26 | /* adapter type */ |
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27 | #define SDLA_TYPES |
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28 | #define SDLA_S502A 5020 |
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29 | #define SDLA_S502E 5021 |
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30 | #define SDLA_S503 5030 |
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31 | #define SDLA_S507 5070 |
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32 | #define SDLA_S508 5080 |
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33 | #define SDLA_S509 5090 |
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34 | #define SDLA_UNKNOWN -1 |
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35 | |||
36 | /* port selection flags for the S508 */ |
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37 | #define SDLA_S508_PORT_V35 0x00 |
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38 | #define SDLA_S508_PORT_RS232 0x02 |
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39 | |||
40 | /* Z80 CPU speeds */ |
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41 | #define SDLA_CPU_3M 0x00 |
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42 | #define SDLA_CPU_5M 0x01 |
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43 | #define SDLA_CPU_7M 0x02 |
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44 | #define SDLA_CPU_8M 0x03 |
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45 | #define SDLA_CPU_10M 0x04 |
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46 | #define SDLA_CPU_16M 0x05 |
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47 | #define SDLA_CPU_12M 0x06 |
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48 | |||
49 | /* some private IOCTLs */ |
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50 | #define SDLA_IDENTIFY (FRAD_LAST_IOCTL + 1) |
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51 | #define SDLA_CPUSPEED (FRAD_LAST_IOCTL + 2) |
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52 | #define SDLA_PROTOCOL (FRAD_LAST_IOCTL + 3) |
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53 | |||
54 | #define SDLA_CLEARMEM (FRAD_LAST_IOCTL + 4) |
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55 | #define SDLA_WRITEMEM (FRAD_LAST_IOCTL + 5) |
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56 | #define SDLA_READMEM (FRAD_LAST_IOCTL + 6) |
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57 | |||
58 | struct sdla_mem { |
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59 | int addr; |
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60 | int len; |
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61 | void *data; |
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62 | }; |
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63 | |||
64 | #define SDLA_START (FRAD_LAST_IOCTL + 7) |
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65 | #define SDLA_STOP (FRAD_LAST_IOCTL + 8) |
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66 | |||
67 | /* some offsets in the Z80's memory space */ |
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68 | #define SDLA_NMIADDR 0x0000 |
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69 | #define SDLA_CONF_ADDR 0x0010 |
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70 | #define SDLA_S502A_NMIADDR 0x0066 |
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71 | #define SDLA_CODE_BASEADDR 0x0100 |
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72 | #define SDLA_WINDOW_SIZE 0x2000 |
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73 | #define SDLA_ADDR_MASK 0x1FFF |
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74 | |||
75 | /* largest handleable block of data */ |
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76 | #define SDLA_MAX_DATA 4080 |
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77 | #define SDLA_MAX_MTU 4072 /* MAX_DATA - sizeof(fradhdr) */ |
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78 | #define SDLA_MAX_DLCI 24 |
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79 | |||
80 | /* this should be the same as frad_conf */ |
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81 | struct sdla_conf { |
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82 | short station; |
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83 | short config; |
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84 | short kbaud; |
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85 | short clocking; |
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86 | short max_frm; |
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87 | short T391; |
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88 | short T392; |
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89 | short N391; |
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90 | short N392; |
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91 | short N393; |
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92 | short CIR_fwd; |
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93 | short Bc_fwd; |
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94 | short Be_fwd; |
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95 | short CIR_bwd; |
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96 | short Bc_bwd; |
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97 | short Be_bwd; |
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98 | }; |
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99 | |||
100 | /* this should be the same as dlci_conf */ |
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101 | struct sdla_dlci_conf { |
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102 | short config; |
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103 | short CIR_fwd; |
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104 | short Bc_fwd; |
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105 | short Be_fwd; |
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106 | short CIR_bwd; |
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107 | short Bc_bwd; |
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108 | short Be_bwd; |
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109 | short Tc_fwd; |
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110 | short Tc_bwd; |
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111 | short Tf_max; |
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112 | short Tb_max; |
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113 | }; |
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114 | |||
115 | #ifndef __KERNEL__ |
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116 | |||
117 | void sdla(void *cfg_info, char *dev, struct frad_conf *conf, int quiet); |
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118 | |||
119 | #else |
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120 | |||
121 | /* important Z80 window addresses */ |
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122 | #define SDLA_CONTROL_WND 0xE000 |
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123 | |||
124 | #define SDLA_502_CMD_BUF 0xEF60 |
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125 | #define SDLA_502_RCV_BUF 0xA900 |
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126 | #define SDLA_502_TXN_AVAIL 0xFFF1 |
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127 | #define SDLA_502_RCV_AVAIL 0xFFF2 |
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128 | #define SDLA_502_EVENT_FLAGS 0xFFF3 |
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129 | #define SDLA_502_MDM_STATUS 0xFFF4 |
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130 | #define SDLA_502_IRQ_INTERFACE 0xFFFD |
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131 | #define SDLA_502_IRQ_PERMISSION 0xFFFE |
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132 | #define SDLA_502_DATA_OFS 0x0010 |
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133 | |||
134 | #define SDLA_508_CMD_BUF 0xE000 |
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135 | #define SDLA_508_TXBUF_INFO 0xF100 |
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136 | #define SDLA_508_RXBUF_INFO 0xF120 |
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137 | #define SDLA_508_EVENT_FLAGS 0xF003 |
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138 | #define SDLA_508_MDM_STATUS 0xF004 |
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139 | #define SDLA_508_IRQ_INTERFACE 0xF010 |
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140 | #define SDLA_508_IRQ_PERMISSION 0xF011 |
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141 | #define SDLA_508_TSE_OFFSET 0xF012 |
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142 | |||
143 | /* Event flags */ |
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144 | #define SDLA_EVENT_STATUS 0x01 |
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145 | #define SDLA_EVENT_DLCI_STATUS 0x02 |
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146 | #define SDLA_EVENT_BAD_DLCI 0x04 |
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147 | #define SDLA_EVENT_LINK_DOWN 0x40 |
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148 | |||
149 | /* IRQ Trigger flags */ |
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150 | #define SDLA_INTR_RX 0x01 |
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151 | #define SDLA_INTR_TX 0x02 |
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152 | #define SDLA_INTR_MODEM 0x04 |
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153 | #define SDLA_INTR_COMPLETE 0x08 |
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154 | #define SDLA_INTR_STATUS 0x10 |
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155 | #define SDLA_INTR_TIMER 0x20 |
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156 | |||
157 | /* DLCI status bits */ |
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158 | #define SDLA_DLCI_DELETED 0x01 |
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159 | #define SDLA_DLCI_ACTIVE 0x02 |
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160 | #define SDLA_DLCI_WAITING 0x04 |
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161 | #define SDLA_DLCI_NEW 0x08 |
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162 | #define SDLA_DLCI_INCLUDED 0x40 |
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163 | |||
164 | /* valid command codes */ |
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165 | #define SDLA_INFORMATION_WRITE 0x01 |
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166 | #define SDLA_INFORMATION_READ 0x02 |
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167 | #define SDLA_ISSUE_IN_CHANNEL_SIGNAL 0x03 |
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168 | #define SDLA_SET_DLCI_CONFIGURATION 0x10 |
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169 | #define SDLA_READ_DLCI_CONFIGURATION 0x11 |
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170 | #define SDLA_DISABLE_COMMUNICATIONS 0x12 |
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171 | #define SDLA_ENABLE_COMMUNICATIONS 0x13 |
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172 | #define SDLA_READ_DLC_STATUS 0x14 |
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173 | #define SDLA_READ_DLC_STATISTICS 0x15 |
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174 | #define SDLA_FLUSH_DLC_STATISTICS 0x16 |
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175 | #define SDLA_LIST_ACTIVE_DLCI 0x17 |
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176 | #define SDLA_FLUSH_INFORMATION_BUFFERS 0x18 |
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177 | #define SDLA_ADD_DLCI 0x20 |
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178 | #define SDLA_DELETE_DLCI 0x21 |
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179 | #define SDLA_ACTIVATE_DLCI 0x22 |
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180 | #define SDLA_DEACTIVATE_DLCI 0x23 |
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181 | #define SDLA_READ_MODEM_STATUS 0x30 |
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182 | #define SDLA_SET_MODEM_STATUS 0x31 |
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183 | #define SDLA_READ_COMMS_ERR_STATS 0x32 |
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184 | #define SDLA_FLUSH_COMMS_ERR_STATS 0x33 |
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185 | #define SDLA_READ_CODE_VERSION 0x40 |
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186 | #define SDLA_SET_IRQ_TRIGGER 0x50 |
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187 | #define SDLA_GET_IRQ_TRIGGER 0x51 |
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188 | |||
189 | /* In channel signal types */ |
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190 | #define SDLA_ICS_LINK_VERIFY 0x02 |
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191 | #define SDLA_ICS_STATUS_ENQ 0x03 |
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192 | |||
193 | /* modem status flags */ |
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194 | #define SDLA_MODEM_DTR_HIGH 0x01 |
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195 | #define SDLA_MODEM_RTS_HIGH 0x02 |
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196 | #define SDLA_MODEM_DCD_HIGH 0x08 |
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197 | #define SDLA_MODEM_CTS_HIGH 0x20 |
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198 | |||
199 | /* used for RET_MODEM interpretation */ |
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200 | #define SDLA_MODEM_DCD_LOW 0x01 |
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201 | #define SDLA_MODEM_CTS_LOW 0x02 |
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202 | |||
203 | /* return codes */ |
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204 | #define SDLA_RET_OK 0x00 |
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205 | #define SDLA_RET_COMMUNICATIONS 0x01 |
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206 | #define SDLA_RET_CHANNEL_INACTIVE 0x02 |
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207 | #define SDLA_RET_DLCI_INACTIVE 0x03 |
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208 | #define SDLA_RET_DLCI_CONFIG 0x04 |
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209 | #define SDLA_RET_BUF_TOO_BIG 0x05 |
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210 | #define SDLA_RET_NO_DATA 0x05 |
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211 | #define SDLA_RET_BUF_OVERSIZE 0x06 |
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212 | #define SDLA_RET_CIR_OVERFLOW 0x07 |
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213 | #define SDLA_RET_NO_BUFS 0x08 |
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214 | #define SDLA_RET_TIMEOUT 0x0A |
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215 | #define SDLA_RET_MODEM 0x10 |
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216 | #define SDLA_RET_CHANNEL_OFF 0x11 |
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217 | #define SDLA_RET_CHANNEL_ON 0x12 |
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218 | #define SDLA_RET_DLCI_STATUS 0x13 |
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219 | #define SDLA_RET_DLCI_UNKNOWN 0x14 |
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220 | #define SDLA_RET_COMMAND_INVALID 0x1F |
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221 | |||
222 | /* Configuration flags */ |
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223 | #define SDLA_DIRECT_RECV 0x0080 |
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224 | #define SDLA_TX_NO_EXCEPT 0x0020 |
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225 | #define SDLA_NO_ICF_MSGS 0x1000 |
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226 | #define SDLA_TX50_RX50 0x0000 |
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227 | #define SDLA_TX70_RX30 0x2000 |
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228 | #define SDLA_TX30_RX70 0x4000 |
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229 | |||
230 | /* IRQ selection flags */ |
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231 | #define SDLA_IRQ_RECEIVE 0x01 |
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232 | #define SDLA_IRQ_TRANSMIT 0x02 |
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233 | #define SDLA_IRQ_MODEM_STAT 0x04 |
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234 | #define SDLA_IRQ_COMMAND 0x08 |
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235 | #define SDLA_IRQ_CHANNEL 0x10 |
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236 | #define SDLA_IRQ_TIMER 0x20 |
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237 | |||
238 | /* definitions for PC memory mapping */ |
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239 | #define SDLA_8K_WINDOW 0x01 |
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240 | #define SDLA_S502_SEG_A 0x10 |
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241 | #define SDLA_S502_SEG_C 0x20 |
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242 | #define SDLA_S502_SEG_D 0x00 |
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243 | #define SDLA_S502_SEG_E 0x30 |
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244 | #define SDLA_S507_SEG_A 0x00 |
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245 | #define SDLA_S507_SEG_B 0x40 |
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246 | #define SDLA_S507_SEG_C 0x80 |
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247 | #define SDLA_S507_SEG_E 0xC0 |
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248 | #define SDLA_S508_SEG_A 0x00 |
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249 | #define SDLA_S508_SEG_C 0x10 |
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250 | #define SDLA_S508_SEG_D 0x08 |
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251 | #define SDLA_S508_SEG_E 0x18 |
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252 | |||
253 | /* SDLA adapter port constants */ |
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254 | #define SDLA_IO_EXTENTS 0x04 |
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255 | |||
256 | #define SDLA_REG_CONTROL 0x00 |
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257 | #define SDLA_REG_PC_WINDOW 0x01 /* offset for PC window select latch */ |
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258 | #define SDLA_REG_Z80_WINDOW 0x02 /* offset for Z80 window select latch */ |
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259 | #define SDLA_REG_Z80_CONTROL 0x03 /* offset for Z80 control latch */ |
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260 | |||
261 | #define SDLA_S502_STS 0x00 /* status reg for 502, 502E, 507 */ |
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262 | #define SDLA_S508_GNRL 0x00 /* general purp. reg for 508 */ |
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263 | #define SDLA_S508_STS 0x01 /* status reg for 508 */ |
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264 | #define SDLA_S508_IDR 0x02 /* ID reg for 508 */ |
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265 | |||
266 | /* control register flags */ |
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267 | #define SDLA_S502A_START 0x00 /* start the CPU */ |
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268 | #define SDLA_S502A_INTREQ 0x02 |
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269 | #define SDLA_S502A_INTEN 0x04 |
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270 | #define SDLA_S502A_HALT 0x08 /* halt the CPU */ |
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271 | #define SDLA_S502A_NMI 0x10 /* issue an NMI to the CPU */ |
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272 | |||
273 | #define SDLA_S502E_CPUEN 0x01 |
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274 | #define SDLA_S502E_ENABLE 0x02 |
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275 | #define SDLA_S502E_INTACK 0x04 |
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276 | |||
277 | #define SDLA_S507_ENABLE 0x01 |
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278 | #define SDLA_S507_IRQ3 0x00 |
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279 | #define SDLA_S507_IRQ4 0x20 |
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280 | #define SDLA_S507_IRQ5 0x40 |
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281 | #define SDLA_S507_IRQ7 0x60 |
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282 | #define SDLA_S507_IRQ10 0x80 |
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283 | #define SDLA_S507_IRQ11 0xA0 |
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284 | #define SDLA_S507_IRQ12 0xC0 |
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285 | #define SDLA_S507_IRQ15 0xE0 |
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286 | |||
287 | #define SDLA_HALT 0x00 |
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288 | #define SDLA_CPUEN 0x02 |
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289 | #define SDLA_MEMEN 0x04 |
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290 | #define SDLA_S507_EPROMWR 0x08 |
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291 | #define SDLA_S507_EPROMCLK 0x10 |
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292 | #define SDLA_S508_INTRQ 0x08 |
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293 | #define SDLA_S508_INTEN 0x10 |
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294 | |||
295 | struct sdla_cmd { |
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296 | char opp_flag __attribute__((packed)); |
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297 | char cmd __attribute__((packed)); |
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298 | short length __attribute__((packed)); |
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299 | char retval __attribute__((packed)); |
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300 | short dlci __attribute__((packed)); |
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301 | char flags __attribute__((packed)); |
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302 | short rxlost_int __attribute__((packed)); |
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303 | long rxlost_app __attribute__((packed)); |
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304 | char reserve[2] __attribute__((packed)); |
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305 | char data[SDLA_MAX_DATA] __attribute__((packed)); /* transfer data buffer */ |
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306 | }; |
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307 | |||
308 | struct intr_info { |
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309 | char flags __attribute__((packed)); |
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310 | short txlen __attribute__((packed)); |
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311 | char irq __attribute__((packed)); |
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312 | char flags2 __attribute__((packed)); |
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313 | short timeout __attribute__((packed)); |
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314 | }; |
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315 | |||
316 | /* found in the 508's control window at RXBUF_INFO */ |
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317 | struct buf_info { |
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318 | unsigned short rse_num __attribute__((packed)); |
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319 | unsigned long rse_base __attribute__((packed)); |
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320 | unsigned long rse_next __attribute__((packed)); |
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321 | unsigned long buf_base __attribute__((packed)); |
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322 | unsigned short reserved __attribute__((packed)); |
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323 | unsigned long buf_top __attribute__((packed)); |
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324 | }; |
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325 | |||
326 | /* structure pointed to by rse_base in RXBUF_INFO struct */ |
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327 | struct buf_entry { |
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328 | char opp_flag __attribute__((packed)); |
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329 | short length __attribute__((packed)); |
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330 | short dlci __attribute__((packed)); |
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331 | char flags __attribute__((packed)); |
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332 | short timestamp __attribute__((packed)); |
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333 | short reserved[2] __attribute__((packed)); |
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334 | long buf_addr __attribute__((packed)); |
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335 | }; |
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336 | |||
337 | #endif |
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338 | |||
339 | #endif |