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467 giacomo 1
/*
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 * linux/include/video/neo_reg.h -- NeoMagic Framebuffer Driver
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 *
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 * Copyright (c) 2001  Denis Oliver Kropp <dok@convergence.de>
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 *
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 * This file is subject to the terms and conditions of the GNU General
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 * Public License.  See the file COPYING in the main directory of this
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 * archive for more details.
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 */
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#define NEO_BS0_BLT_BUSY        0x00000001
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#define NEO_BS0_FIFO_AVAIL      0x00000002
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#define NEO_BS0_FIFO_PEND       0x00000004
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#define NEO_BC0_DST_Y_DEC       0x00000001
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#define NEO_BC0_X_DEC           0x00000002
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#define NEO_BC0_SRC_TRANS       0x00000004
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#define NEO_BC0_SRC_IS_FG       0x00000008
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#define NEO_BC0_SRC_Y_DEC       0x00000010
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#define NEO_BC0_FILL_PAT        0x00000020
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#define NEO_BC0_SRC_MONO        0x00000040
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#define NEO_BC0_SYS_TO_VID      0x00000080
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#define NEO_BC1_DEPTH8          0x00000100
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#define NEO_BC1_DEPTH16         0x00000200
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#define NEO_BC1_X_320           0x00000400
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#define NEO_BC1_X_640           0x00000800
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#define NEO_BC1_X_800           0x00000c00
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#define NEO_BC1_X_1024          0x00001000
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#define NEO_BC1_X_1152          0x00001400
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#define NEO_BC1_X_1280          0x00001800
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#define NEO_BC1_X_1600          0x00001c00
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#define NEO_BC1_DST_TRANS       0x00002000
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#define NEO_BC1_MSTR_BLT        0x00004000
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#define NEO_BC1_FILTER_Z        0x00008000
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#define NEO_BC2_WR_TR_DST       0x00800000
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#define NEO_BC3_SRC_XY_ADDR     0x01000000
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#define NEO_BC3_DST_XY_ADDR     0x02000000
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#define NEO_BC3_CLIP_ON         0x04000000
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#define NEO_BC3_FIFO_EN         0x08000000
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#define NEO_BC3_BLT_ON_ADDR     0x10000000
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#define NEO_BC3_SKIP_MAPPING    0x80000000
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#define NEO_MODE1_DEPTH8        0x0100
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#define NEO_MODE1_DEPTH16       0x0200
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#define NEO_MODE1_DEPTH24       0x0300
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#define NEO_MODE1_X_320         0x0400
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#define NEO_MODE1_X_640         0x0800
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#define NEO_MODE1_X_800         0x0c00
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#define NEO_MODE1_X_1024        0x1000
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#define NEO_MODE1_X_1152        0x1400
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#define NEO_MODE1_X_1280        0x1800
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#define NEO_MODE1_X_1600        0x1c00
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#define NEO_MODE1_BLT_ON_ADDR   0x2000
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#ifdef __KERNEL__
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#ifdef NEOFB_DEBUG
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# define DBG(x)         printk (KERN_DEBUG "neofb: %s\n", (x));
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#else
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# define DBG(x)
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#endif
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#define PCI_CHIP_NM2070 0x0001
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#define PCI_CHIP_NM2090 0x0002
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#define PCI_CHIP_NM2093 0x0003
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#define PCI_CHIP_NM2097 0x0083
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#define PCI_CHIP_NM2160 0x0004
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#define PCI_CHIP_NM2200 0x0005
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#define PCI_CHIP_NM2230 0x0025
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#define PCI_CHIP_NM2360 0x0006
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#define PCI_CHIP_NM2380 0x0016
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struct xtimings {
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  unsigned int pixclock;
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  unsigned int HDisplay;
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  unsigned int HSyncStart;
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  unsigned int HSyncEnd;
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  unsigned int HTotal;
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  unsigned int VDisplay;
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  unsigned int VSyncStart;
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  unsigned int VSyncEnd;
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  unsigned int VTotal;
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  unsigned int sync;
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  int          dblscan;
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  int          interlaced;
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};
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/* --------------------------------------------------------------------- */
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typedef volatile struct {
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  __u32 bltStat;
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  __u32 bltCntl;
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  __u32 xpColor;
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  __u32 fgColor;
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  __u32 bgColor;
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  __u32 pitch;
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  __u32 clipLT;
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  __u32 clipRB;
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  __u32 srcBitOffset;
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  __u32 srcStart;
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  __u32 reserved0;
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  __u32 dstStart;
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  __u32 xyExt;
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  __u32 reserved1[19];
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  __u32 pageCntl;
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  __u32 pageBase;
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  __u32 postBase;
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  __u32 postPtr;
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  __u32 dataPtr;
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} Neo2200;
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#define NR_PALETTE      256
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#define MMIO_SIZE 0x200000
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#define NEO_EXT_CR_MAX 0x85
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#define NEO_EXT_GR_MAX 0xC7
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struct neofb_par {
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  unsigned char MiscOutReg;     /* Misc */
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  unsigned char CRTC[25];       /* Crtc Controller */
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  unsigned char Sequencer[5];   /* Video Sequencer */
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  unsigned char Graphics[9];    /* Video Graphics */
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  unsigned char Attribute[21];  /* Video Atribute */
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  unsigned char GeneralLockReg;
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  unsigned char ExtCRTDispAddr;
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  unsigned char ExtCRTOffset;
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  unsigned char SysIfaceCntl1;
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  unsigned char SysIfaceCntl2;
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  unsigned char ExtColorModeSelect;
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  unsigned char biosMode;
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  unsigned char PanelDispCntlReg1;
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  unsigned char PanelDispCntlReg2;
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  unsigned char PanelDispCntlReg3;
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  unsigned char PanelVertCenterReg1;
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  unsigned char PanelVertCenterReg2;
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  unsigned char PanelVertCenterReg3;
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  unsigned char PanelVertCenterReg4;
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  unsigned char PanelVertCenterReg5;
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  unsigned char PanelHorizCenterReg1;
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  unsigned char PanelHorizCenterReg2;
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  unsigned char PanelHorizCenterReg3;
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  unsigned char PanelHorizCenterReg4;
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  unsigned char PanelHorizCenterReg5;
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  int           ProgramVCLK;
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  unsigned char VCLK3NumeratorLow;
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  unsigned char VCLK3NumeratorHigh;
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  unsigned char VCLK3Denominator;
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  unsigned char VerticalExt;
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#ifdef CONFIG_MTRR
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  int    mtrr;
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#endif
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  u8    *mmio_vbase;
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  Neo2200 *neo2200;
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  /* Panels size */
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  int NeoPanelWidth;
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  int NeoPanelHeight;
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  int maxClock;
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  int pci_burst;
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  int lcd_stretch;
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  int internal_display;
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  int external_display;
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  int libretto;
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};
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typedef struct {
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    int x_res;
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    int y_res;
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    int mode;
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} biosMode;
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/* vga IO functions */
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static inline u8 VGArCR (u8 index)
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{
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  outb (index, 0x3d4);
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  return inb (0x3d5);
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}
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static inline void VGAwCR (u8 index, u8 val)
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{
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  outb (index, 0x3d4);
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  outb (val, 0x3d5);
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}
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static inline u8 VGArGR (u8 index)
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{
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  outb (index, 0x3ce);
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  return inb (0x3cf);
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}
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static inline void VGAwGR (u8 index, u8 val)
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{
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  outb (index, 0x3ce);
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  outb (val, 0x3cf);
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}
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static inline u8 VGArSEQ (u8 index)
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{
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  outb (index, 0x3c4);
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  return inb (0x3c5);
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}
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static inline void VGAwSEQ (u8 index, u8 val)
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{
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  outb (index, 0x3c4);
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  outb (val, 0x3c5);
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}
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static int paletteEnabled = 0;
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static inline void VGAenablePalette (void)
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{
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  u8 tmp;
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  tmp = inb (0x3da);
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  outb (0x00, 0x3c0);
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  paletteEnabled = 1;
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}
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static inline void VGAdisablePalette (void)
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{
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  u8 tmp;
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  tmp = inb (0x3da);
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  outb (0x20, 0x3c0);
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  paletteEnabled = 0;
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}
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static inline void VGAwATTR (u8 index, u8 value)
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{
248
  u8 tmp;
249
 
250
  if (paletteEnabled)
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    index &= ~0x20;
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  else
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    index |= 0x20;
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255
  tmp = inb (0x3da);
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  outb (index, 0x3c0);
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  outb (value, 0x3c0);
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}
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static inline void VGAwMISC (u8 value)
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{
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  outb (value, 0x3c2);
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}
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#endif
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