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Rev | Author | Line No. | Line |
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436 | giacomo | 1 | /* |
2 | * BIOS32 and PCI BIOS handling. |
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3 | */ |
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4 | |||
5 | #include <linuxcomp.h> |
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6 | |||
7 | #include <linux/pci.h> |
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8 | #include <linux/init.h> |
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9 | #include "pci2.h" |
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10 | #include "pci-functions.h" |
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11 | |||
12 | |||
13 | /* BIOS32 signature: "_32_" */ |
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14 | #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24)) |
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15 | |||
16 | /* PCI signature: "PCI " */ |
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17 | #define PCI_SIGNATURE (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24)) |
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18 | |||
19 | /* PCI service signature: "$PCI" */ |
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20 | #define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24)) |
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21 | |||
22 | /* PCI BIOS hardware mechanism flags */ |
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23 | #define PCIBIOS_HW_TYPE1 0x01 |
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24 | #define PCIBIOS_HW_TYPE2 0x02 |
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25 | #define PCIBIOS_HW_TYPE1_SPEC 0x10 |
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26 | #define PCIBIOS_HW_TYPE2_SPEC 0x20 |
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27 | |||
28 | /* |
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29 | * This is the standard structure used to identify the entry point |
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30 | * to the BIOS32 Service Directory, as documented in |
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31 | * Standard BIOS 32-bit Service Directory Proposal |
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32 | * Revision 0.4 May 24, 1993 |
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33 | * Phoenix Technologies Ltd. |
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34 | * Norwood, MA |
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35 | * and the PCI BIOS specification. |
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36 | */ |
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37 | |||
38 | union bios32 { |
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39 | struct { |
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40 | unsigned long signature; /* _32_ */ |
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41 | unsigned long entry; /* 32 bit physical address */ |
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42 | unsigned char revision; /* Revision level, 0 */ |
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43 | unsigned char length; /* Length in paragraphs should be 01 */ |
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44 | unsigned char checksum; /* All bytes must add up to zero */ |
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45 | unsigned char reserved[5]; /* Must be zero */ |
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46 | } fields; |
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47 | char chars[16]; |
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48 | }; |
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49 | |||
50 | /* |
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51 | * Physical address of the service directory. I don't know if we're |
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52 | * allowed to have more than one of these or not, so just in case |
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53 | * we'll make pcibios_present() take a memory start parameter and store |
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54 | * the array there. |
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55 | */ |
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56 | |||
57 | static struct { |
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58 | unsigned long address; |
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59 | unsigned short segment; |
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60 | } bios32_indirect = { 0, __KERNEL_CS }; |
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61 | |||
62 | /* |
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63 | * Returns the entry point for the given service, NULL on error |
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64 | */ |
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65 | |||
66 | static unsigned long bios32_service(unsigned long service) |
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67 | { |
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68 | unsigned char return_code; /* %al */ |
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69 | unsigned long address; /* %ebx */ |
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70 | unsigned long length; /* %ecx */ |
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71 | unsigned long entry; /* %edx */ |
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72 | unsigned long flags; |
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73 | |||
440 | giacomo | 74 | local_irq_save(flags); |
436 | giacomo | 75 | __asm__("lcall *(%%edi); cld" |
76 | : "=a" (return_code), |
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77 | "=b" (address), |
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78 | "=c" (length), |
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79 | "=d" (entry) |
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80 | : "0" (service), |
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438 | giacomo | 81 | "1" (PCIBIOS_PCI_BIOS_PRESENT), |
436 | giacomo | 82 | "D" (&bios32_indirect)); |
440 | giacomo | 83 | local_irq_restore(flags); |
436 | giacomo | 84 | |
440 | giacomo | 85 | printk("Breakpoint\n"); |
86 | |||
436 | giacomo | 87 | switch (return_code) { |
88 | case 0: |
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89 | return address + entry; |
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90 | case 0x80: /* Not present */ |
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91 | printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service); |
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92 | return 0; |
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93 | default: /* Shouldn't happen */ |
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94 | printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n", |
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95 | service, return_code); |
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96 | return 0; |
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97 | } |
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98 | } |
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99 | |||
100 | static struct { |
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101 | unsigned long address; |
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102 | unsigned short segment; |
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440 | giacomo | 103 | } pci_indirect = { 0, 0 /*__KERNEL_CS*/ }; |
436 | giacomo | 104 | |
105 | static int pci_bios_present; |
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106 | |||
107 | static int __devinit check_pcibios(void) |
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108 | { |
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109 | u32 signature, eax, ebx, ecx; |
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110 | u8 status, major_ver, minor_ver, hw_mech; |
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111 | unsigned long flags, pcibios_entry; |
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112 | |||
113 | if ((pcibios_entry = bios32_service(PCI_SERVICE))) { |
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114 | pci_indirect.address = pcibios_entry + PAGE_OFFSET; |
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115 | |||
116 | local_irq_save(flags); |
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117 | __asm__( |
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118 | "lcall *(%%edi); cld\n\t" |
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119 | "jc 1f\n\t" |
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120 | "xor %%ah, %%ah\n" |
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121 | "1:" |
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122 | : "=d" (signature), |
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123 | "=a" (eax), |
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124 | "=b" (ebx), |
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125 | "=c" (ecx) |
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126 | : "1" (PCIBIOS_PCI_BIOS_PRESENT), |
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127 | "D" (&pci_indirect) |
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128 | : "memory"); |
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129 | local_irq_restore(flags); |
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130 | |||
131 | status = (eax >> 8) & 0xff; |
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132 | hw_mech = eax & 0xff; |
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133 | major_ver = (ebx >> 8) & 0xff; |
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134 | minor_ver = ebx & 0xff; |
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135 | if (pcibios_last_bus < 0) |
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136 | pcibios_last_bus = ecx & 0xff; |
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137 | DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n", |
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138 | status, hw_mech, major_ver, minor_ver, pcibios_last_bus); |
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139 | if (status || signature != PCI_SIGNATURE) { |
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140 | printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n", |
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141 | status, signature); |
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142 | return 0; |
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143 | } |
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144 | printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n", |
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145 | major_ver, minor_ver, pcibios_entry, pcibios_last_bus); |
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146 | #ifdef CONFIG_PCI_DIRECT |
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147 | if (!(hw_mech & PCIBIOS_HW_TYPE1)) |
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148 | pci_probe &= ~PCI_PROBE_CONF1; |
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149 | if (!(hw_mech & PCIBIOS_HW_TYPE2)) |
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150 | pci_probe &= ~PCI_PROBE_CONF2; |
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151 | #endif |
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152 | return 1; |
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153 | } |
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154 | return 0; |
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155 | } |
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156 | |||
157 | static int __devinit pci_bios_find_device (unsigned short vendor, unsigned short device_id, |
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158 | unsigned short index, unsigned char *bus, unsigned char *device_fn) |
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159 | { |
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160 | unsigned short bx; |
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161 | unsigned short ret; |
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162 | |||
163 | __asm__("lcall *(%%edi); cld\n\t" |
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164 | "jc 1f\n\t" |
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165 | "xor %%ah, %%ah\n" |
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166 | "1:" |
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167 | : "=b" (bx), |
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168 | "=a" (ret) |
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169 | : "1" (PCIBIOS_FIND_PCI_DEVICE), |
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170 | "c" (device_id), |
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171 | "d" (vendor), |
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172 | "S" ((int) index), |
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173 | "D" (&pci_indirect)); |
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174 | *bus = (bx >> 8) & 0xff; |
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175 | *device_fn = bx & 0xff; |
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176 | return (int) (ret & 0xff00) >> 8; |
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177 | } |
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178 | |||
179 | static int pci_bios_read (int seg, int bus, int devfn, int reg, int len, u32 *value) |
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180 | { |
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181 | unsigned long result = 0; |
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182 | unsigned long flags; |
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183 | unsigned long bx = (bus << 8) | devfn; |
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184 | |||
185 | if (!value || (bus > 255) || (devfn > 255) || (reg > 255)) |
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186 | return -EINVAL; |
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187 | |||
188 | spin_lock_irqsave(&pci_config_lock, flags); |
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189 | |||
190 | switch (len) { |
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191 | case 1: |
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192 | __asm__("lcall *(%%esi); cld\n\t" |
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193 | "jc 1f\n\t" |
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194 | "xor %%ah, %%ah\n" |
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195 | "1:" |
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196 | : "=c" (*value), |
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197 | "=a" (result) |
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198 | : "1" (PCIBIOS_READ_CONFIG_BYTE), |
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199 | "b" (bx), |
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200 | "D" ((long)reg), |
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201 | "S" (&pci_indirect)); |
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202 | break; |
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203 | case 2: |
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204 | __asm__("lcall *(%%esi); cld\n\t" |
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205 | "jc 1f\n\t" |
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206 | "xor %%ah, %%ah\n" |
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207 | "1:" |
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208 | : "=c" (*value), |
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209 | "=a" (result) |
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210 | : "1" (PCIBIOS_READ_CONFIG_WORD), |
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211 | "b" (bx), |
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212 | "D" ((long)reg), |
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213 | "S" (&pci_indirect)); |
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214 | break; |
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215 | case 4: |
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216 | __asm__("lcall *(%%esi); cld\n\t" |
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217 | "jc 1f\n\t" |
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218 | "xor %%ah, %%ah\n" |
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219 | "1:" |
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220 | : "=c" (*value), |
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221 | "=a" (result) |
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222 | : "1" (PCIBIOS_READ_CONFIG_DWORD), |
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223 | "b" (bx), |
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224 | "D" ((long)reg), |
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225 | "S" (&pci_indirect)); |
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226 | break; |
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227 | } |
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228 | |||
229 | spin_unlock_irqrestore(&pci_config_lock, flags); |
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230 | |||
231 | return (int)((result & 0xff00) >> 8); |
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232 | } |
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233 | |||
234 | static int pci_bios_write (int seg, int bus, int devfn, int reg, int len, u32 value) |
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235 | { |
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236 | unsigned long result = 0; |
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237 | unsigned long flags; |
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238 | unsigned long bx = (bus << 8) | devfn; |
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239 | |||
240 | if ((bus > 255) || (devfn > 255) || (reg > 255)) |
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241 | return -EINVAL; |
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242 | |||
243 | spin_lock_irqsave(&pci_config_lock, flags); |
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244 | |||
245 | switch (len) { |
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246 | case 1: |
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247 | __asm__("lcall *(%%esi); cld\n\t" |
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248 | "jc 1f\n\t" |
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249 | "xor %%ah, %%ah\n" |
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250 | "1:" |
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251 | : "=a" (result) |
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252 | : "0" (PCIBIOS_WRITE_CONFIG_BYTE), |
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253 | "c" (value), |
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254 | "b" (bx), |
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255 | "D" ((long)reg), |
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256 | "S" (&pci_indirect)); |
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257 | break; |
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258 | case 2: |
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259 | __asm__("lcall *(%%esi); cld\n\t" |
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260 | "jc 1f\n\t" |
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261 | "xor %%ah, %%ah\n" |
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262 | "1:" |
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263 | : "=a" (result) |
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264 | : "0" (PCIBIOS_WRITE_CONFIG_WORD), |
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265 | "c" (value), |
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266 | "b" (bx), |
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267 | "D" ((long)reg), |
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268 | "S" (&pci_indirect)); |
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269 | break; |
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270 | case 4: |
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271 | __asm__("lcall *(%%esi); cld\n\t" |
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272 | "jc 1f\n\t" |
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273 | "xor %%ah, %%ah\n" |
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274 | "1:" |
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275 | : "=a" (result) |
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276 | : "0" (PCIBIOS_WRITE_CONFIG_DWORD), |
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277 | "c" (value), |
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278 | "b" (bx), |
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279 | "D" ((long)reg), |
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280 | "S" (&pci_indirect)); |
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281 | break; |
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282 | } |
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283 | |||
284 | spin_unlock_irqrestore(&pci_config_lock, flags); |
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285 | |||
286 | return (int)((result & 0xff00) >> 8); |
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287 | } |
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288 | |||
289 | |||
290 | /* |
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291 | * Function table for BIOS32 access |
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292 | */ |
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293 | |||
294 | static struct pci_raw_ops pci_bios_access = { |
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295 | .read = pci_bios_read, |
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296 | .write = pci_bios_write |
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297 | }; |
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298 | |||
299 | /* |
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300 | * Try to find PCI BIOS. |
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301 | */ |
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302 | |||
303 | static struct pci_raw_ops * __devinit pci_find_bios(void) |
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304 | { |
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305 | union bios32 *check; |
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306 | unsigned char sum; |
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307 | int i, length; |
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308 | |||
309 | /* |
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310 | * Follow the standard procedure for locating the BIOS32 Service |
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311 | * directory by scanning the permissible address range from |
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312 | * 0xe0000 through 0xfffff for a valid BIOS32 structure. |
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313 | */ |
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314 | |||
315 | for (check = (union bios32 *) __va(0xe0000); |
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316 | check <= (union bios32 *) __va(0xffff0); |
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317 | ++check) { |
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318 | if (check->fields.signature != BIOS32_SIGNATURE) |
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319 | continue; |
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320 | length = check->fields.length * 16; |
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321 | if (!length) |
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322 | continue; |
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323 | sum = 0; |
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324 | for (i = 0; i < length ; ++i) |
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325 | sum += check->chars[i]; |
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326 | if (sum != 0) |
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327 | continue; |
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328 | if (check->fields.revision != 0) { |
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329 | printk("PCI: unsupported BIOS32 revision %d at 0x%p\n", |
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330 | check->fields.revision, check); |
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331 | continue; |
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332 | } |
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333 | DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check); |
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334 | if (check->fields.entry >= 0x100000) { |
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335 | printk("PCI: BIOS32 entry (0x%p) in high memory, cannot use.\n", check); |
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336 | return NULL; |
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337 | } else { |
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338 | unsigned long bios32_entry = check->fields.entry; |
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339 | DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n", bios32_entry); |
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340 | bios32_indirect.address = bios32_entry + PAGE_OFFSET; |
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341 | if (check_pcibios()) |
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342 | return &pci_bios_access; |
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343 | } |
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344 | break; /* Hopefully more than one BIOS32 cannot happen... */ |
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345 | } |
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346 | |||
347 | return NULL; |
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348 | } |
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349 | |||
350 | /* |
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351 | * Sort the device list according to PCI BIOS. Nasty hack, but since some |
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352 | * fool forgot to define the `correct' device order in the PCI BIOS specs |
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353 | * and we want to be (possibly bug-to-bug ;-]) compatible with older kernels |
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354 | * which used BIOS ordering, we are bound to do this... |
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355 | */ |
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356 | |||
357 | void __devinit pcibios_sort(void) |
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358 | { |
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359 | LIST_HEAD(sorted_devices); |
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360 | struct list_head *ln; |
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361 | struct pci_dev *dev, *d; |
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362 | int idx, found; |
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363 | unsigned char bus, devfn; |
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364 | |||
365 | DBG("PCI: Sorting device list...\n"); |
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366 | while (!list_empty(&pci_devices)) { |
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367 | ln = pci_devices.next; |
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368 | dev = pci_dev_g(ln); |
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369 | idx = found = 0; |
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370 | while (pci_bios_find_device(dev->vendor, dev->device, idx, &bus, &devfn) == PCIBIOS_SUCCESSFUL) { |
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371 | idx++; |
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372 | for (ln=pci_devices.next; ln != &pci_devices; ln=ln->next) { |
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373 | d = pci_dev_g(ln); |
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374 | if (d->bus->number == bus && d->devfn == devfn) { |
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375 | list_del(&d->global_list); |
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376 | list_add_tail(&d->global_list, &sorted_devices); |
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377 | if (d == dev) |
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378 | found = 1; |
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379 | break; |
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380 | } |
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381 | } |
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382 | if (ln == &pci_devices) { |
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383 | printk(KERN_WARNING "PCI: BIOS reporting unknown device %02x:%02x\n", bus, devfn); |
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384 | /* |
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385 | * We must not continue scanning as several buggy BIOSes |
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386 | * return garbage after the last device. Grr. |
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387 | */ |
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388 | break; |
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389 | } |
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390 | } |
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391 | if (!found) { |
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392 | printk(KERN_WARNING "PCI: Device %02x:%02x not found by BIOS\n", |
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393 | dev->bus->number, dev->devfn); |
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394 | list_del(&dev->global_list); |
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395 | list_add_tail(&dev->global_list, &sorted_devices); |
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396 | } |
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397 | } |
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398 | list_splice(&sorted_devices, &pci_devices); |
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399 | } |
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400 | |||
401 | /* |
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402 | * BIOS Functions for IRQ Routing |
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403 | */ |
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404 | |||
405 | struct irq_routing_options { |
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406 | u16 size; |
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407 | struct irq_info *table; |
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408 | u16 segment; |
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409 | } __attribute__((packed)); |
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410 | |||
411 | struct irq_routing_table * __devinit pcibios_get_irq_routing_table(void) |
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412 | { |
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413 | struct irq_routing_options opt; |
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414 | struct irq_routing_table *rt = NULL; |
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415 | int ret, map; |
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416 | unsigned long page; |
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417 | |||
418 | if (!pci_bios_present) |
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419 | return NULL; |
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439 | giacomo | 420 | page = (long)kmalloc(PAGE_SIZE,GFP_KERNEL); |
436 | giacomo | 421 | if (!page) |
422 | return NULL; |
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423 | opt.table = (struct irq_info *) page; |
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424 | opt.size = PAGE_SIZE; |
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425 | opt.segment = __KERNEL_DS; |
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426 | |||
427 | DBG("PCI: Fetching IRQ routing table... "); |
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428 | __asm__("push %%es\n\t" |
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429 | "push %%ds\n\t" |
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430 | "pop %%es\n\t" |
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431 | "lcall *(%%esi); cld\n\t" |
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432 | "pop %%es\n\t" |
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433 | "jc 1f\n\t" |
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434 | "xor %%ah, %%ah\n" |
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435 | "1:" |
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436 | : "=a" (ret), |
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437 | "=b" (map), |
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438 | "+m" (opt) |
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439 | : "0" (PCIBIOS_GET_ROUTING_OPTIONS), |
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440 | "1" (0), |
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441 | "D" ((long) &opt), |
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442 | "S" (&pci_indirect)); |
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443 | DBG("OK ret=%d, size=%d, map=%x\n", ret, opt.size, map); |
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444 | if (ret & 0xff00) |
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445 | printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff); |
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446 | else if (opt.size) { |
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447 | rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL); |
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448 | if (rt) { |
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449 | memset(rt, 0, sizeof(struct irq_routing_table)); |
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450 | rt->size = opt.size + sizeof(struct irq_routing_table); |
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451 | rt->exclusive_irqs = map; |
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452 | memcpy(rt->slots, (void *) page, opt.size); |
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453 | printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n"); |
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454 | } |
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455 | } |
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439 | giacomo | 456 | kfree((void *)page); |
436 | giacomo | 457 | return rt; |
458 | } |
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459 | |||
460 | |||
461 | int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq) |
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462 | { |
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463 | int ret; |
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464 | |||
465 | __asm__("lcall *(%%esi); cld\n\t" |
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466 | "jc 1f\n\t" |
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467 | "xor %%ah, %%ah\n" |
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468 | "1:" |
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469 | : "=a" (ret) |
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470 | : "0" (PCIBIOS_SET_PCI_HW_INT), |
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471 | "b" ((dev->bus->number << 8) | dev->devfn), |
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472 | "c" ((irq << 8) | (pin + 10)), |
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473 | "S" (&pci_indirect)); |
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474 | return !(ret & 0xff00); |
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475 | } |
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476 | |||
438 | giacomo | 477 | int __init pci_pcbios_init(void) |
436 | giacomo | 478 | { |
479 | if ((pci_probe & PCI_PROBE_BIOS) |
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480 | && ((raw_pci_ops = pci_find_bios()))) { |
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481 | pci_probe |= PCI_BIOS_SORT; |
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482 | pci_bios_present = 1; |
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483 | } |
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484 | return 0; |
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485 | } |
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486 | |||
487 | arch_initcall(pci_pcbios_init); |