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/*****************************************************************************
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* Filename:    pci6025e.h                                                    *
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* Author:      Ziglioli Marco                                                *
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* Date:        15/03/2001                                                    *
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* Last update:                                                               *
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* Description: Header file which contains declaration of structure variables *
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*              and routines used to interface with PCI6025E                  *
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*----------------------------------------------------------------------------*
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* Notes:       Based on National C Routines                                  *
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*****************************************************************************/
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/* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it
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 *
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 * Copyright (C) 2001 Marco Ziglioli
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 *
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 */
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#ifndef _MY_PCI6025E_
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#define _MY_PCI6025E_
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#include <kernel/kern.h>
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#include <ll/i386/hw-instr.h>
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#include "regconst.h"
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#include <arch/sys/cdefs.h>
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__BEGIN_DECLS
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//#define  __REG_DEBUG__         //enable this in debug mode to see
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                                 //configuration registers value
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#define  NI_CODE                 0x1093         //NI Vendor_ID board code
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#define  Board_Address           STC_Base_Address
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#define  BAR0                    0xE8000L       //New address of MITE
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#define  BAR1                    0xEA000L       //New address of STC
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#define  INT_NO                   NIDevice_info[0].InterruptLevel
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struct pci6025e_deviceinfo {
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   WORD     DEVID;
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   BYTE     DevFunction;
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   BYTE     BusNumber;
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   DWORD    BAR0Value;
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   DWORD    IntLineRegValue;
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   DWORD    RevisionID;
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   BYTE     InterruptLevel;
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};
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extern struct pci6025e_deviceinfo NIDevice_info[10];
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extern DWORD *IntLinestructptr;
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extern DWORD *BAR0structptr;
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extern DWORD *RevID;
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extern DWORD    STC_Base_Address, MITE_Base_Address;
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#define set(b,p)        b|=(0x01 << p)    //set p-th bit of byte b to 1
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#define clr(b,p)        b&=~(0x01 << p)   //set p-th bit of byte b to 0
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//scan PCI bus to find board and remap it on memory above 1MB
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BYTE find_NI_Device(void);
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BYTE reMap(void);
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//IO Windowed access board registers
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void DAQ_STC_Windowed_Mode_Write(WORD reg_addr, WORD value);
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WORD DAQ_STC_Windowed_Mode_Read(WORD reg_addr);
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//On board clock
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BYTE  setIntClock(BYTE, BYTE, BYTE);
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//PFI programming
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void  PFIprogramming(WORD);
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//Interrupt management
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void  INT_personalize(BYTE);
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void  INT_setup(BYTE, BYTE);
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//needful macros
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#define Immediate_Readb(addr)       *((BYTE *)(Board_Address + (addr)))
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#define Immediate_Readw(addr)       *((WORD *)(Board_Address + (addr)))
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#define Immediate_Writeb(addr, val) *((BYTE *)(Board_Address + (addr)))=(val)
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#define Immediate_Writew(addr, val) *((WORD *)(Board_Address + (addr)))=(val)
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void  bitfield(BYTE dim, DWORD value);
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void  TEST_bitfield(BYTE dim, DWORD value, char *str);
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//Software copy of STC general registers
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extern WORD joint_reset, interrupt_a_enable, interrupt_a_ack,
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            interrupt_b_enable, interrupt_b_ack, clock_and_fout;
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__END_DECLS
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#endif
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/*End of File: Pci6025e.h*/