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Rev | Author | Line No. | Line |
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846 | giacomo | 1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. |
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3 | * |
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4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> |
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5 | * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> |
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6 | * |
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7 | * This file is licenced under the GPL. |
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8 | */ |
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9 | |||
10 | /*-------------------------------------------------------------------------*/ |
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11 | |||
12 | #ifdef DEBUG |
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13 | |||
14 | #define edstring(ed_type) ({ char *temp; \ |
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15 | switch (ed_type) { \ |
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16 | case PIPE_CONTROL: temp = "ctrl"; break; \ |
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17 | case PIPE_BULK: temp = "bulk"; break; \ |
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18 | case PIPE_INTERRUPT: temp = "intr"; break; \ |
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19 | default: temp = "isoc"; break; \ |
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20 | }; temp;}) |
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21 | #define pipestring(pipe) edstring(usb_pipetype(pipe)) |
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22 | |||
23 | /* debug| print the main components of an URB |
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24 | * small: 0) header + data packets 1) just header |
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25 | */ |
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26 | static void __attribute__((unused)) |
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27 | urb_print (struct urb * urb, char * str, int small) |
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28 | { |
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29 | unsigned int pipe= urb->pipe; |
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30 | |||
31 | if (!urb->dev || !urb->dev->bus) { |
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32 | dbg("%s URB: no dev", str); |
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33 | return; |
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34 | } |
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35 | |||
36 | #ifndef OHCI_VERBOSE_DEBUG |
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37 | if (urb->status != 0) |
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38 | #endif |
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39 | dbg("%s %p dev=%d ep=%d%s-%s flags=%x len=%d/%d stat=%d", |
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40 | str, |
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41 | urb, |
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42 | usb_pipedevice (pipe), |
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43 | usb_pipeendpoint (pipe), |
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44 | usb_pipeout (pipe)? "out" : "in", |
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45 | pipestring (pipe), |
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46 | urb->transfer_flags, |
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47 | urb->actual_length, |
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48 | urb->transfer_buffer_length, |
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49 | urb->status); |
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50 | |||
51 | #ifdef OHCI_VERBOSE_DEBUG |
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52 | if (!small) { |
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53 | int i, len; |
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54 | |||
55 | if (usb_pipecontrol (pipe)) { |
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56 | printk (KERN_DEBUG __FILE__ ": setup(8):"); |
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57 | for (i = 0; i < 8 ; i++) |
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58 | printk (" %02x", ((__u8 *) urb->setup_packet) [i]); |
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59 | printk ("\n"); |
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60 | } |
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61 | if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) { |
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62 | printk (KERN_DEBUG __FILE__ ": data(%d/%d):", |
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63 | urb->actual_length, |
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64 | urb->transfer_buffer_length); |
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65 | len = usb_pipeout (pipe)? |
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66 | urb->transfer_buffer_length: urb->actual_length; |
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67 | for (i = 0; i < 16 && i < len; i++) |
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68 | printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]); |
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69 | printk ("%s stat:%d\n", i < len? "...": "", urb->status); |
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70 | } |
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71 | } |
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72 | #endif |
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73 | } |
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74 | |||
75 | #define ohci_dbg_sw(ohci, next, size, format, arg...) \ |
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76 | do { \ |
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77 | if (next) { \ |
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78 | unsigned s_len; \ |
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79 | s_len = snprintf26(*next, *size, format, ## arg ); \ |
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80 | *size -= s_len; *next += s_len; \ |
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81 | } else \ |
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82 | ohci_dbg(ohci,format, ## arg ); \ |
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83 | } while (0); |
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84 | |||
85 | |||
86 | static void ohci_dump_intr_mask ( |
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87 | struct ohci_hcd *ohci, |
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88 | char *label, |
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89 | u32 mask, |
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90 | char **next, |
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91 | unsigned *size) |
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92 | { |
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93 | ohci_dbg_sw (ohci, next, size, "%s 0x%08x%s%s%s%s%s%s%s%s%s\n", |
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94 | label, |
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95 | mask, |
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96 | (mask & OHCI_INTR_MIE) ? " MIE" : "", |
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97 | (mask & OHCI_INTR_OC) ? " OC" : "", |
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98 | (mask & OHCI_INTR_RHSC) ? " RHSC" : "", |
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99 | (mask & OHCI_INTR_FNO) ? " FNO" : "", |
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100 | (mask & OHCI_INTR_UE) ? " UE" : "", |
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101 | (mask & OHCI_INTR_RD) ? " RD" : "", |
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102 | (mask & OHCI_INTR_SF) ? " SF" : "", |
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103 | (mask & OHCI_INTR_WDH) ? " WDH" : "", |
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104 | (mask & OHCI_INTR_SO) ? " SO" : "" |
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105 | ); |
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106 | } |
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107 | |||
108 | static void maybe_print_eds ( |
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109 | struct ohci_hcd *ohci, |
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110 | char *label, |
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111 | u32 value, |
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112 | char **next, |
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113 | unsigned *size) |
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114 | { |
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115 | if (value) |
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116 | ohci_dbg_sw (ohci, next, size, "%s %08x\n", label, value); |
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117 | } |
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118 | |||
119 | static char *hcfs2string (int state) |
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120 | { |
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121 | switch (state) { |
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122 | case OHCI_USB_RESET: return "reset"; |
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123 | case OHCI_USB_RESUME: return "resume"; |
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124 | case OHCI_USB_OPER: return "operational"; |
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125 | case OHCI_USB_SUSPEND: return "suspend"; |
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126 | } |
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127 | return "?"; |
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128 | } |
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129 | |||
130 | // dump control and status registers |
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131 | static void |
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132 | ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size) |
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133 | { |
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134 | struct ohci_regs *regs = controller->regs; |
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135 | u32 temp; |
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136 | |||
137 | temp = readl (®s->revision) & 0xff; |
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138 | ohci_dbg_sw (controller, next, size, |
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139 | "OHCI %d.%d, %s legacy support registers\n", |
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140 | 0x03 & (temp >> 4), (temp & 0x0f), |
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141 | (temp & 0x10) ? "with" : "NO"); |
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142 | |||
143 | temp = readl (®s->control); |
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144 | ohci_dbg_sw (controller, next, size, |
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145 | "control 0x%03x%s%s%s HCFS=%s%s%s%s%s CBSR=%d\n", |
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146 | temp, |
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147 | (temp & OHCI_CTRL_RWE) ? " RWE" : "", |
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148 | (temp & OHCI_CTRL_RWC) ? " RWC" : "", |
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149 | (temp & OHCI_CTRL_IR) ? " IR" : "", |
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150 | hcfs2string (temp & OHCI_CTRL_HCFS), |
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151 | (temp & OHCI_CTRL_BLE) ? " BLE" : "", |
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152 | (temp & OHCI_CTRL_CLE) ? " CLE" : "", |
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153 | (temp & OHCI_CTRL_IE) ? " IE" : "", |
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154 | (temp & OHCI_CTRL_PLE) ? " PLE" : "", |
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155 | temp & OHCI_CTRL_CBSR |
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156 | ); |
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157 | |||
158 | temp = readl (®s->cmdstatus); |
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159 | ohci_dbg_sw (controller, next, size, |
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160 | "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp, |
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161 | (temp & OHCI_SOC) >> 16, |
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162 | (temp & OHCI_OCR) ? " OCR" : "", |
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163 | (temp & OHCI_BLF) ? " BLF" : "", |
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164 | (temp & OHCI_CLF) ? " CLF" : "", |
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165 | (temp & OHCI_HCR) ? " HCR" : "" |
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166 | ); |
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167 | |||
168 | ohci_dump_intr_mask (controller, "intrstatus", |
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169 | readl (®s->intrstatus), next, size); |
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170 | ohci_dump_intr_mask (controller, "intrenable", |
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171 | readl (®s->intrenable), next, size); |
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172 | // intrdisable always same as intrenable |
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173 | |||
174 | maybe_print_eds (controller, "ed_periodcurrent", |
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175 | readl (®s->ed_periodcurrent), next, size); |
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176 | |||
177 | maybe_print_eds (controller, "ed_controlhead", |
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178 | readl (®s->ed_controlhead), next, size); |
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179 | maybe_print_eds (controller, "ed_controlcurrent", |
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180 | readl (®s->ed_controlcurrent), next, size); |
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181 | |||
182 | maybe_print_eds (controller, "ed_bulkhead", |
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183 | readl (®s->ed_bulkhead), next, size); |
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184 | maybe_print_eds (controller, "ed_bulkcurrent", |
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185 | readl (®s->ed_bulkcurrent), next, size); |
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186 | |||
187 | maybe_print_eds (controller, "donehead", |
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188 | readl (®s->donehead), next, size); |
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189 | } |
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190 | |||
191 | #define dbg_port_sw(hc,num,value,next,size) \ |
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192 | ohci_dbg_sw (hc, next, size, \ |
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193 | "roothub.portstatus [%d] " \ |
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194 | "0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \ |
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195 | num, temp, \ |
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196 | (temp & RH_PS_PRSC) ? " PRSC" : "", \ |
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197 | (temp & RH_PS_OCIC) ? " OCIC" : "", \ |
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198 | (temp & RH_PS_PSSC) ? " PSSC" : "", \ |
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199 | (temp & RH_PS_PESC) ? " PESC" : "", \ |
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200 | (temp & RH_PS_CSC) ? " CSC" : "", \ |
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201 | \ |
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202 | (temp & RH_PS_LSDA) ? " LSDA" : "", \ |
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203 | (temp & RH_PS_PPS) ? " PPS" : "", \ |
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204 | (temp & RH_PS_PRS) ? " PRS" : "", \ |
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205 | (temp & RH_PS_POCI) ? " POCI" : "", \ |
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206 | (temp & RH_PS_PSS) ? " PSS" : "", \ |
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207 | \ |
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208 | (temp & RH_PS_PES) ? " PES" : "", \ |
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209 | (temp & RH_PS_CCS) ? " CCS" : "" \ |
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210 | ); |
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211 | |||
212 | |||
213 | static void |
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214 | ohci_dump_roothub ( |
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215 | struct ohci_hcd *controller, |
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216 | int verbose, |
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217 | char **next, |
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218 | unsigned *size) |
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219 | { |
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220 | u32 temp, ndp, i; |
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221 | |||
222 | temp = roothub_a (controller); |
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223 | if (temp == ~(u32)0) |
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224 | return; |
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225 | ndp = (temp & RH_A_NDP); |
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226 | |||
227 | if (verbose) { |
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228 | ohci_dbg_sw (controller, next, size, |
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229 | "roothub.a %08x POTPGT=%d%s%s%s%s%s NDP=%d\n", temp, |
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230 | ((temp & RH_A_POTPGT) >> 24) & 0xff, |
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231 | (temp & RH_A_NOCP) ? " NOCP" : "", |
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232 | (temp & RH_A_OCPM) ? " OCPM" : "", |
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233 | (temp & RH_A_DT) ? " DT" : "", |
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234 | (temp & RH_A_NPS) ? " NPS" : "", |
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235 | (temp & RH_A_PSM) ? " PSM" : "", |
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236 | ndp |
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237 | ); |
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238 | temp = roothub_b (controller); |
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239 | ohci_dbg_sw (controller, next, size, |
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240 | "roothub.b %08x PPCM=%04x DR=%04x\n", |
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241 | temp, |
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242 | (temp & RH_B_PPCM) >> 16, |
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243 | (temp & RH_B_DR) |
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244 | ); |
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245 | temp = roothub_status (controller); |
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246 | ohci_dbg_sw (controller, next, size, |
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247 | "roothub.status %08x%s%s%s%s%s%s\n", |
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248 | temp, |
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249 | (temp & RH_HS_CRWE) ? " CRWE" : "", |
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250 | (temp & RH_HS_OCIC) ? " OCIC" : "", |
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251 | (temp & RH_HS_LPSC) ? " LPSC" : "", |
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252 | (temp & RH_HS_DRWE) ? " DRWE" : "", |
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253 | (temp & RH_HS_OCI) ? " OCI" : "", |
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254 | (temp & RH_HS_LPS) ? " LPS" : "" |
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255 | ); |
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256 | } |
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257 | |||
258 | for (i = 0; i < ndp; i++) { |
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259 | temp = roothub_portstatus (controller, i); |
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260 | dbg_port_sw (controller, i, temp, next, size); |
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261 | } |
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262 | } |
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263 | |||
264 | static void ohci_dump (struct ohci_hcd *controller, int verbose) |
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265 | { |
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266 | ohci_dbg (controller, "OHCI controller state\n"); |
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267 | |||
268 | // dumps some of the state we know about |
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269 | ohci_dump_status (controller, NULL, 0); |
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270 | if (controller->hcca) |
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271 | ohci_dbg (controller, |
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272 | "hcca frame #%04x\n", controller->hcca->frame_no); |
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273 | ohci_dump_roothub (controller, 1, NULL, 0); |
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274 | } |
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275 | |||
276 | static const char data0 [] = "DATA0"; |
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277 | static const char data1 [] = "DATA1"; |
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278 | |||
279 | static void ohci_dump_td (struct ohci_hcd *ohci, char *label, struct td *td) |
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280 | { |
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281 | u32 tmp = le32_to_cpup (&td->hwINFO); |
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282 | |||
283 | ohci_dbg (ohci, "%s td %p%s; urb %p index %d; hw next td %08x", |
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284 | label, td, |
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285 | (tmp & TD_DONE) ? " (DONE)" : "", |
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286 | td->urb, td->index, |
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287 | le32_to_cpup (&td->hwNextTD)); |
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288 | if ((tmp & TD_ISO) == 0) { |
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289 | const char *toggle, *pid; |
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290 | u32 cbp, be; |
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291 | |||
292 | switch (tmp & TD_T) { |
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293 | case TD_T_DATA0: toggle = data0; break; |
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294 | case TD_T_DATA1: toggle = data1; break; |
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295 | case TD_T_TOGGLE: toggle = "(CARRY)"; break; |
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296 | default: toggle = "(?)"; break; |
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297 | } |
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298 | switch (tmp & TD_DP) { |
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299 | case TD_DP_SETUP: pid = "SETUP"; break; |
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300 | case TD_DP_IN: pid = "IN"; break; |
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301 | case TD_DP_OUT: pid = "OUT"; break; |
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302 | default: pid = "(bad pid)"; break; |
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303 | } |
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304 | ohci_dbg (ohci, " info %08x CC=%x %s DI=%d %s %s", tmp, |
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305 | TD_CC_GET(tmp), /* EC, */ toggle, |
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306 | (tmp & TD_DI) >> 21, pid, |
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307 | (tmp & TD_R) ? "R" : ""); |
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308 | cbp = le32_to_cpup (&td->hwCBP); |
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309 | be = le32_to_cpup (&td->hwBE); |
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310 | ohci_dbg (ohci, " cbp %08x be %08x (len %d)", cbp, be, |
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311 | cbp ? (be + 1 - cbp) : 0); |
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312 | } else { |
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313 | unsigned i; |
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314 | ohci_dbg (ohci, " info %08x CC=%x FC=%d DI=%d SF=%04x", tmp, |
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315 | TD_CC_GET(tmp), |
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316 | (tmp >> 24) & 0x07, |
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317 | (tmp & TD_DI) >> 21, |
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318 | tmp & 0x0000ffff); |
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319 | ohci_dbg (ohci, " bp0 %08x be %08x", |
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320 | le32_to_cpup (&td->hwCBP) & ~0x0fff, |
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321 | le32_to_cpup (&td->hwBE)); |
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322 | for (i = 0; i < MAXPSW; i++) { |
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323 | u16 psw = le16_to_cpup (&td->hwPSW [i]); |
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324 | int cc = (psw >> 12) & 0x0f; |
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325 | ohci_dbg (ohci, " psw [%d] = %2x, CC=%x %s=%d", i, |
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326 | psw, cc, |
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327 | (cc >= 0x0e) ? "OFFSET" : "SIZE", |
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328 | psw & 0x0fff); |
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329 | } |
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330 | } |
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331 | } |
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332 | |||
333 | /* caller MUST own hcd spinlock if verbose is set! */ |
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334 | static void __attribute__((unused)) |
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335 | ohci_dump_ed (struct ohci_hcd *ohci, char *label, struct ed *ed, int verbose) |
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336 | { |
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337 | u32 tmp = ed->hwINFO; |
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338 | char *type = ""; |
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339 | |||
340 | ohci_dbg (ohci, "%s, ed %p state 0x%x type %s; next ed %08x", |
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341 | label, |
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342 | ed, ed->state, edstring (ed->type), |
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343 | le32_to_cpup (&ed->hwNextED)); |
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344 | switch (tmp & (ED_IN|ED_OUT)) { |
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345 | case ED_OUT: type = "-OUT"; break; |
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346 | case ED_IN: type = "-IN"; break; |
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347 | /* else from TDs ... control */ |
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348 | } |
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349 | ohci_dbg (ohci, |
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350 | " info %08x MAX=%d%s%s%s%s EP=%d%s DEV=%d", le32_to_cpu (tmp), |
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351 | 0x03ff & (le32_to_cpu (tmp) >> 16), |
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352 | (tmp & ED_DEQUEUE) ? " DQ" : "", |
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353 | (tmp & ED_ISO) ? " ISO" : "", |
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354 | (tmp & ED_SKIP) ? " SKIP" : "", |
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355 | (tmp & ED_LOWSPEED) ? " LOW" : "", |
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356 | 0x000f & (le32_to_cpu (tmp) >> 7), |
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357 | type, |
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358 | 0x007f & le32_to_cpu (tmp)); |
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359 | ohci_dbg (ohci, " tds: head %08x %s%s tail %08x%s", |
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360 | tmp = le32_to_cpup (&ed->hwHeadP), |
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361 | (ed->hwHeadP & ED_C) ? data1 : data0, |
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362 | (ed->hwHeadP & ED_H) ? " HALT" : "", |
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363 | le32_to_cpup (&ed->hwTailP), |
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364 | verbose ? "" : " (not listing)"); |
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365 | if (verbose) { |
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366 | struct list_head *tmp; |
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367 | |||
368 | /* use ed->td_list because HC concurrently modifies |
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369 | * hwNextTD as it accumulates ed_donelist. |
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370 | */ |
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371 | list_for_each (tmp, &ed->td_list) { |
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372 | struct td *td; |
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373 | td = list_entry (tmp, struct td, td_list); |
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374 | ohci_dump_td (ohci, " ->", td); |
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375 | } |
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376 | } |
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377 | } |
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378 | |||
379 | #else |
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380 | static inline void ohci_dump (struct ohci_hcd *controller, int verbose) {} |
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381 | |||
382 | #undef OHCI_VERBOSE_DEBUG |
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383 | |||
384 | #endif /* DEBUG */ |
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385 | |||
386 | /*-------------------------------------------------------------------------*/ |
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387 | |||
388 | #ifdef STUB_DEBUG_FILES |
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389 | |||
390 | static inline void create_debug_files (struct ohci_hcd *bus) { } |
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391 | static inline void remove_debug_files (struct ohci_hcd *bus) { } |
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392 | |||
393 | #else |
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394 | |||
395 | static inline struct ohci_hcd *dev_to_ohci (struct device *dev) |
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396 | { |
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397 | struct usb_hcd *hcd = dev_get_drvdata (dev); |
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398 | |||
399 | return hcd_to_ohci (hcd); |
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400 | } |
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401 | |||
402 | static ssize_t |
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403 | show_list (struct ohci_hcd *ohci, char *buf, size_t count, struct ed *ed) |
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404 | { |
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405 | unsigned temp, size = count; |
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406 | |||
407 | if (!ed) |
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408 | return 0; |
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409 | |||
410 | /* print first --> last */ |
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411 | while (ed->ed_prev) |
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412 | ed = ed->ed_prev; |
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413 | |||
414 | /* dump a snapshot of the bulk or control schedule */ |
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415 | while (ed) { |
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416 | u32 info = ed->hwINFO; |
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417 | u32 scratch = cpu_to_le32p (&ed->hwINFO); |
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418 | struct list_head *entry; |
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419 | struct td *td; |
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420 | |||
421 | temp = snprintf26(buf, size, |
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422 | "ed/%p %cs dev%d ep%d%s max %d %08x%s%s %s", |
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423 | ed, |
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424 | (info & ED_LOWSPEED) ? 'l' : 'f', |
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425 | scratch & 0x7f, |
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426 | (scratch >> 7) & 0xf, |
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427 | (info & ED_IN) ? "in" : "out", |
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428 | 0x03ff & (scratch >> 16), |
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429 | scratch, |
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430 | (info & ED_SKIP) ? " s" : "", |
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431 | (ed->hwHeadP & ED_H) ? " H" : "", |
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432 | (ed->hwHeadP & ED_C) ? data1 : data0); |
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433 | size -= temp; |
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434 | buf += temp; |
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435 | |||
436 | list_for_each (entry, &ed->td_list) { |
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437 | u32 cbp, be; |
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438 | |||
439 | td = list_entry (entry, struct td, td_list); |
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440 | scratch = cpu_to_le32p (&td->hwINFO); |
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441 | cbp = le32_to_cpup (&td->hwCBP); |
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442 | be = le32_to_cpup (&td->hwBE); |
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443 | temp = snprintf26(buf, size, |
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444 | "\n\ttd %p %s %d cc=%x urb %p (%08x)", |
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445 | td, |
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446 | ({ char *pid; |
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447 | switch (scratch & TD_DP) { |
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448 | case TD_DP_SETUP: pid = "setup"; break; |
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449 | case TD_DP_IN: pid = "in"; break; |
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450 | case TD_DP_OUT: pid = "out"; break; |
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451 | default: pid = "(?)"; break; |
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452 | } pid;}), |
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453 | cbp ? (be + 1 - cbp) : 0, |
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454 | TD_CC_GET (scratch), td->urb, scratch); |
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455 | size -= temp; |
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456 | buf += temp; |
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457 | } |
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458 | |||
459 | temp = snprintf26(buf, size, "\n"); |
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460 | size -= temp; |
||
461 | buf += temp; |
||
462 | |||
463 | ed = ed->ed_next; |
||
464 | } |
||
465 | return count - size; |
||
466 | } |
||
467 | |||
468 | static ssize_t |
||
469 | show_async (struct class_device *class_dev, char *buf) |
||
470 | { |
||
471 | struct usb_bus *bus; |
||
472 | struct usb_hcd *hcd; |
||
473 | struct ohci_hcd *ohci; |
||
474 | size_t temp; |
||
475 | unsigned long flags; |
||
476 | |||
477 | bus = to_usb_bus(class_dev); |
||
478 | hcd = bus->hcpriv; |
||
479 | ohci = hcd_to_ohci(hcd); |
||
480 | |||
481 | /* display control and bulk lists together, for simplicity */ |
||
482 | spin_lock_irqsave (&ohci->lock, flags); |
||
483 | temp = show_list (ohci, buf, PAGE_SIZE, ohci->ed_controltail); |
||
484 | temp += show_list (ohci, buf + temp, PAGE_SIZE - temp, ohci->ed_bulktail); |
||
485 | spin_unlock_irqrestore (&ohci->lock, flags); |
||
486 | |||
487 | return temp; |
||
488 | } |
||
489 | static CLASS_DEVICE_ATTR (async, S_IRUGO, show_async, NULL); |
||
490 | |||
491 | |||
492 | #define DBG_SCHED_LIMIT 64 |
||
493 | |||
494 | static ssize_t |
||
495 | show_periodic (struct class_device *class_dev, char *buf) |
||
496 | { |
||
497 | struct usb_bus *bus; |
||
498 | struct usb_hcd *hcd; |
||
499 | struct ohci_hcd *ohci; |
||
500 | struct ed **seen, *ed; |
||
501 | unsigned long flags; |
||
502 | unsigned temp, size, seen_count; |
||
503 | char *next; |
||
504 | unsigned i; |
||
505 | |||
506 | if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, SLAB_ATOMIC))) |
||
507 | return 0; |
||
508 | seen_count = 0; |
||
509 | |||
510 | bus = to_usb_bus(class_dev); |
||
511 | hcd = bus->hcpriv; |
||
512 | ohci = hcd_to_ohci(hcd); |
||
513 | next = buf; |
||
514 | size = PAGE_SIZE; |
||
515 | |||
516 | temp = snprintf26(next, size, "size = %d\n", NUM_INTS); |
||
517 | size -= temp; |
||
518 | next += temp; |
||
519 | |||
520 | /* dump a snapshot of the periodic schedule (and load) */ |
||
521 | spin_lock_irqsave (&ohci->lock, flags); |
||
522 | for (i = 0; i < NUM_INTS; i++) { |
||
523 | if (!(ed = ohci->periodic [i])) |
||
524 | continue; |
||
525 | |||
526 | temp = snprintf26(next, size, "%2d [%3d]:", i, ohci->load [i]); |
||
527 | size -= temp; |
||
528 | next += temp; |
||
529 | |||
530 | do { |
||
531 | temp = snprintf26(next, size, " ed%d/%p", |
||
532 | ed->interval, ed); |
||
533 | size -= temp; |
||
534 | next += temp; |
||
535 | for (temp = 0; temp < seen_count; temp++) { |
||
536 | if (seen [temp] == ed) |
||
537 | break; |
||
538 | } |
||
539 | |||
540 | /* show more info the first time around */ |
||
541 | if (temp == seen_count) { |
||
542 | u32 info = ed->hwINFO; |
||
543 | u32 scratch = cpu_to_le32p (&ed->hwINFO); |
||
544 | |||
545 | temp = snprintf26(next, size, |
||
546 | " (%cs dev%d%s ep%d%s" |
||
547 | " max %d %08x%s%s)", |
||
548 | (info & ED_LOWSPEED) ? 'l' : 'f', |
||
549 | scratch & 0x7f, |
||
550 | (info & ED_ISO) ? " iso" : "", |
||
551 | (scratch >> 7) & 0xf, |
||
552 | (info & ED_IN) ? "in" : "out", |
||
553 | 0x03ff & (scratch >> 16), |
||
554 | scratch, |
||
555 | (info & ED_SKIP) ? " s" : "", |
||
556 | (ed->hwHeadP & ED_H) ? " H" : ""); |
||
557 | size -= temp; |
||
558 | next += temp; |
||
559 | |||
560 | // FIXME some TD info too |
||
561 | |||
562 | if (seen_count < DBG_SCHED_LIMIT) |
||
563 | seen [seen_count++] = ed; |
||
564 | |||
565 | ed = ed->ed_next; |
||
566 | |||
567 | } else { |
||
568 | /* we've seen it and what's after */ |
||
569 | temp = 0; |
||
570 | ed = 0; |
||
571 | } |
||
572 | |||
573 | } while (ed); |
||
574 | |||
575 | temp = snprintf26(next, size, "\n"); |
||
576 | size -= temp; |
||
577 | next += temp; |
||
578 | } |
||
579 | spin_unlock_irqrestore (&ohci->lock, flags); |
||
580 | kfree (seen); |
||
581 | |||
582 | return PAGE_SIZE - size; |
||
583 | } |
||
584 | static CLASS_DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL); |
||
585 | |||
586 | |||
587 | #undef DBG_SCHED_LIMIT |
||
588 | |||
589 | static ssize_t |
||
590 | show_registers (struct class_device *class_dev, char *buf) |
||
591 | { |
||
592 | struct usb_bus *bus; |
||
593 | struct usb_hcd *hcd; |
||
594 | struct ohci_hcd *ohci; |
||
595 | struct ohci_regs *regs; |
||
596 | unsigned long flags; |
||
597 | unsigned temp, size; |
||
598 | char *next; |
||
599 | u32 rdata; |
||
600 | |||
601 | bus = to_usb_bus(class_dev); |
||
602 | hcd = bus->hcpriv; |
||
603 | ohci = hcd_to_ohci(hcd); |
||
604 | regs = ohci->regs; |
||
605 | next = buf; |
||
606 | size = PAGE_SIZE; |
||
607 | |||
608 | spin_lock_irqsave (&ohci->lock, flags); |
||
609 | |||
610 | /* dump driver info, then registers in spec order */ |
||
611 | |||
612 | ohci_dbg_sw (ohci, &next, &size, |
||
613 | "%s version " DRIVER_VERSION "\n", hcd_name); |
||
614 | |||
615 | ohci_dump_status(ohci, &next, &size); |
||
616 | |||
617 | /* hcca */ |
||
618 | if (ohci->hcca) |
||
619 | ohci_dbg_sw (ohci, &next, &size, |
||
620 | "hcca frame 0x%04x\n", ohci->hcca->frame_no); |
||
621 | |||
622 | /* other registers mostly affect frame timings */ |
||
623 | rdata = readl (®s->fminterval); |
||
624 | temp = snprintf26(next, size, |
||
625 | "fmintvl 0x%08x %sFSMPS=0x%04x FI=0x%04x\n", |
||
626 | rdata, (rdata >> 31) ? " FIT" : "", |
||
627 | (rdata >> 16) & 0xefff, rdata & 0xffff); |
||
628 | size -= temp; |
||
629 | next += temp; |
||
630 | |||
631 | rdata = readl (®s->fmremaining); |
||
632 | temp = snprintf26(next, size, "fmremaining 0x%08x %sFR=0x%04x\n", |
||
633 | rdata, (rdata >> 31) ? " FRT" : "", |
||
634 | rdata & 0x3fff); |
||
635 | size -= temp; |
||
636 | next += temp; |
||
637 | |||
638 | rdata = readl (®s->periodicstart); |
||
639 | temp = snprintf26(next, size, "periodicstart 0x%04x\n", |
||
640 | rdata & 0x3fff); |
||
641 | size -= temp; |
||
642 | next += temp; |
||
643 | |||
644 | rdata = readl (®s->lsthresh); |
||
645 | temp = snprintf26(next, size, "lsthresh 0x%04x\n", |
||
646 | rdata & 0x3fff); |
||
647 | size -= temp; |
||
648 | next += temp; |
||
649 | |||
650 | /* roothub */ |
||
651 | ohci_dump_roothub (ohci, 1, &next, &size); |
||
652 | |||
653 | spin_unlock_irqrestore (&ohci->lock, flags); |
||
654 | |||
655 | return PAGE_SIZE - size; |
||
656 | } |
||
657 | static CLASS_DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL); |
||
658 | |||
659 | |||
660 | static inline void create_debug_files (struct ohci_hcd *bus) |
||
661 | { |
||
662 | class_device_create_file(&bus->hcd.self.class_dev, &class_device_attr_async); |
||
663 | class_device_create_file(&bus->hcd.self.class_dev, &class_device_attr_periodic); |
||
664 | class_device_create_file(&bus->hcd.self.class_dev, &class_device_attr_registers); |
||
665 | ohci_dbg (bus, "created debug files\n"); |
||
666 | } |
||
667 | |||
668 | static inline void remove_debug_files (struct ohci_hcd *bus) |
||
669 | { |
||
670 | class_device_remove_file(&bus->hcd.self.class_dev, &class_device_attr_async); |
||
671 | class_device_remove_file(&bus->hcd.self.class_dev, &class_device_attr_periodic); |
||
672 | class_device_remove_file(&bus->hcd.self.class_dev, &class_device_attr_registers); |
||
673 | } |
||
674 | |||
675 | #endif |
||
676 | |||
677 | /*-------------------------------------------------------------------------*/ |
||
678 |