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Rev | Author | Line No. | Line |
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1049 | mauro | 1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. |
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3 | * |
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4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> |
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5 | * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> |
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6 | * |
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7 | * [ Initialisation is based on Linus' ] |
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8 | * [ uhci code and gregs ohci fragments ] |
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9 | * [ (C) Copyright 1999 Linus Torvalds ] |
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10 | * [ (C) Copyright 1999 Gregory P. Smith] |
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11 | * |
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12 | * |
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13 | * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller |
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14 | * interfaces (though some non-x86 Intel chips use it). It supports |
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15 | * smarter hardware than UHCI. A download link for the spec available |
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16 | * through the http://www.usb.org website. |
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17 | * |
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18 | * History: |
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19 | * |
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20 | * 2003/02/24 show registers in sysfs (Kevin Brosius) |
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21 | * |
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22 | * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and |
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23 | * bandwidth accounting; if debugging, show schedules in driverfs |
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24 | * 2002/07/19 fixes to management of ED and schedule state. |
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25 | * 2002/06/09 SA-1111 support (Christopher Hoover) |
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26 | * 2002/06/01 remember frame when HC won't see EDs any more; use that info |
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27 | * to fix urb unlink races caused by interrupt latency assumptions; |
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28 | * minor ED field and function naming updates |
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29 | * 2002/01/18 package as a patch for 2.5.3; this should match the |
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30 | * 2.4.17 kernel modulo some bugs being fixed. |
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31 | * |
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32 | * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes |
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33 | * from post-2.4.5 patches. |
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34 | * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning |
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35 | * 2001/09/07 match PCI PM changes, errnos from Linus' tree |
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36 | * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify; |
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37 | * pbook pci quirks gone (please fix pbook pci sw!) (db) |
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38 | * |
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39 | * 2001/04/08 Identify version on module load (gb) |
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40 | * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam); |
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41 | pci_map_single (db) |
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42 | * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db) |
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43 | * 2001/03/07 hcca allocation uses pci_alloc_consistent_usb (Steve Longerbeam) |
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44 | * |
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45 | * 2000/09/26 fixed races in removing the private portion of the urb |
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46 | * 2000/09/07 disable bulk and control lists when unlinking the last |
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47 | * endpoint descriptor in order to avoid unrecoverable errors on |
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48 | * the Lucent chips. (rwc@sgi) |
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49 | * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some |
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50 | * urb unlink probs, indentation fixes |
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51 | * 2000/08/11 various oops fixes mostly affecting iso and cleanup from |
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52 | * device unplugs. |
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53 | * 2000/06/28 use PCI hotplug framework, for better power management |
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54 | * and for Cardbus support (David Brownell) |
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55 | * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling |
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56 | * when the controller loses power; handle UE; cleanup; ... |
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57 | * |
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58 | * v5.2 1999/12/07 URB 3rd preview, |
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59 | * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi) |
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60 | * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume |
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61 | * i386: HUB, Keyboard, Mouse, Printer |
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62 | * |
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63 | * v4.3 1999/10/27 multiple HCs, bulk_request |
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64 | * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes |
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65 | * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl. |
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66 | * v4.0 1999/08/18 |
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67 | * v3.0 1999/06/25 |
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68 | * v2.1 1999/05/09 code clean up |
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69 | * v2.0 1999/05/04 |
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70 | * v1.0 1999/04/27 initial release |
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71 | * |
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72 | * This file is licenced under the GPL. |
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73 | */ |
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74 | |||
75 | #include <linuxcomp.h> |
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76 | |||
77 | #include <linux/config.h> |
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78 | |||
79 | #ifdef CONFIG_USB_DEBUG |
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80 | # define DEBUG |
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81 | #else |
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82 | # undef DEBUG |
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83 | #endif |
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84 | |||
85 | #include <linux/module.h> |
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86 | #include <linux/pci.h> |
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87 | #include <linux/kernel.h> |
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88 | #include <linux/delay.h> |
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89 | #include <linux/ioport.h> |
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90 | #include <linux/sched.h> |
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91 | #include <linux/slab.h> |
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92 | #include <linux/smp_lock.h> |
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93 | #include <linux/errno.h> |
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94 | #include <linux/init.h> |
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95 | #include <linux/timer.h> |
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96 | #include <linux/list.h> |
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97 | #include <linux/interrupt.h> /* for in_interrupt () */ |
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98 | #include <linux/usb.h> |
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99 | #include "../core/hcd.h" |
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100 | |||
101 | #include <asm/io.h> |
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102 | #include <asm/irq.h> |
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103 | #include <asm/system.h> |
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104 | #include <asm/unaligned.h> |
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105 | #include <asm/byteorder.h> |
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106 | |||
107 | |||
108 | #define DRIVER_VERSION "2003 Oct 13" |
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109 | #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell" |
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110 | #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver" |
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111 | |||
112 | /*-------------------------------------------------------------------------*/ |
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113 | |||
114 | //#define OHCI_VERBOSE_DEBUG /* not always helpful */ |
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115 | |||
116 | /* For initializing controller (mask in an HCFS mode too) */ |
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117 | #define OHCI_CONTROL_INIT \ |
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118 | (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE |
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119 | |||
120 | #define OHCI_UNLINK_TIMEOUT (HZ / 10) |
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121 | |||
122 | /*-------------------------------------------------------------------------*/ |
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123 | |||
124 | static const char hcd_name [] = "ohci_hcd"; |
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125 | |||
126 | #include "ohci.h" |
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127 | |||
128 | static inline void disable (struct ohci_hcd *ohci) |
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129 | { |
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130 | ohci->hcd.state = USB_STATE_HALT; |
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131 | } |
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132 | |||
133 | #include "ohci-hub.c" |
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134 | #include "ohci-dbg.c" |
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135 | #include "ohci-mem.c" |
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136 | #include "ohci-q.c" |
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137 | |||
138 | /*-------------------------------------------------------------------------*/ |
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139 | |||
140 | /* |
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141 | * queue up an urb for anything except the root hub |
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142 | */ |
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143 | static int ohci_urb_enqueue ( |
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144 | struct usb_hcd *hcd, |
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145 | struct urb *urb, |
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146 | int mem_flags |
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147 | ) { |
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148 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
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149 | struct ed *ed; |
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150 | urb_priv_t *urb_priv; |
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151 | unsigned int pipe = urb->pipe; |
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152 | int i, size = 0; |
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153 | unsigned long flags; |
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154 | int retval = 0; |
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155 | |||
156 | #ifdef OHCI_VERBOSE_DEBUG |
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157 | urb_print (urb, "SUB", usb_pipein (pipe)); |
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158 | #endif |
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159 | |||
160 | /* every endpoint has a ed, locate and maybe (re)initialize it */ |
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161 | if (! (ed = ed_get (ohci, urb->dev, pipe, urb->interval))) |
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162 | return -ENOMEM; |
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163 | |||
164 | /* for the private part of the URB we need the number of TDs (size) */ |
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165 | switch (ed->type) { |
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166 | case PIPE_CONTROL: |
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167 | /* td_submit_urb() doesn't yet handle these */ |
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168 | if (urb->transfer_buffer_length > 4096) |
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169 | return -EMSGSIZE; |
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170 | |||
171 | /* 1 TD for setup, 1 for ACK, plus ... */ |
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172 | size = 2; |
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173 | /* FALLTHROUGH */ |
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174 | // case PIPE_INTERRUPT: |
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175 | // case PIPE_BULK: |
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176 | default: |
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177 | /* one TD for every 4096 Bytes (can be upto 8K) */ |
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178 | size += urb->transfer_buffer_length / 4096; |
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179 | /* ... and for any remaining bytes ... */ |
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180 | if ((urb->transfer_buffer_length % 4096) != 0) |
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181 | size++; |
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182 | /* ... and maybe a zero length packet to wrap it up */ |
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183 | if (size == 0) |
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184 | size++; |
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185 | else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0 |
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186 | && (urb->transfer_buffer_length |
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187 | % usb_maxpacket (urb->dev, pipe, |
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188 | usb_pipeout (pipe))) == 0) |
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189 | size++; |
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190 | break; |
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191 | case PIPE_ISOCHRONOUS: /* number of packets from URB */ |
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192 | size = urb->number_of_packets; |
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193 | break; |
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194 | } |
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195 | |||
196 | /* allocate the private part of the URB */ |
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197 | urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *), |
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198 | mem_flags); |
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199 | if (!urb_priv) |
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200 | return -ENOMEM; |
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201 | memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *)); |
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202 | |||
203 | /* fill the private part of the URB */ |
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204 | urb_priv->length = size; |
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205 | urb_priv->ed = ed; |
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206 | |||
207 | /* allocate the TDs (deferring hash chain updates) */ |
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208 | for (i = 0; i < size; i++) { |
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209 | urb_priv->td [i] = td_alloc (ohci, mem_flags); |
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210 | if (!urb_priv->td [i]) { |
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211 | urb_priv->length = i; |
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212 | urb_free_priv (ohci, urb_priv); |
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213 | return -ENOMEM; |
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214 | } |
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215 | } |
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216 | |||
217 | spin_lock_irqsave (&ohci->lock, flags); |
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218 | |||
219 | /* don't submit to a dead HC */ |
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220 | if (!HCD_IS_RUNNING(ohci->hcd.state)) { |
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221 | retval = -ENODEV; |
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222 | goto fail; |
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223 | } |
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224 | |||
225 | /* schedule the ed if needed */ |
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226 | if (ed->state == ED_IDLE) { |
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227 | retval = ed_schedule (ohci, ed); |
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228 | if (retval < 0) |
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229 | goto fail; |
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230 | if (ed->type == PIPE_ISOCHRONOUS) { |
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231 | u16 frame = le16_to_cpu (ohci->hcca->frame_no); |
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232 | |||
233 | /* delay a few frames before the first TD */ |
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234 | frame += max_t (u16, 8, ed->interval); |
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235 | frame &= ~(ed->interval - 1); |
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236 | frame |= ed->branch; |
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237 | urb->start_frame = frame; |
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238 | |||
239 | /* yes, only URB_ISO_ASAP is supported, and |
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240 | * urb->start_frame is never used as input. |
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241 | */ |
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242 | } |
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243 | } else if (ed->type == PIPE_ISOCHRONOUS) |
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244 | urb->start_frame = ed->last_iso + ed->interval; |
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245 | |||
246 | /* fill the TDs and link them to the ed; and |
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247 | * enable that part of the schedule, if needed |
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248 | * and update count of queued periodic urbs |
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249 | */ |
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250 | urb->hcpriv = urb_priv; |
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251 | td_submit_urb (ohci, urb); |
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252 | |||
253 | fail: |
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254 | if (retval) |
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255 | urb_free_priv (ohci, urb_priv); |
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256 | spin_unlock_irqrestore (&ohci->lock, flags); |
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257 | return retval; |
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258 | } |
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259 | |||
260 | /* |
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261 | * decouple the URB from the HC queues (TDs, urb_priv); it's |
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262 | * already marked using urb->status. reporting is always done |
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263 | * asynchronously, and we might be dealing with an urb that's |
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264 | * partially transferred, or an ED with other urbs being unlinked. |
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265 | */ |
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266 | static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb) |
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267 | { |
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268 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
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269 | unsigned long flags; |
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270 | |||
271 | #ifdef OHCI_VERBOSE_DEBUG |
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272 | urb_print (urb, "UNLINK", 1); |
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273 | #endif |
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274 | |||
275 | spin_lock_irqsave (&ohci->lock, flags); |
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276 | if (HCD_IS_RUNNING(ohci->hcd.state)) { |
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277 | urb_priv_t *urb_priv; |
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278 | |||
279 | /* Unless an IRQ completed the unlink while it was being |
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280 | * handed to us, flag it for unlink and giveback, and force |
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281 | * some upcoming INTR_SF to call finish_unlinks() |
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282 | */ |
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283 | urb_priv = urb->hcpriv; |
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284 | if (urb_priv) { |
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285 | if (urb_priv->ed->state == ED_OPER) |
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286 | start_urb_unlink (ohci, urb_priv->ed); |
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287 | } |
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288 | } else { |
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289 | /* |
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290 | * with HC dead, we won't respect hc queue pointers |
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291 | * any more ... just clean up every urb's memory. |
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292 | */ |
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293 | if (urb->hcpriv) { |
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294 | spin_unlock (&ohci->lock); |
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295 | finish_urb (ohci, urb, NULL); |
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296 | spin_lock (&ohci->lock); |
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297 | } |
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298 | } |
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299 | spin_unlock_irqrestore (&ohci->lock, flags); |
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300 | return 0; |
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301 | } |
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302 | |||
303 | /*-------------------------------------------------------------------------*/ |
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304 | |||
305 | /* frees config/altsetting state for endpoints, |
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306 | * including ED memory, dummy TD, and bulk/intr data toggle |
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307 | */ |
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308 | |||
309 | static void |
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310 | ohci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep) |
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311 | { |
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312 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
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313 | int epnum = ep & USB_ENDPOINT_NUMBER_MASK; |
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314 | unsigned long flags; |
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315 | struct ed *ed; |
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316 | unsigned limit = 1000; |
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317 | |||
318 | /* ASSERT: any requests/urbs are being unlinked */ |
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319 | /* ASSERT: nobody can be submitting urbs for this any more */ |
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320 | |||
321 | epnum <<= 1; |
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322 | if (epnum != 0 && !(ep & USB_DIR_IN)) |
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323 | epnum |= 1; |
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324 | |||
325 | rescan: |
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326 | spin_lock_irqsave (&ohci->lock, flags); |
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327 | ed = dev->ep [epnum]; |
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328 | if (!ed) |
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329 | goto done; |
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330 | |||
331 | if (!HCD_IS_RUNNING (ohci->hcd.state)) |
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332 | ed->state = ED_IDLE; |
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333 | switch (ed->state) { |
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334 | case ED_UNLINK: /* wait for hw to finish? */ |
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335 | /* major IRQ delivery trouble loses INTR_SF too... */ |
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336 | WARN_ON (limit-- == 0); |
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337 | spin_unlock_irqrestore (&ohci->lock, flags); |
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338 | set_current_state (TASK_UNINTERRUPTIBLE); |
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339 | schedule_timeout (1); |
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340 | goto rescan; |
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341 | case ED_IDLE: /* fully unlinked */ |
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342 | if (list_empty (&ed->td_list)) { |
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343 | td_free (ohci, ed->dummy); |
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344 | ed_free (ohci, ed); |
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345 | break; |
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346 | } |
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347 | /* else FALL THROUGH */ |
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348 | default: |
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349 | /* caller was supposed to have unlinked any requests; |
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350 | * that's not our job. can't recover; must leak ed. |
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351 | */ |
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352 | ohci_err (ohci, "leak ed %p (#%d) state %d%s\n", |
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353 | ed, epnum, ed->state, |
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354 | list_empty (&ed->td_list) ? "" : " (has tds)"); |
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355 | td_free (ohci, ed->dummy); |
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356 | break; |
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357 | } |
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358 | dev->ep [epnum] = 0; |
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359 | done: |
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360 | spin_unlock_irqrestore (&ohci->lock, flags); |
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361 | return; |
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362 | } |
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363 | |||
364 | static int ohci_get_frame (struct usb_hcd *hcd) |
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365 | { |
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366 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
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367 | |||
368 | return le16_to_cpu (ohci->hcca->frame_no); |
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369 | } |
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370 | |||
371 | /*-------------------------------------------------------------------------* |
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372 | * HC functions |
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373 | *-------------------------------------------------------------------------*/ |
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374 | |||
375 | /* reset the HC and BUS */ |
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376 | |||
377 | static int hc_reset (struct ohci_hcd *ohci) |
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378 | { |
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379 | u32 temp; |
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380 | |||
381 | /* SMM owns the HC? not for long! |
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382 | * On PA-RISC, PDC can leave IR set incorrectly; ignore it there. |
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383 | */ |
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384 | #ifndef __hppa__ |
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385 | if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { |
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386 | ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n"); |
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387 | |||
388 | /* this timeout is arbitrary. we make it long, so systems |
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389 | * depending on usb keyboards may be usable even if the |
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390 | * BIOS/SMM code seems pretty broken. |
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391 | */ |
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392 | temp = 500; /* arbitrary: five seconds */ |
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393 | |||
394 | writel (OHCI_INTR_OC, &ohci->regs->intrenable); |
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395 | writel (OHCI_OCR, &ohci->regs->cmdstatus); |
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396 | while (readl (&ohci->regs->control) & OHCI_CTRL_IR) { |
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397 | wait_ms (10); |
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398 | if (--temp == 0) { |
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399 | ohci_err (ohci, "USB HC TakeOver failed!\n"); |
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400 | return -1; |
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401 | } |
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402 | } |
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403 | } |
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404 | #endif |
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405 | |||
406 | /* Disable HC interrupts */ |
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407 | writel (OHCI_INTR_MIE, &ohci->regs->intrdisable); |
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408 | |||
409 | ohci_dbg (ohci, "reset, control = 0x%x\n", |
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410 | readl (&ohci->regs->control)); |
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411 | |||
412 | /* Reset USB (needed by some controllers); RemoteWakeupConnected |
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413 | * saved if boot firmware (BIOS/SMM/...) told us it's connected |
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414 | */ |
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415 | ohci->hc_control = readl (&ohci->regs->control); |
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416 | ohci->hc_control &= OHCI_CTRL_RWC; /* hcfs 0 = RESET */ |
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417 | writel (ohci->hc_control, &ohci->regs->control); |
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418 | // flush those pci writes |
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419 | (void) readl (&ohci->regs->control); |
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420 | wait_ms (50); |
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421 | |||
422 | /* HC Reset requires max 10 us delay */ |
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423 | writel (OHCI_HCR, &ohci->regs->cmdstatus); |
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424 | temp = 30; /* ... allow extra time */ |
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425 | while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) { |
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426 | if (--temp == 0) { |
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427 | ohci_err (ohci, "USB HC reset timed out!\n"); |
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428 | return -1; |
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429 | } |
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430 | udelay (1); |
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431 | } |
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432 | |||
433 | /* now we're in the SUSPEND state ... must go OPERATIONAL |
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434 | * within 2msec else HC enters RESUME |
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435 | * |
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436 | * ... but some hardware won't init fmInterval "by the book" |
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437 | * (SiS, OPTi ...), so reset again instead. SiS doesn't need |
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438 | * this if we write fmInterval after we're OPERATIONAL. |
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439 | */ |
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440 | writel (ohci->hc_control, &ohci->regs->control); |
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441 | // flush those pci writes |
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442 | (void) readl (&ohci->regs->control); |
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443 | |||
444 | return 0; |
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445 | } |
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446 | |||
447 | /*-------------------------------------------------------------------------*/ |
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448 | |||
449 | #define FI 0x2edf /* 12000 bits per frame (-1) */ |
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450 | #define LSTHRESH 0x628 /* lowspeed bit threshold */ |
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451 | |||
452 | /* Start an OHCI controller, set the BUS operational |
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453 | * enable interrupts |
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454 | * connect the virtual root hub |
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455 | */ |
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456 | static int hc_start (struct ohci_hcd *ohci) |
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457 | { |
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458 | u32 mask, tmp; |
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459 | struct usb_device *udev; |
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460 | struct usb_bus *bus; |
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461 | |||
462 | spin_lock_init (&ohci->lock); |
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463 | disable (ohci); |
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464 | |||
465 | /* Tell the controller where the control and bulk lists are |
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466 | * The lists are empty now. */ |
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467 | writel (0, &ohci->regs->ed_controlhead); |
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468 | writel (0, &ohci->regs->ed_bulkhead); |
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469 | |||
470 | /* a reset clears this */ |
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471 | writel ((u32) ohci->hcca_dma, &ohci->regs->hcca); |
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472 | |||
473 | /* force default fmInterval (we won't adjust it); init thresholds |
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474 | * for last FS and LS packets, reserve 90% for periodic. |
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475 | */ |
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476 | writel ((((6 * (FI - 210)) / 7) << 16) | FI, &ohci->regs->fminterval); |
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477 | writel (((9 * FI) / 10) & 0x3fff, &ohci->regs->periodicstart); |
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478 | writel (LSTHRESH, &ohci->regs->lsthresh); |
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479 | |||
480 | /* some OHCI implementations are finicky about how they init. |
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481 | * bogus values here mean not even enumeration could work. |
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482 | */ |
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483 | if ((readl (&ohci->regs->fminterval) & 0x3fff0000) == 0 |
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484 | || !readl (&ohci->regs->periodicstart)) { |
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485 | ohci_err (ohci, "init err\n"); |
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486 | return -EOVERFLOW; |
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487 | } |
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488 | |||
489 | /* start controller operations */ |
||
490 | ohci->hc_control &= OHCI_CTRL_RWC; |
||
491 | ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER; |
||
492 | writel (ohci->hc_control, &ohci->regs->control); |
||
493 | ohci->hcd.state = USB_STATE_RUNNING; |
||
494 | |||
495 | /* Choose the interrupts we care about now, others later on demand */ |
||
496 | mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH; |
||
497 | writel (mask, &ohci->regs->intrstatus); |
||
498 | writel (mask, &ohci->regs->intrenable); |
||
499 | |||
500 | /* handle root hub init quirks ... */ |
||
501 | tmp = roothub_a (ohci); |
||
502 | tmp &= ~(RH_A_PSM | RH_A_OCPM); |
||
503 | if (ohci->flags & OHCI_QUIRK_SUPERIO) { |
||
504 | /* NSC 87560 and maybe others */ |
||
505 | tmp |= RH_A_NOCP; |
||
506 | tmp &= ~(RH_A_POTPGT | RH_A_NPS); |
||
507 | } else { |
||
508 | /* hub power always on; required for AMD-756 and some |
||
509 | * Mac platforms, use this mode everywhere by default |
||
510 | */ |
||
511 | tmp |= RH_A_NPS; |
||
512 | } |
||
513 | writel (tmp, &ohci->regs->roothub.a); |
||
514 | writel (RH_HS_LPSC, &ohci->regs->roothub.status); |
||
515 | writel (0, &ohci->regs->roothub.b); |
||
516 | // flush those pci writes |
||
517 | (void) readl (&ohci->regs->control); |
||
518 | |||
519 | // POTPGT delay is bits 24-31, in 2 ms units. |
||
520 | mdelay ((roothub_a (ohci) >> 23) & 0x1fe); |
||
521 | |||
522 | /* connect the virtual root hub */ |
||
523 | bus = hcd_to_bus (&ohci->hcd); |
||
524 | bus->root_hub = udev = usb_alloc_dev (NULL, bus); |
||
525 | ohci->hcd.state = USB_STATE_RUNNING; |
||
526 | if (!udev) { |
||
527 | disable (ohci); |
||
528 | ohci->hc_control &= ~OHCI_CTRL_HCFS; |
||
529 | writel (ohci->hc_control, &ohci->regs->control); |
||
530 | return -ENOMEM; |
||
531 | } |
||
532 | |||
533 | udev->speed = USB_SPEED_FULL; |
||
534 | if (hcd_register_root (&ohci->hcd) != 0) { |
||
535 | usb_put_dev (udev); |
||
536 | bus->root_hub = NULL; |
||
537 | disable (ohci); |
||
538 | ohci->hc_control &= ~OHCI_CTRL_HCFS; |
||
539 | writel (ohci->hc_control, &ohci->regs->control); |
||
540 | return -ENODEV; |
||
541 | } |
||
542 | |||
543 | return 0; |
||
544 | } |
||
545 | |||
546 | /*-------------------------------------------------------------------------*/ |
||
547 | |||
548 | /* an interrupt happens */ |
||
549 | |||
550 | static void ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs) |
||
551 | { |
||
552 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
||
553 | struct ohci_regs *regs = ohci->regs; |
||
554 | int ints; |
||
555 | |||
556 | /* we can eliminate a (slow) readl() if _only_ WDH caused this irq */ |
||
557 | if ((ohci->hcca->done_head != 0) |
||
558 | && ! (le32_to_cpup (&ohci->hcca->done_head) & 0x01)) { |
||
559 | ints = OHCI_INTR_WDH; |
||
560 | |||
561 | /* cardbus/... hardware gone before remove() */ |
||
562 | } else if ((ints = readl (®s->intrstatus)) == ~(u32)0) { |
||
563 | disable (ohci); |
||
564 | ohci_dbg (ohci, "device removed!\n"); |
||
565 | return; |
||
566 | |||
567 | /* interrupt for some other device? */ |
||
568 | } else if ((ints &= readl (®s->intrenable)) == 0) { |
||
569 | return; |
||
570 | } |
||
571 | |||
572 | if (ints & OHCI_INTR_UE) { |
||
573 | disable (ohci); |
||
574 | ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n"); |
||
575 | // e.g. due to PCI Master/Target Abort |
||
576 | |||
577 | ohci_dump (ohci, 1); |
||
578 | hc_reset (ohci); |
||
579 | } |
||
580 | |||
581 | if (ints & OHCI_INTR_WDH) { |
||
582 | if (HCD_IS_RUNNING(hcd->state)) |
||
583 | writel (OHCI_INTR_WDH, ®s->intrdisable); |
||
584 | dl_done_list (ohci, dl_reverse_done_list (ohci), ptregs); |
||
585 | if (HCD_IS_RUNNING(hcd->state)) |
||
586 | writel (OHCI_INTR_WDH, ®s->intrenable); |
||
587 | } |
||
588 | |||
589 | /* could track INTR_SO to reduce available PCI/... bandwidth */ |
||
590 | |||
591 | /* handle any pending URB/ED unlinks, leaving INTR_SF enabled |
||
592 | * when there's still unlinking to be done (next frame). |
||
593 | */ |
||
594 | spin_lock (&ohci->lock); |
||
595 | if (ohci->ed_rm_list) |
||
596 | finish_unlinks (ohci, le16_to_cpu (ohci->hcca->frame_no), |
||
597 | ptregs); |
||
598 | if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list |
||
599 | && HCD_IS_RUNNING(ohci->hcd.state)) |
||
600 | writel (OHCI_INTR_SF, ®s->intrdisable); |
||
601 | spin_unlock (&ohci->lock); |
||
602 | |||
603 | if (HCD_IS_RUNNING(ohci->hcd.state)) { |
||
604 | writel (ints, ®s->intrstatus); |
||
605 | writel (OHCI_INTR_MIE, ®s->intrenable); |
||
606 | // flush those pci writes |
||
607 | (void) readl (&ohci->regs->control); |
||
608 | } |
||
609 | } |
||
610 | |||
611 | /*-------------------------------------------------------------------------*/ |
||
612 | |||
613 | static void ohci_stop (struct usb_hcd *hcd) |
||
614 | { |
||
615 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
||
616 | |||
617 | ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n", |
||
618 | hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), |
||
619 | ohci->hcd.state); |
||
620 | ohci_dump (ohci, 1); |
||
621 | |||
622 | if (HCD_IS_RUNNING(ohci->hcd.state)) |
||
623 | hc_reset (ohci); |
||
624 | |||
625 | remove_debug_files (ohci); |
||
626 | ohci_mem_cleanup (ohci); |
||
627 | if (ohci->hcca) { |
||
628 | pci_free_consistent (ohci->hcd.pdev, sizeof *ohci->hcca, |
||
629 | ohci->hcca, ohci->hcca_dma); |
||
630 | ohci->hcca = NULL; |
||
631 | ohci->hcca_dma = 0; |
||
632 | } |
||
633 | } |
||
634 | |||
635 | /*-------------------------------------------------------------------------*/ |
||
636 | |||
637 | // FIXME: this restart logic should be generic, |
||
638 | // and handle full hcd state cleanup |
||
639 | |||
640 | /* controller died; cleanup debris, then restart */ |
||
641 | /* must not be called from interrupt context */ |
||
642 | |||
643 | #ifdef CONFIG_PM |
||
644 | static int hc_restart (struct ohci_hcd *ohci) |
||
645 | { |
||
646 | int temp; |
||
647 | int i; |
||
648 | |||
649 | disable (ohci); |
||
650 | if (hcd_to_bus (&ohci->hcd)->root_hub) |
||
651 | usb_disconnect (&hcd_to_bus (&ohci->hcd)->root_hub); |
||
652 | |||
653 | /* empty the interrupt branches */ |
||
654 | for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0; |
||
655 | for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0; |
||
656 | |||
657 | /* no EDs to remove */ |
||
658 | ohci->ed_rm_list = NULL; |
||
659 | |||
660 | /* empty control and bulk lists */ |
||
661 | ohci->ed_controltail = NULL; |
||
662 | ohci->ed_bulktail = NULL; |
||
663 | |||
664 | if ((temp = hc_reset (ohci)) < 0 || (temp = hc_start (ohci)) < 0) { |
||
665 | ohci_err (ohci, "can't restart, %d\n", temp); |
||
666 | return temp; |
||
667 | } else |
||
668 | ohci_dbg (ohci, "restart complete\n"); |
||
669 | return 0; |
||
670 | } |
||
671 | #endif |
||
672 | |||
673 | /*-------------------------------------------------------------------------*/ |
||
674 | |||
675 | #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC |
||
676 | |||
677 | MODULE_AUTHOR (DRIVER_AUTHOR); |
||
678 | MODULE_DESCRIPTION (DRIVER_INFO); |
||
679 | MODULE_LICENSE ("GPL"); |
||
680 | |||
681 | #ifdef CONFIG_PCI |
||
682 | #include "ohci-pci.c" |
||
683 | #endif |
||
684 | |||
685 | #ifdef CONFIG_SA1111 |
||
686 | #include "ohci-sa1111.c" |
||
687 | #endif |
||
688 | |||
689 | #if !(defined(CONFIG_PCI) || defined(CONFIG_SA1111)) |
||
690 | #error "missing bus glue for ohci-hcd" |
||
691 | #endif |