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846 giacomo 1
/*
2
 * OHCI HCD (Host Controller Driver) for USB.
3
 *
4
 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5
 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6
 *
7
 * [ Initialisation is based on Linus'  ]
8
 * [ uhci code and gregs ohci fragments ]
9
 * [ (C) Copyright 1999 Linus Torvalds  ]
10
 * [ (C) Copyright 1999 Gregory P. Smith]
11
 *
12
 *
13
 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14
 * interfaces (though some non-x86 Intel chips use it).  It supports
15
 * smarter hardware than UHCI.  A download link for the spec available
16
 * through the http://www.usb.org website.
17
 *
18
 * History:
19
 *
20
 * 2003/02/24 show registers in sysfs (Kevin Brosius)
21
 *
22
 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
23
 *      bandwidth accounting; if debugging, show schedules in driverfs
24
 * 2002/07/19 fixes to management of ED and schedule state.
25
 * 2002/06/09 SA-1111 support (Christopher Hoover)
26
 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
27
 *      to fix urb unlink races caused by interrupt latency assumptions;
28
 *      minor ED field and function naming updates
29
 * 2002/01/18 package as a patch for 2.5.3; this should match the
30
 *      2.4.17 kernel modulo some bugs being fixed.
31
 *
32
 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
33
 *      from post-2.4.5 patches.
34
 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
35
 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
36
 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
37
 *      pbook pci quirks gone (please fix pbook pci sw!) (db)
38
 *
39
 * 2001/04/08 Identify version on module load (gb)
40
 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
41
        pci_map_single (db)
42
 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
43
 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
44
 *
45
 * 2000/09/26 fixed races in removing the private portion of the urb
46
 * 2000/09/07 disable bulk and control lists when unlinking the last
47
 *      endpoint descriptor in order to avoid unrecoverable errors on
48
 *      the Lucent chips. (rwc@sgi)
49
 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
50
 *      urb unlink probs, indentation fixes
51
 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
52
 *      device unplugs.
53
 * 2000/06/28 use PCI hotplug framework, for better power management
54
 *      and for Cardbus support (David Brownell)
55
 * 2000/earlier:  fixes for NEC/Lucent chips; suspend/resume handling
56
 *      when the controller loses power; handle UE; cleanup; ...
57
 *
58
 * v5.2 1999/12/07 URB 3rd preview,
59
 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
60
 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
61
 *      i386: HUB, Keyboard, Mouse, Printer
62
 *
63
 * v4.3 1999/10/27 multiple HCs, bulk_request
64
 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
65
 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
66
 * v4.0 1999/08/18
67
 * v3.0 1999/06/25
68
 * v2.1 1999/05/09  code clean up
69
 * v2.0 1999/05/04
70
 * v1.0 1999/04/27 initial release
71
 *
72
 * This file is licenced under the GPL.
73
 */
74
 
75
#include <linuxcomp.h>
76
 
77
#include <linux/config.h>
78
 
79
#ifdef CONFIG_USB_DEBUG
80
#       define DEBUG
81
#else
82
#       undef DEBUG
83
#endif
84
 
85
#include <linux/module.h>
86
#include <linux/pci.h>
87
#include <linux/kernel.h>
88
#include <linux/delay.h>
89
#include <linux/ioport.h>
90
#include <linux/sched.h>
91
#include <linux/slab.h>
92
#include <linux/smp_lock.h>
93
#include <linux/errno.h>
94
#include <linux/init.h>
95
#include <linux/timer.h>
96
#include <linux/list.h>
97
#include <linux/interrupt.h>  /* for in_interrupt () */
98
#include <linux/usb.h>
99
#include "../core/hcd.h"
100
 
101
#include <asm/io.h>
102
#include <asm/irq.h>
103
#include <asm/system.h>
104
#include <asm/unaligned.h>
105
#include <asm/byteorder.h>
106
 
107
 
108
#define DRIVER_VERSION "2003 Oct 13"
109
#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
110
#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
111
 
112
/*-------------------------------------------------------------------------*/
113
 
114
//#define OHCI_VERBOSE_DEBUG      /* not always helpful */
115
 
116
/* For initializing controller (mask in an HCFS mode too) */
117
#define OHCI_CONTROL_INIT \
118
         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
119
 
120
#define OHCI_UNLINK_TIMEOUT      (HZ / 10)
121
 
122
/*-------------------------------------------------------------------------*/
123
 
124
static const char       hcd_name [] = "ohci_hcd";
125
 
126
#include "ohci.h"
127
 
128
static inline void disable (struct ohci_hcd *ohci)
129
{
130
        ohci->hcd.state = USB_STATE_HALT;
131
}
132
 
133
#include "ohci-hub.c"
134
#include "ohci-dbg.c"
135
#include "ohci-mem.c"
136
#include "ohci-q.c"
137
 
138
/*-------------------------------------------------------------------------*/
139
 
140
/*
141
 * queue up an urb for anything except the root hub
142
 */
143
static int ohci_urb_enqueue (
144
        struct usb_hcd  *hcd,
145
        struct urb      *urb,
146
        int             mem_flags
147
) {
148
        struct ohci_hcd *ohci = hcd_to_ohci (hcd);
149
        struct ed       *ed;
150
        urb_priv_t      *urb_priv;
151
        unsigned int    pipe = urb->pipe;
152
        int             i, size = 0;
153
        unsigned long   flags;
154
        int             retval = 0;
155
 
156
#ifdef OHCI_VERBOSE_DEBUG
157
        urb_print (urb, "SUB", usb_pipein (pipe));
158
#endif
159
 
160
        /* every endpoint has a ed, locate and maybe (re)initialize it */
161
        if (! (ed = ed_get (ohci, urb->dev, pipe, urb->interval)))
162
                return -ENOMEM;
163
 
164
        /* for the private part of the URB we need the number of TDs (size) */
165
        switch (ed->type) {
166
                case PIPE_CONTROL:
167
                        /* td_submit_urb() doesn't yet handle these */
168
                        if (urb->transfer_buffer_length > 4096)
169
                                return -EMSGSIZE;
170
 
171
                        /* 1 TD for setup, 1 for ACK, plus ... */
172
                        size = 2;
173
                        /* FALLTHROUGH */
174
                // case PIPE_INTERRUPT:
175
                // case PIPE_BULK:
176
                default:
177
                        /* one TD for every 4096 Bytes (can be upto 8K) */
178
                        size += urb->transfer_buffer_length / 4096;
179
                        /* ... and for any remaining bytes ... */
180
                        if ((urb->transfer_buffer_length % 4096) != 0)
181
                                size++;
182
                        /* ... and maybe a zero length packet to wrap it up */
183
                        if (size == 0)
184
                                size++;
185
                        else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
186
                                && (urb->transfer_buffer_length
187
                                        % usb_maxpacket (urb->dev, pipe,
188
                                                usb_pipeout (pipe))) == 0)
189
                                size++;
190
                        break;
191
                case PIPE_ISOCHRONOUS: /* number of packets from URB */
192
                        size = urb->number_of_packets;
193
                        break;
194
        }
195
 
196
        /* allocate the private part of the URB */
197
        urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
198
                        mem_flags);
199
        if (!urb_priv)
200
                return -ENOMEM;
201
        memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
202
 
203
        /* fill the private part of the URB */
204
        urb_priv->length = size;
205
        urb_priv->ed = ed;     
206
 
207
        /* allocate the TDs (deferring hash chain updates) */
208
        for (i = 0; i < size; i++) {
209
                urb_priv->td [i] = td_alloc (ohci, mem_flags);
210
                if (!urb_priv->td [i]) {
211
                        urb_priv->length = i;
212
                        urb_free_priv (ohci, urb_priv);
213
                        return -ENOMEM;
214
                }
215
        }      
216
 
217
        spin_lock_irqsave (&ohci->lock, flags);
218
 
219
        /* don't submit to a dead HC */
220
        if (!HCD_IS_RUNNING(ohci->hcd.state)) {
221
                retval = -ENODEV;
222
                goto fail;
223
        }
224
 
225
        /* schedule the ed if needed */
226
        if (ed->state == ED_IDLE) {
227
                retval = ed_schedule (ohci, ed);
228
                if (retval < 0)
229
                        goto fail;
230
                if (ed->type == PIPE_ISOCHRONOUS) {
231
                        u16     frame = le16_to_cpu (ohci->hcca->frame_no);
232
 
233
                        /* delay a few frames before the first TD */
234
                        frame += max_t (u16, 8, ed->interval);
235
                        frame &= ~(ed->interval - 1);
236
                        frame |= ed->branch;
237
                        urb->start_frame = frame;
238
 
239
                        /* yes, only URB_ISO_ASAP is supported, and
240
                         * urb->start_frame is never used as input.
241
                         */
242
                }
243
        } else if (ed->type == PIPE_ISOCHRONOUS)
244
                urb->start_frame = ed->last_iso + ed->interval;
245
 
246
        /* fill the TDs and link them to the ed; and
247
         * enable that part of the schedule, if needed
248
         * and update count of queued periodic urbs
249
         */
250
        urb->hcpriv = urb_priv;
251
        td_submit_urb (ohci, urb);
252
 
253
fail:
254
        if (retval)
255
                urb_free_priv (ohci, urb_priv);
256
        spin_unlock_irqrestore (&ohci->lock, flags);
257
        return retval;
258
}
259
 
260
/*
261
 * decouple the URB from the HC queues (TDs, urb_priv); it's
262
 * already marked using urb->status.  reporting is always done
263
 * asynchronously, and we might be dealing with an urb that's
264
 * partially transferred, or an ED with other urbs being unlinked.
265
 */
266
static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
267
{
268
        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
269
        unsigned long           flags;
270
 
271
#ifdef OHCI_VERBOSE_DEBUG
272
        urb_print (urb, "UNLINK", 1);
273
#endif            
274
 
275
        spin_lock_irqsave (&ohci->lock, flags);
276
        if (HCD_IS_RUNNING(ohci->hcd.state)) {
277
                urb_priv_t  *urb_priv;
278
 
279
                /* Unless an IRQ completed the unlink while it was being
280
                 * handed to us, flag it for unlink and giveback, and force
281
                 * some upcoming INTR_SF to call finish_unlinks()
282
                 */
283
                urb_priv = urb->hcpriv;
284
                if (urb_priv) {
285
                        if (urb_priv->ed->state == ED_OPER)
286
                                start_urb_unlink (ohci, urb_priv->ed);
287
                }
288
        } else {
289
                /*
290
                 * with HC dead, we won't respect hc queue pointers
291
                 * any more ... just clean up every urb's memory.
292
                 */
293
                if (urb->hcpriv) {
294
                        spin_unlock (&ohci->lock);
295
                        finish_urb (ohci, urb, NULL);
296
                        spin_lock (&ohci->lock);
297
                }
298
        }
299
        spin_unlock_irqrestore (&ohci->lock, flags);
300
        return 0;
301
}
302
 
303
/*-------------------------------------------------------------------------*/
304
 
305
/* frees config/altsetting state for endpoints,
306
 * including ED memory, dummy TD, and bulk/intr data toggle
307
 */
308
 
309
static void
310
ohci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep)
311
{
312
        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
313
        int                     epnum = ep & USB_ENDPOINT_NUMBER_MASK;
314
        unsigned long           flags;
315
        struct ed               *ed;
316
        unsigned                limit = 1000;
317
 
318
        /* ASSERT:  any requests/urbs are being unlinked */
319
        /* ASSERT:  nobody can be submitting urbs for this any more */
320
 
321
        epnum <<= 1;
322
        if (epnum != 0 && !(ep & USB_DIR_IN))
323
                epnum |= 1;
324
 
325
rescan:
326
        spin_lock_irqsave (&ohci->lock, flags);
327
        ed = dev->ep [epnum];
328
        if (!ed)
329
                goto done;
330
 
331
        if (!HCD_IS_RUNNING (ohci->hcd.state))
332
                ed->state = ED_IDLE;
333
        switch (ed->state) {
334
        case ED_UNLINK:         /* wait for hw to finish? */
335
                /* major IRQ delivery trouble loses INTR_SF too... */
336
                WARN_ON (limit-- == 0);
337
                spin_unlock_irqrestore (&ohci->lock, flags);
338
                set_current_state (TASK_UNINTERRUPTIBLE);
339
                schedule_timeout (1);
340
                goto rescan;
341
        case ED_IDLE:           /* fully unlinked */
342
                if (list_empty (&ed->td_list)) {
343
                        td_free (ohci, ed->dummy);
344
                        ed_free (ohci, ed);
345
                        break;
346
                }
347
                /* else FALL THROUGH */
348
        default:
349
                /* caller was supposed to have unlinked any requests;
350
                 * that's not our job.  can't recover; must leak ed.
351
                 */
352
                ohci_err (ohci, "leak ed %p (#%d) state %d%s\n",
353
                        ed, epnum, ed->state,
354
                        list_empty (&ed->td_list) ? "" : " (has tds)");
355
                td_free (ohci, ed->dummy);
356
                break;
357
        }
358
        dev->ep [epnum] = 0;
359
done:
360
        spin_unlock_irqrestore (&ohci->lock, flags);
361
        return;
362
}
363
 
364
static int ohci_get_frame (struct usb_hcd *hcd)
365
{
366
        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
367
 
368
        return le16_to_cpu (ohci->hcca->frame_no);
369
}
370
 
371
/*-------------------------------------------------------------------------*
372
 * HC functions
373
 *-------------------------------------------------------------------------*/
374
 
375
/* reset the HC and BUS */
376
 
377
static int hc_reset (struct ohci_hcd *ohci)
378
{
379
        u32 temp;
380
 
381
        /* SMM owns the HC?  not for long!
382
         * On PA-RISC, PDC can leave IR set incorrectly; ignore it there.
383
         */
384
#ifndef __hppa__
385
        if (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
386
                ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
387
 
388
                /* this timeout is arbitrary.  we make it long, so systems
389
                 * depending on usb keyboards may be usable even if the
390
                 * BIOS/SMM code seems pretty broken.
391
                 */
392
                temp = 500;     /* arbitrary: five seconds */
393
 
394
                writel (OHCI_INTR_OC, &ohci->regs->intrenable);
395
                writel (OHCI_OCR, &ohci->regs->cmdstatus);
396
                while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
397
                        wait_ms (10);
398
                        if (--temp == 0) {
399
                                ohci_err (ohci, "USB HC TakeOver failed!\n");
400
                                return -1;
401
                        }
402
                }
403
        }
404
#endif
405
 
406
        /* Disable HC interrupts */
407
        writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
408
 
409
        ohci_dbg (ohci, "reset, control = 0x%x\n",
410
                readl (&ohci->regs->control));
411
 
412
        /* Reset USB (needed by some controllers); RemoteWakeupConnected
413
         * saved if boot firmware (BIOS/SMM/...) told us it's connected
414
         */
415
        ohci->hc_control = readl (&ohci->regs->control);
416
        ohci->hc_control &= OHCI_CTRL_RWC;      /* hcfs 0 = RESET */
417
        writel (ohci->hc_control, &ohci->regs->control);
418
        // flush those pci writes
419
        (void) readl (&ohci->regs->control);
420
        wait_ms (50);
421
 
422
        /* HC Reset requires max 10 us delay */
423
        writel (OHCI_HCR,  &ohci->regs->cmdstatus);
424
        temp = 30;      /* ... allow extra time */
425
        while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
426
                if (--temp == 0) {
427
                        ohci_err (ohci, "USB HC reset timed out!\n");
428
                        return -1;
429
                }
430
                udelay (1);
431
        }
432
 
433
        /* now we're in the SUSPEND state ... must go OPERATIONAL
434
         * within 2msec else HC enters RESUME
435
         *
436
         * ... but some hardware won't init fmInterval "by the book"
437
         * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
438
         * this if we write fmInterval after we're OPERATIONAL.
439
         */
440
        writel (ohci->hc_control, &ohci->regs->control);
441
        // flush those pci writes
442
        (void) readl (&ohci->regs->control);
443
 
444
        return 0;
445
}
446
 
447
/*-------------------------------------------------------------------------*/
448
 
449
#define FI              0x2edf          /* 12000 bits per frame (-1) */
450
#define LSTHRESH        0x628           /* lowspeed bit threshold */
451
 
452
/* Start an OHCI controller, set the BUS operational
453
 * enable interrupts
454
 * connect the virtual root hub
455
 */
456
static int hc_start (struct ohci_hcd *ohci)
457
{
458
        u32                     mask, tmp;
459
        struct usb_device       *udev;
460
        struct usb_bus          *bus;
461
 
462
        spin_lock_init (&ohci->lock);
463
        disable (ohci);
464
 
465
        /* Tell the controller where the control and bulk lists are
466
         * The lists are empty now. */
467
        writel (0, &ohci->regs->ed_controlhead);
468
        writel (0, &ohci->regs->ed_bulkhead);
469
 
470
        /* a reset clears this */
471
        writel ((u32) ohci->hcca_dma, &ohci->regs->hcca);
472
 
473
        /* force default fmInterval (we won't adjust it); init thresholds
474
         * for last FS and LS packets, reserve 90% for periodic.
475
         */
476
        writel ((((6 * (FI - 210)) / 7) << 16) | FI, &ohci->regs->fminterval);
477
        writel (((9 * FI) / 10) & 0x3fff, &ohci->regs->periodicstart);
478
        writel (LSTHRESH, &ohci->regs->lsthresh);
479
 
480
        /* some OHCI implementations are finicky about how they init.
481
         * bogus values here mean not even enumeration could work.
482
         */
483
        if ((readl (&ohci->regs->fminterval) & 0x3fff0000) == 0
484
                        || !readl (&ohci->regs->periodicstart)) {
485
                ohci_err (ohci, "init err\n");
486
                return -EOVERFLOW;
487
        }
488
 
489
        /* start controller operations */
490
        ohci->hc_control &= OHCI_CTRL_RWC;
491
        ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
492
        writel (ohci->hc_control, &ohci->regs->control);
493
        ohci->hcd.state = USB_STATE_RUNNING;
494
 
495
        /* Choose the interrupts we care about now, others later on demand */
496
        mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH;
497
        writel (mask, &ohci->regs->intrstatus);
498
        writel (mask, &ohci->regs->intrenable);
499
 
500
        /* handle root hub init quirks ... */
501
        tmp = roothub_a (ohci);
502
        tmp &= ~(RH_A_PSM | RH_A_OCPM);
503
        if (ohci->flags & OHCI_QUIRK_SUPERIO) {
504
                /* NSC 87560 and maybe others */
505
                tmp |= RH_A_NOCP;
506
                tmp &= ~(RH_A_POTPGT | RH_A_NPS);
507
        } else {
508
                /* hub power always on; required for AMD-756 and some
509
                 * Mac platforms, use this mode everywhere by default
510
                 */
511
                tmp |= RH_A_NPS;
512
        }
513
        writel (tmp, &ohci->regs->roothub.a);
514
        writel (RH_HS_LPSC, &ohci->regs->roothub.status);
515
        writel (0, &ohci->regs->roothub.b);
516
        // flush those pci writes
517
        (void) readl (&ohci->regs->control);
518
 
519
        // POTPGT delay is bits 24-31, in 2 ms units.
520
        mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
521
 
522
        /* connect the virtual root hub */
523
        bus = hcd_to_bus (&ohci->hcd);
524
        bus->root_hub = udev = usb_alloc_dev (NULL, bus);
525
        ohci->hcd.state = USB_STATE_RUNNING;
526
        if (!udev) {
527
                disable (ohci);
528
                ohci->hc_control &= ~OHCI_CTRL_HCFS;
529
                writel (ohci->hc_control, &ohci->regs->control);
530
                return -ENOMEM;
531
        }
532
 
533
        udev->speed = USB_SPEED_FULL;
534
        if (hcd_register_root (&ohci->hcd) != 0) {
535
                usb_put_dev (udev);
536
                bus->root_hub = NULL;
537
                disable (ohci);
538
                ohci->hc_control &= ~OHCI_CTRL_HCFS;
539
                writel (ohci->hc_control, &ohci->regs->control);
540
                return -ENODEV;
541
        }
542
 
543
        return 0;
544
}
545
 
546
/*-------------------------------------------------------------------------*/
547
 
548
/* an interrupt happens */
549
 
550
static void ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
551
{
552
        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
553
        struct ohci_regs        *regs = ohci->regs;
554
        int                     ints;
555
 
556
        /* we can eliminate a (slow) readl() if _only_ WDH caused this irq */
557
        if ((ohci->hcca->done_head != 0)
558
                        && ! (le32_to_cpup (&ohci->hcca->done_head) & 0x01)) {
559
                ints =  OHCI_INTR_WDH;
560
 
561
        /* cardbus/... hardware gone before remove() */
562
        } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
563
                disable (ohci);
564
                ohci_dbg (ohci, "device removed!\n");
565
                return;
566
 
567
        /* interrupt for some other device? */
568
        } else if ((ints &= readl (&regs->intrenable)) == 0) {
569
                return;
570
        }
571
 
572
        if (ints & OHCI_INTR_UE) {
573
                disable (ohci);
574
                ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
575
                // e.g. due to PCI Master/Target Abort
576
 
577
                ohci_dump (ohci, 1);
578
                hc_reset (ohci);
579
        }
580
 
581
        if (ints & OHCI_INTR_WDH) {
582
                if (HCD_IS_RUNNING(hcd->state))
583
                        writel (OHCI_INTR_WDH, &regs->intrdisable);    
584
                dl_done_list (ohci, dl_reverse_done_list (ohci), ptregs);
585
                if (HCD_IS_RUNNING(hcd->state))
586
                        writel (OHCI_INTR_WDH, &regs->intrenable);
587
        }
588
 
589
        /* could track INTR_SO to reduce available PCI/... bandwidth */
590
 
591
        /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
592
         * when there's still unlinking to be done (next frame).
593
         */
594
        spin_lock (&ohci->lock);
595
        if (ohci->ed_rm_list)
596
                finish_unlinks (ohci, le16_to_cpu (ohci->hcca->frame_no),
597
                                ptregs);
598
        if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
599
                        && HCD_IS_RUNNING(ohci->hcd.state))
600
                writel (OHCI_INTR_SF, &regs->intrdisable);     
601
        spin_unlock (&ohci->lock);
602
 
603
        if (HCD_IS_RUNNING(ohci->hcd.state)) {
604
                writel (ints, &regs->intrstatus);
605
                writel (OHCI_INTR_MIE, &regs->intrenable);     
606
                // flush those pci writes
607
                (void) readl (&ohci->regs->control);
608
        }
609
}
610
 
611
/*-------------------------------------------------------------------------*/
612
 
613
static void ohci_stop (struct usb_hcd *hcd)
614
{      
615
        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
616
 
617
        ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
618
                hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
619
                ohci->hcd.state);
620
        ohci_dump (ohci, 1);
621
 
622
        if (HCD_IS_RUNNING(ohci->hcd.state))
623
                hc_reset (ohci);
624
 
625
        remove_debug_files (ohci);
626
        ohci_mem_cleanup (ohci);
627
        if (ohci->hcca) {
628
                pci_free_consistent (ohci->hcd.pdev, sizeof *ohci->hcca,
629
                                        ohci->hcca, ohci->hcca_dma);
630
                ohci->hcca = NULL;
631
                ohci->hcca_dma = 0;
632
        }
633
}
634
 
635
/*-------------------------------------------------------------------------*/
636
 
637
// FIXME:  this restart logic should be generic,
638
// and handle full hcd state cleanup
639
 
640
/* controller died; cleanup debris, then restart */
641
/* must not be called from interrupt context */
642
 
643
#ifdef CONFIG_PM
644
static int hc_restart (struct ohci_hcd *ohci)
645
{
646
        int temp;
647
        int i;
648
 
649
        disable (ohci);
650
        if (hcd_to_bus (&ohci->hcd)->root_hub)
651
                usb_disconnect (&hcd_to_bus (&ohci->hcd)->root_hub);
652
 
653
        /* empty the interrupt branches */
654
        for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
655
        for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
656
 
657
        /* no EDs to remove */
658
        ohci->ed_rm_list = NULL;
659
 
660
        /* empty control and bulk lists */       
661
        ohci->ed_controltail = NULL;
662
        ohci->ed_bulktail    = NULL;
663
 
664
        if ((temp = hc_reset (ohci)) < 0 || (temp = hc_start (ohci)) < 0) {
665
                ohci_err (ohci, "can't restart, %d\n", temp);
666
                return temp;
667
        } else
668
                ohci_dbg (ohci, "restart complete\n");
669
        return 0;
670
}
671
#endif
672
 
673
/*-------------------------------------------------------------------------*/
674
 
675
#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
676
 
677
MODULE_AUTHOR (DRIVER_AUTHOR);
678
MODULE_DESCRIPTION (DRIVER_INFO);
679
MODULE_LICENSE ("GPL");
680
 
681
#ifdef CONFIG_PCI
682
#include "ohci-pci.c"
683
#endif
684
 
685
#ifdef CONFIG_SA1111
686
#include "ohci-sa1111.c"
687
#endif
688
 
689
#if !(defined(CONFIG_PCI) || defined(CONFIG_SA1111))
690
#error "missing bus glue for ohci-hcd"
691
#endif