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Rev | Author | Line No. | Line |
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120 | giacomo | 1 | /* Project: OSLib |
2 | * Description: The OS Construction Kit |
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3 | * Date: 1.6.2000 |
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4 | * Idea by: Luca Abeni & Gerardo Lamastra |
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5 | * |
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6 | * OSLib is an SO project aimed at developing a common, easy-to-use |
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7 | * low-level infrastructure for developing OS kernels and Embedded |
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8 | * Applications; it partially derives from the HARTIK project but it |
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9 | * currently is independently developed. |
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10 | * |
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11 | * OSLib is distributed under GPL License, and some of its code has |
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12 | * been derived from the Linux kernel source; also some important |
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13 | * ideas come from studying the DJGPP go32 extender. |
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14 | * |
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15 | * We acknowledge the Linux Community, Free Software Foundation, |
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16 | * D.J. Delorie and all the other developers who believe in the |
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17 | * freedom of software and ideas. |
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18 | * |
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19 | * For legalese, check out the included GPL license. |
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20 | */ |
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21 | |||
22 | /* Advanced Timer Managment |
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23 | * Author: Giacomo Guidi <giacomo@gandalf.sssup.it> |
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24 | */ |
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25 | |||
26 | #include <ll/i386/stdlib.h> |
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27 | #include <ll/i386/error.h> |
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28 | #include <ll/i386/advtimer.h> |
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29 | #include <ll/sys/ll/ll-data.h> |
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30 | #include <ll/sys/ll/ll-func.h> |
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31 | #include <ll/i386/pic.h> |
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299 | giacomo | 32 | #include <ll/i386/apic.h> |
120 | giacomo | 33 | #include <ll/sys/ll/event.h> |
34 | #include <ll/sys/ll/time.h> |
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35 | |||
264 | giacomo | 36 | #define CALIBRATE_USING_CMOS |
37 | |||
130 | giacomo | 38 | unsigned char use_tsc = 1; //Enable the TSC counter mode |
120 | giacomo | 39 | unsigned char use_cmos = 0; //Enable the RTC correction |
302 | giacomo | 40 | unsigned char use_apic = 0; //Enable the APIC for P6 only |
120 | giacomo | 41 | |
126 | giacomo | 42 | //Max single delta_clk_per_msec increment = clk_per_msec / MAX_DIV_INK; |
43 | #define MAX_DIV_INK 30000 |
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120 | giacomo | 44 | |
45 | signed long long init_tsc; |
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194 | giacomo | 46 | signed long long * ptr_init_tsc = &init_tsc; |
47 | |||
238 | giacomo | 48 | signed long long init_nsec; //Wraparound 292 years |
194 | giacomo | 49 | signed long long * ptr_init_nsec = &init_nsec; |
50 | |||
120 | giacomo | 51 | signed long long clk_per_msec; |
194 | giacomo | 52 | signed long long * ptr_clk_per_msec = &clk_per_msec; |
120 | giacomo | 53 | |
299 | giacomo | 54 | signed long long apic_clk_per_msec; |
55 | |||
120 | giacomo | 56 | signed long last_delta_clk_per_msec; |
57 | signed long total_delta_clk_per_msec; |
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58 | |||
59 | unsigned char save_CMOS_regA; |
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60 | unsigned char save_CMOS_regB; |
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61 | |||
242 | giacomo | 62 | //#define IRQ8_DEBUG |
63 | |||
120 | giacomo | 64 | void HandlerIRQ8(void *p) |
65 | { |
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66 | |||
67 | unsigned char set; |
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194 | giacomo | 68 | |
69 | static unsigned long Mconst = 1000000; |
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120 | giacomo | 70 | |
71 | static unsigned long init_step = 0; |
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72 | |||
126 | giacomo | 73 | signed long max_dcms = clk_per_msec / MAX_DIV_INK; |
120 | giacomo | 74 | |
194 | giacomo | 75 | static signed long long dn; |
76 | static signed long long * ptr_dn = &dn; |
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120 | giacomo | 77 | signed long delta_clk_per_msec; |
126 | giacomo | 78 | |
120 | giacomo | 79 | cli(); |
242 | giacomo | 80 | |
81 | #ifdef IRQ8_DEBUG |
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82 | message("(IRQ8"); |
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83 | #endif |
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84 | |||
120 | giacomo | 85 | CMOS_READ(0x0C,set); |
194 | giacomo | 86 | |
242 | giacomo | 87 | __asm__("xorl %%eax,%%eax\n\t" |
88 | "cpuid\n\t" |
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89 | "rdtsc\n\t" |
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194 | giacomo | 90 | "pushl %%eax\n\t" |
91 | "pushl %%edx\n\t" |
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242 | giacomo | 92 | "pushl %%eax\n\t" |
93 | "pushl %%edx\n\t" |
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94 | "xorl %%eax,%%eax\n\t" |
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95 | "cpuid\n\t" |
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96 | "popl %%edx\n\t" |
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97 | "popl %%eax\n\t" |
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194 | giacomo | 98 | "subl (%%edi),%%eax\n\t" |
99 | "sbbl 4(%%edi),%%edx\n\t" |
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100 | "popl 4(%%edi)\n\t" |
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101 | "popl (%%edi)\n\t" |
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102 | "movl %%edx,%%ecx\n\t" |
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103 | "mull %4\n\t" |
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104 | "pushl %%eax\n\t" |
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105 | "movl %%ecx,%%eax\n\t" |
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106 | "movl %%edx,%%ecx\n\t" |
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107 | "mull %4\n\t" |
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108 | "addl %%ecx,%%eax\n\t" |
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109 | "adcl $0,%%edx\n\t" |
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242 | giacomo | 110 | "movl %7,%%ebx\n\t" |
194 | giacomo | 111 | "divl (%%ebx)\n\t" |
112 | "movl %%eax,4(%%esi)\n\t" |
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113 | "popl %%eax\n\t" |
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114 | "divl (%%ebx)\n\t" |
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115 | "movl %%eax,(%%esi)\n\t" |
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116 | |||
117 | : |
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242 | giacomo | 118 | : "D" (ptr_init_tsc), "S" (ptr_dn), "b" (0), |
119 | "c" (0), "m" (Mconst), "a" (0), "d" (0), "m" (ptr_clk_per_msec)); |
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120 | giacomo | 120 | |
121 | //Offset |
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122 | init_nsec += dn; |
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194 | giacomo | 123 | |
120 | giacomo | 124 | if (init_step < 5) { |
125 | init_step++; |
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242 | giacomo | 126 | #ifdef IRQ8_DEBUG |
127 | message(")"); |
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128 | #endif |
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129 | |||
244 | giacomo | 130 | sti(); |
131 | |||
120 | giacomo | 132 | return; |
133 | } |
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134 | |||
135 | dn = dn % 1000000000 - 500000000; |
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136 | |||
137 | //Delta clk/msec |
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138 | delta_clk_per_msec = dn * clk_per_msec / (500000000 - dn); |
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139 | |||
140 | //clk_per_msec adjustment |
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141 | if (delta_clk_per_msec < 0) { |
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142 | |||
126 | giacomo | 143 | if (delta_clk_per_msec > -max_dcms) |
120 | giacomo | 144 | clk_per_msec += delta_clk_per_msec; |
145 | else |
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126 | giacomo | 146 | clk_per_msec -= max_dcms; |
120 | giacomo | 147 | } else { |
148 | |||
126 | giacomo | 149 | if (delta_clk_per_msec < max_dcms) |
120 | giacomo | 150 | clk_per_msec += delta_clk_per_msec; |
151 | else |
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126 | giacomo | 152 | clk_per_msec += max_dcms; |
120 | giacomo | 153 | } |
154 | |||
155 | last_delta_clk_per_msec = delta_clk_per_msec; |
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156 | total_delta_clk_per_msec += delta_clk_per_msec; |
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157 | |||
242 | giacomo | 158 | #ifdef IRQ8_DEBUG |
159 | message(")"); |
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160 | #endif |
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161 | |||
120 | giacomo | 162 | sti(); |
163 | |||
164 | } |
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165 | |||
166 | #ifdef CONFIG_MELAN |
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167 | # define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ |
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168 | #else |
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249 | giacomo | 169 | # define CLOCK_TICK_RATE 1193182 /* Underlying HZ */ |
120 | giacomo | 170 | #endif |
171 | |||
248 | giacomo | 172 | #define COUNTER_END 100 |
120 | giacomo | 173 | |
245 | giacomo | 174 | #define barrier() __asm__ __volatile__("" ::: "memory"); |
175 | |||
120 | giacomo | 176 | //TSC Calibration (idea from the linux kernel code) |
177 | void ll_calibrate_tsc(void) |
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178 | { |
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179 | |||
180 | signed long long start; |
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181 | signed long long end; |
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244 | giacomo | 182 | signed long long dtsc; |
120 | giacomo | 183 | |
244 | giacomo | 184 | signed long start_8253, end_8253, delta_8253; |
120 | giacomo | 185 | |
186 | cli(); |
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187 | |||
248 | giacomo | 188 | outp(0x61, (inp(0x61) & ~0x02) | 0x01); |
120 | giacomo | 189 | |
190 | outp(0x43,0xB0); /* binary, mode 0, LSB/MSB, Ch 2 */ |
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238 | giacomo | 191 | outp(0x42,0xFF); /* LSB of count */ |
192 | outp(0x42,0xFF); /* MSB of count */ |
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242 | giacomo | 193 | |
245 | giacomo | 194 | barrier(); |
195 | rdtscll(start); |
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196 | barrier(); |
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243 | giacomo | 197 | outp(0x43,0x00); |
198 | start_8253 = inp(0x42); |
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199 | start_8253 |= inp(0x42) << 8; |
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245 | giacomo | 200 | barrier(); |
264 | giacomo | 201 | rdtscll(start); |
202 | barrier(); |
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243 | giacomo | 203 | |
204 | do { |
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205 | |||
206 | outp(0x43,0x00); |
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207 | end_8253 = inp(0x42); |
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208 | end_8253 |= inp(0x42) << 8; |
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209 | |||
210 | } while (end_8253 > COUNTER_END); |
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211 | |||
245 | giacomo | 212 | barrier(); |
213 | rdtscll(end); |
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214 | barrier(); |
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243 | giacomo | 215 | outp(0x43,0x00); |
216 | end_8253 = inp(0x42); |
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217 | end_8253 |= inp(0x42) << 8; |
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245 | giacomo | 218 | barrier(); |
264 | giacomo | 219 | rdtscll(end); |
220 | barrier(); |
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243 | giacomo | 221 | |
222 | //Delta TSC |
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244 | giacomo | 223 | dtsc = end - start; |
243 | giacomo | 224 | |
225 | //Delta PIT |
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264 | giacomo | 226 | delta_8253 = start_8253 - end_8253; |
243 | giacomo | 227 | |
242 | giacomo | 228 | if (delta_8253 > 0x20000) { |
120 | giacomo | 229 | message("Error calculating Delta PIT\n"); |
230 | ll_abort(10); |
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231 | } |
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232 | |||
233 | message("Delta TSC = %10ld\n",(long)dtsc); |
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234 | |||
235 | message("Delta PIT = %10ld\n",(long)delta_8253); |
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236 | |||
252 | giacomo | 237 | clk_per_msec = dtsc * CLOCK_TICK_RATE / delta_8253 / 1000; |
120 | giacomo | 238 | |
239 | message("Calibrated Clk_per_msec = %10ld\n",(long)clk_per_msec); |
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240 | |||
241 | sti(); |
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242 | |||
243 | } |
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244 | |||
264 | giacomo | 245 | #define CMOS_INIT 0 |
246 | #define CMOS_BEGIN 1 |
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247 | #define CMOS_START 2 |
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248 | #define CMOS_END 3 |
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249 | |||
250 | int cmos_calibrate_status = CMOS_INIT; |
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251 | signed long long irq8_start; |
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252 | signed long long irq8_end; |
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253 | |||
299 | giacomo | 254 | void calibrate_tsc_IRQ8(void *p) |
264 | giacomo | 255 | { |
256 | |||
257 | unsigned char set; |
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258 | |||
259 | cli(); |
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260 | |||
261 | CMOS_READ(0x0C,set); |
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262 | |||
263 | barrier(); |
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264 | rdtscll(irq8_end); |
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265 | barrier(); |
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266 | |||
267 | if (cmos_calibrate_status == CMOS_START) { |
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268 | cmos_calibrate_status = CMOS_END; |
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269 | } |
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270 | |||
271 | if (cmos_calibrate_status == CMOS_BEGIN) { |
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272 | irq8_start = irq8_end; |
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273 | cmos_calibrate_status = CMOS_START; |
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274 | } |
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275 | |||
276 | if (cmos_calibrate_status == CMOS_INIT) { |
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277 | cmos_calibrate_status = CMOS_BEGIN; |
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278 | } |
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279 | |||
280 | sti(); |
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281 | |||
282 | } |
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283 | |||
284 | //TSC Calibration using RTC |
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285 | void ll_calibrate_tsc_cmos(void) |
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286 | { |
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287 | |||
288 | signed long long dtsc; |
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289 | |||
290 | cli(); |
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291 | |||
299 | giacomo | 292 | irq_bind(8, calibrate_tsc_IRQ8, INT_FORCE); |
264 | giacomo | 293 | |
294 | CMOS_READ(0x0A,save_CMOS_regA); |
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295 | CMOS_READ(0x0B,save_CMOS_regB); |
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296 | |||
297 | CMOS_WRITE(0x0A,0x2F); // Set 2 Hz Periodic Interrupt |
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298 | CMOS_WRITE(0x0B,0x42); // Enable Interrupt |
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299 | |||
300 | irq_unmask(8); |
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301 | |||
302 | sti(); |
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303 | |||
304 | while (cmos_calibrate_status != CMOS_END) { |
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305 | barrier(); |
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306 | } |
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307 | |||
308 | dtsc = irq8_end - irq8_start; |
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309 | |||
310 | clk_per_msec = dtsc / 500; |
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311 | |||
299 | giacomo | 312 | message("Calibrated CPU Clk/msec = %10ld\n",(long)clk_per_msec); |
264 | giacomo | 313 | |
314 | cli(); |
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315 | |||
316 | irq_mask(8); |
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317 | |||
318 | CMOS_WRITE(0x0A,save_CMOS_regA); |
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319 | CMOS_WRITE(0x0B,save_CMOS_regB); |
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320 | |||
321 | sti(); |
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322 | |||
323 | } |
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324 | |||
120 | giacomo | 325 | //Low level time read function |
131 | giacomo | 326 | void ll_read_timespec(struct timespec *tspec) |
120 | giacomo | 327 | { |
328 | |||
194 | giacomo | 329 | static unsigned long Gconst = 1000000000; |
330 | static unsigned long Mconst = 1000000; |
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120 | giacomo | 331 | |
124 | giacomo | 332 | if (clk_per_msec <= 0) { |
333 | NULL_TIMESPEC(tspec); |
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334 | return; |
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335 | } |
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336 | |||
242 | giacomo | 337 | __asm__("xorl %%eax,%%eax\n\t" |
338 | "cpuid\n\t" |
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339 | "rdtsc\n\t" |
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340 | "pushl %%eax\n\t" |
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341 | "pushl %%edx\n\t" |
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342 | "xorl %%eax,%%eax\n\t" |
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343 | "cpuid\n\t" |
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344 | "popl %%edx\n\t" |
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345 | "popl %%eax\n\t" |
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346 | "subl (%%edi),%%eax\n\t" |
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194 | giacomo | 347 | "sbbl 4(%%edi),%%edx\n\t" |
348 | "movl %%edx,%%ecx\n\t" |
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349 | "mull %6\n\t" |
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350 | "pushl %%eax\n\t" |
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351 | "movl %%ecx,%%eax\n\t" |
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352 | "movl %%edx,%%ecx\n\t" |
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353 | "mull %6\n\t" |
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354 | "addl %%ecx,%%eax\n\t" |
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355 | "adcl $0,%%edx\n\t" |
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242 | giacomo | 356 | "movl %8,%%ebx\n\t" |
194 | giacomo | 357 | "divl (%%ebx)\n\t" |
358 | "movl %%eax,%%ecx\n\t" |
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359 | "popl %%eax\n\t" |
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360 | "divl (%%ebx)\n\t" |
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361 | "movl %%ecx,%%edx\n\t" |
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362 | "addl (%%esi),%%eax\n\t" |
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363 | "adcl 4(%%esi),%%edx\n\t" |
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364 | "divl %7\n\t" |
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365 | |||
366 | : "=a" (tspec->tv_sec), "=d" (tspec->tv_nsec) |
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242 | giacomo | 367 | : "D" (ptr_init_tsc), "S" (ptr_init_nsec), "b" (0), |
368 | "c" (0), "m" (Mconst), "m" (Gconst), "m" (ptr_clk_per_msec)); |
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194 | giacomo | 369 | |
120 | giacomo | 370 | } |
371 | |||
299 | giacomo | 372 | int apic_get_maxlvt(void) |
373 | { |
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374 | unsigned int v, ver, maxlvt; |
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375 | |||
376 | v = apic_read(APIC_LVR); |
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377 | ver = GET_APIC_VERSION(v); |
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378 | /* 82489DXs do not report # of LVT entries. */ |
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379 | maxlvt = APIC_INTEGRATED(ver) ? GET_APIC_MAXLVT(v) : 2; |
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380 | return maxlvt; |
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381 | } |
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382 | |||
302 | giacomo | 383 | /* Clear local APIC, grom Linux kernel */ |
299 | giacomo | 384 | void clear_local_APIC(void) |
385 | { |
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386 | int maxlvt; |
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387 | unsigned long v; |
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388 | |||
389 | maxlvt = apic_get_maxlvt(); |
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390 | |||
391 | /* |
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392 | * Masking an LVT entry on a P6 can trigger a local APIC error |
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393 | * if the vector is zero. Mask LVTERR first to prevent this. |
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394 | */ |
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395 | if (maxlvt >= 3) { |
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396 | v = 0xFF; /* any non-zero vector will do */ |
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397 | apic_write_around(APIC_LVTERR, v | APIC_LVT_MASKED); |
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398 | } |
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399 | /* |
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400 | * Careful: we have to set masks only first to deassert |
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401 | * any level-triggered sources. |
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402 | */ |
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403 | v = apic_read(APIC_LVTT); |
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404 | apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); |
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405 | v = apic_read(APIC_LVT0); |
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406 | apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED); |
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407 | v = apic_read(APIC_LVT1); |
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408 | apic_write_around(APIC_LVT1, v | APIC_LVT_MASKED); |
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409 | if (maxlvt >= 4) { |
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410 | v = apic_read(APIC_LVTPC); |
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411 | apic_write_around(APIC_LVTPC, v | APIC_LVT_MASKED); |
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412 | } |
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413 | |||
414 | /* |
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415 | * Clean APIC state for other OSs: |
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416 | */ |
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417 | apic_write_around(APIC_LVTT, APIC_LVT_MASKED); |
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418 | apic_write_around(APIC_LVT0, APIC_LVT_MASKED); |
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419 | apic_write_around(APIC_LVT1, APIC_LVT_MASKED); |
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420 | if (maxlvt >= 3) |
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421 | apic_write_around(APIC_LVTERR, APIC_LVT_MASKED); |
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422 | if (maxlvt >= 4) |
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423 | apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); |
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424 | v = GET_APIC_VERSION(apic_read(APIC_LVR)); |
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425 | if (APIC_INTEGRATED(v)) { /* !82489DX */ |
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426 | if (maxlvt > 3) |
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427 | apic_write(APIC_ESR, 0); |
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428 | apic_read(APIC_ESR); |
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429 | } |
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430 | } |
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431 | |||
432 | void disable_local_APIC(void) |
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433 | { |
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434 | unsigned long value; |
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435 | |||
436 | clear_local_APIC(); |
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437 | |||
438 | /* |
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439 | * Disable APIC (implies clearing of registers |
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440 | * for 82489DX!). |
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441 | */ |
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442 | value = apic_read(APIC_SPIV); |
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443 | value &= ~APIC_SPIV_APIC_ENABLED; |
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444 | apic_write_around(APIC_SPIV, value); |
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445 | } |
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446 | |||
447 | #define SPURIOUS_APIC_VECTOR 0xFF |
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448 | |||
449 | /* |
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302 | giacomo | 450 | * Setup the local APIC, minimal code to run P6 APIC |
299 | giacomo | 451 | */ |
452 | void setup_local_APIC (void) |
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453 | { |
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301 | giacomo | 454 | unsigned long value; |
299 | giacomo | 455 | |
456 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ |
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457 | |||
458 | apic_write(APIC_ESR, 0); |
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459 | apic_write(APIC_ESR, 0); |
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460 | apic_write(APIC_ESR, 0); |
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461 | apic_write(APIC_ESR, 0); |
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462 | |||
301 | giacomo | 463 | value = APIC_SPIV_FOCUS_DISABLED | APIC_SPIV_APIC_ENABLED | SPURIOUS_APIC_VECTOR; |
464 | apic_write_around(APIC_SPIV, value); |
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299 | giacomo | 465 | |
301 | giacomo | 466 | value = APIC_DM_EXTINT | APIC_LVT_LEVEL_TRIGGER; |
467 | apic_write_around(APIC_LVT0, value); |
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299 | giacomo | 468 | |
301 | giacomo | 469 | value = APIC_DM_NMI; |
470 | apic_write_around(APIC_LVT1, value); |
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299 | giacomo | 471 | |
301 | giacomo | 472 | apic_write(APIC_ESR, 0); |
299 | giacomo | 473 | |
474 | } |
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475 | |||
476 | void disable_APIC_timer(void) |
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477 | { |
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478 | unsigned long v; |
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479 | |||
480 | v = apic_read(APIC_LVTT); |
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481 | apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); |
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482 | |||
483 | } |
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484 | |||
485 | void enable_APIC_timer(void) |
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486 | { |
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487 | unsigned long v; |
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488 | |||
489 | v = apic_read(APIC_LVTT); |
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490 | apic_write_around(APIC_LVTT, v & ~APIC_LVT_MASKED); |
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491 | |||
492 | } |
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493 | |||
301 | giacomo | 494 | #define LOCAL_TIMER_VECTOR 0x66 |
302 | giacomo | 495 | |
496 | /* Set APIC Timer... from Linux kernel */ void setup_APIC_LVTT(unsigned int clocks) |
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299 | giacomo | 497 | { |
498 | unsigned int lvtt1_value, tmp_value; |
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499 | |||
500 | lvtt1_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | |
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501 | APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; |
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502 | apic_write_around(APIC_LVTT, lvtt1_value); |
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503 | |||
504 | /* |
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505 | * Divide PICLK by 1 |
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506 | */ |
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507 | tmp_value = apic_read(APIC_TDCR); |
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508 | apic_write_around(APIC_TDCR, (tmp_value |
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509 | & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) |
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510 | | APIC_TDR_DIV_1); |
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511 | |||
512 | apic_write_around(APIC_TMICT, clocks); |
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513 | } |
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514 | |||
515 | #define APIC_LIMIT 0xFF000000 |
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516 | |||
517 | void ll_calibrate_apic(void) |
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518 | { |
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519 | |||
520 | unsigned int apic_start = 0, apic_end = 0, dapic; |
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521 | signed long long tsc_start = 0, tsc_end = 0, dtsc; |
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522 | unsigned int tmp_value; |
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523 | |||
524 | cli(); |
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525 | |||
526 | tmp_value = apic_read(APIC_TDCR); |
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527 | apic_write_around(APIC_TDCR, (tmp_value |
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528 | & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) |
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529 | | APIC_TDR_DIV_1); |
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530 | |||
531 | apic_write(APIC_TMICT, MAX_DWORD); |
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532 | |||
533 | barrier(); |
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534 | rdtscll(tsc_start); |
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535 | barrier(); |
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536 | apic_start = apic_read(APIC_TMCCT); |
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537 | barrier(); |
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538 | |||
539 | while (apic_read(APIC_TMCCT) > APIC_LIMIT) { |
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540 | barrier(); |
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541 | rdtscll(tsc_end); |
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542 | } |
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543 | |||
544 | barrier(); |
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545 | rdtscll(tsc_end); |
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546 | barrier(); |
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547 | apic_end = apic_read(APIC_TMCCT); |
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548 | barrier(); |
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549 | |||
550 | sti(); |
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551 | |||
552 | dtsc = tsc_end - tsc_start; |
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553 | dapic = apic_start - apic_end; |
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554 | |||
555 | apic_clk_per_msec = clk_per_msec * (signed long long)(dapic) / dtsc; |
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556 | |||
557 | message("Calibrated APIC Clk/msec = %10ld\n",(long)apic_clk_per_msec); |
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558 | |||
559 | } |
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560 | |||
120 | giacomo | 561 | void ll_init_advtimer() |
562 | { |
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563 | |||
564 | if (use_tsc) { |
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565 | |||
264 | giacomo | 566 | #ifdef CALIBRATE_USING_CMOS |
567 | ll_calibrate_tsc_cmos(); |
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568 | #else |
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569 | ll_calibrate_tsc(); |
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570 | #endif |
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571 | |||
120 | giacomo | 572 | last_delta_clk_per_msec = 0; |
573 | total_delta_clk_per_msec = 0; |
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574 | |||
575 | rdtscll(init_tsc); // Read start TSC |
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576 | init_nsec = 0; |
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577 | |||
299 | giacomo | 578 | if (use_apic) { |
579 | unsigned long msr_low_orig, tmp; |
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580 | |||
581 | rdmsr(APIC_BASE_MSR, msr_low_orig, tmp); |
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582 | wrmsr(APIC_BASE_MSR, msr_low_orig|(1<<11), 0); |
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583 | |||
301 | giacomo | 584 | clear_local_APIC(); |
299 | giacomo | 585 | |
301 | giacomo | 586 | ll_calibrate_apic(); |
587 | |||
299 | giacomo | 588 | setup_local_APIC(); |
589 | |||
590 | } |
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591 | |||
120 | giacomo | 592 | if (use_cmos) { |
593 | |||
131 | giacomo | 594 | message("CMOS adjustement enabled\n"); |
120 | giacomo | 595 | |
596 | cli(); |
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597 | |||
598 | irq_bind(8, HandlerIRQ8, INT_FORCE); |
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599 | |||
600 | CMOS_READ(0x0A,save_CMOS_regA); |
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601 | CMOS_READ(0x0B,save_CMOS_regB); |
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602 | |||
603 | CMOS_WRITE(0x0A,0x2F); // Set 2 Hz Periodic Interrupt |
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604 | CMOS_WRITE(0x0B,0x42); // Enable Interrupt |
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605 | |||
606 | irq_unmask(8); |
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607 | |||
608 | sti(); |
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609 | |||
610 | } |
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611 | |||
612 | } else { |
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613 | |||
614 | use_cmos = 0; |
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615 | |||
616 | } |
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617 | |||
618 | } |
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619 | |||
301 | giacomo | 620 | void ll_restore_adv() |
120 | giacomo | 621 | { |
302 | giacomo | 622 | /* Restore CMOS setting */ |
120 | giacomo | 623 | if (use_cmos) { |
624 | cli(); |
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625 | |||
626 | irq_mask(8); |
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627 | |||
628 | CMOS_WRITE(0x0A,save_CMOS_regA); |
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629 | CMOS_WRITE(0x0B,save_CMOS_regB); |
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630 | |||
631 | sti(); |
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632 | } |
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301 | giacomo | 633 | |
302 | giacomo | 634 | /* Disable APIC */ |
301 | giacomo | 635 | if (use_apic) { |
636 | unsigned int msr_low_orig, tmp; |
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637 | |||
638 | cli(); |
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639 | |||
640 | disable_APIC_timer(); |
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641 | |||
642 | clear_local_APIC(); |
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643 | |||
644 | rdmsr(APIC_BASE_MSR, msr_low_orig, tmp); |
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645 | wrmsr(APIC_BASE_MSR, msr_low_orig&~(1<<11), 0); |
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646 | |||
647 | sti(); |
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648 | |||
649 | } |
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650 | |||
120 | giacomo | 651 | } |