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Rev | Author | Line No. | Line |
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120 | giacomo | 1 | /* Project: OSLib |
2 | * Description: The OS Construction Kit |
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3 | * Date: 1.6.2000 |
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4 | * Idea by: Luca Abeni & Gerardo Lamastra |
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5 | * |
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6 | * OSLib is an SO project aimed at developing a common, easy-to-use |
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7 | * low-level infrastructure for developing OS kernels and Embedded |
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8 | * Applications; it partially derives from the HARTIK project but it |
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9 | * currently is independently developed. |
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10 | * |
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11 | * OSLib is distributed under GPL License, and some of its code has |
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12 | * been derived from the Linux kernel source; also some important |
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13 | * ideas come from studying the DJGPP go32 extender. |
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14 | * |
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15 | * We acknowledge the Linux Community, Free Software Foundation, |
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16 | * D.J. Delorie and all the other developers who believe in the |
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17 | * freedom of software and ideas. |
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18 | * |
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19 | * For legalese, check out the included GPL license. |
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20 | */ |
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21 | |||
22 | /* Advanced Timer Managment |
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23 | * Author: Giacomo Guidi <giacomo@gandalf.sssup.it> |
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24 | */ |
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25 | |||
26 | #include <ll/i386/stdlib.h> |
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27 | #include <ll/i386/error.h> |
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28 | #include <ll/sys/ll/ll-data.h> |
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29 | #include <ll/sys/ll/ll-func.h> |
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30 | #include <ll/i386/pic.h> |
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299 | giacomo | 31 | #include <ll/i386/apic.h> |
305 | giacomo | 32 | #include <ll/i386/64bit.h> |
120 | giacomo | 33 | #include <ll/sys/ll/event.h> |
34 | #include <ll/sys/ll/time.h> |
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305 | giacomo | 35 | #include <ll/i386/advtimer.h> |
120 | giacomo | 36 | |
264 | giacomo | 37 | #define CALIBRATE_USING_CMOS |
38 | |||
305 | giacomo | 39 | unsigned long long init_tsc; |
40 | unsigned long long * ptr_init_tsc = &init_tsc; |
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120 | giacomo | 41 | |
333 | giacomo | 42 | unsigned long long init_nsec; |
305 | giacomo | 43 | unsigned long long * ptr_init_nsec = &init_nsec; |
120 | giacomo | 44 | |
305 | giacomo | 45 | unsigned int clk_per_msec = 0; |
46 | unsigned int apic_clk_per_msec = 0; |
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47 | unsigned int apic_set_limit = 0; |
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194 | giacomo | 48 | |
336 | giacomo | 49 | /* Precalcolated const |
50 | used in ll_read_timer */ |
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51 | unsigned int clk_opt_0 = 0; |
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329 | giacomo | 52 | unsigned int clk_opt_1 = 0; |
53 | unsigned int clk_opt_2 = 0; |
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54 | unsigned int clk_opt_3 = 0; |
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55 | unsigned int clk_opt_4 = 0; |
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336 | giacomo | 56 | unsigned int clk_opt_5 = 0; |
329 | giacomo | 57 | |
120 | giacomo | 58 | unsigned char save_CMOS_regA; |
59 | unsigned char save_CMOS_regB; |
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60 | |||
61 | #ifdef CONFIG_MELAN |
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62 | # define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ |
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63 | #else |
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249 | giacomo | 64 | # define CLOCK_TICK_RATE 1193182 /* Underlying HZ */ |
120 | giacomo | 65 | #endif |
66 | |||
248 | giacomo | 67 | #define COUNTER_END 100 |
120 | giacomo | 68 | |
245 | giacomo | 69 | #define barrier() __asm__ __volatile__("" ::: "memory"); |
70 | |||
120 | giacomo | 71 | //TSC Calibration (idea from the linux kernel code) |
72 | void ll_calibrate_tsc(void) |
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73 | { |
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74 | |||
305 | giacomo | 75 | unsigned long long start; |
76 | unsigned long long end; |
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77 | unsigned long long dtsc; |
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120 | giacomo | 78 | |
305 | giacomo | 79 | unsigned int start_8253, end_8253, delta_8253; |
120 | giacomo | 80 | |
248 | giacomo | 81 | outp(0x61, (inp(0x61) & ~0x02) | 0x01); |
120 | giacomo | 82 | |
83 | outp(0x43,0xB0); /* binary, mode 0, LSB/MSB, Ch 2 */ |
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238 | giacomo | 84 | outp(0x42,0xFF); /* LSB of count */ |
85 | outp(0x42,0xFF); /* MSB of count */ |
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242 | giacomo | 86 | |
245 | giacomo | 87 | barrier(); |
88 | rdtscll(start); |
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89 | barrier(); |
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243 | giacomo | 90 | outp(0x43,0x00); |
91 | start_8253 = inp(0x42); |
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92 | start_8253 |= inp(0x42) << 8; |
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245 | giacomo | 93 | barrier(); |
264 | giacomo | 94 | rdtscll(start); |
95 | barrier(); |
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243 | giacomo | 96 | |
97 | do { |
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98 | |||
99 | outp(0x43,0x00); |
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100 | end_8253 = inp(0x42); |
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101 | end_8253 |= inp(0x42) << 8; |
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102 | |||
103 | } while (end_8253 > COUNTER_END); |
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104 | |||
245 | giacomo | 105 | barrier(); |
106 | rdtscll(end); |
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107 | barrier(); |
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243 | giacomo | 108 | outp(0x43,0x00); |
109 | end_8253 = inp(0x42); |
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110 | end_8253 |= inp(0x42) << 8; |
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245 | giacomo | 111 | barrier(); |
264 | giacomo | 112 | rdtscll(end); |
113 | barrier(); |
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243 | giacomo | 114 | |
115 | //Delta TSC |
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244 | giacomo | 116 | dtsc = end - start; |
243 | giacomo | 117 | |
118 | //Delta PIT |
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264 | giacomo | 119 | delta_8253 = start_8253 - end_8253; |
243 | giacomo | 120 | |
242 | giacomo | 121 | if (delta_8253 > 0x20000) { |
120 | giacomo | 122 | message("Error calculating Delta PIT\n"); |
123 | ll_abort(10); |
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124 | } |
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125 | |||
305 | giacomo | 126 | message("Delta TSC = %10d\n",(int)dtsc); |
120 | giacomo | 127 | |
305 | giacomo | 128 | message("Delta PIT = %10d\n",delta_8253); |
120 | giacomo | 129 | |
252 | giacomo | 130 | clk_per_msec = dtsc * CLOCK_TICK_RATE / delta_8253 / 1000; |
120 | giacomo | 131 | |
305 | giacomo | 132 | message("Calibrated Clk_per_msec = %10d\n",clk_per_msec); |
120 | giacomo | 133 | |
134 | } |
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135 | |||
264 | giacomo | 136 | #define CMOS_INIT 0 |
137 | #define CMOS_BEGIN 1 |
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138 | #define CMOS_START 2 |
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139 | #define CMOS_END 3 |
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140 | |||
141 | int cmos_calibrate_status = CMOS_INIT; |
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305 | giacomo | 142 | unsigned long long irq8_start; |
143 | unsigned long long irq8_end; |
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264 | giacomo | 144 | |
299 | giacomo | 145 | void calibrate_tsc_IRQ8(void *p) |
264 | giacomo | 146 | { |
147 | |||
148 | unsigned char set; |
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149 | |||
150 | CMOS_READ(0x0C,set); |
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151 | |||
152 | barrier(); |
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153 | rdtscll(irq8_end); |
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154 | barrier(); |
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155 | |||
156 | if (cmos_calibrate_status == CMOS_START) { |
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157 | cmos_calibrate_status = CMOS_END; |
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158 | } |
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159 | |||
160 | if (cmos_calibrate_status == CMOS_BEGIN) { |
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161 | irq8_start = irq8_end; |
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162 | cmos_calibrate_status = CMOS_START; |
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163 | } |
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164 | |||
165 | if (cmos_calibrate_status == CMOS_INIT) { |
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166 | cmos_calibrate_status = CMOS_BEGIN; |
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167 | } |
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168 | |||
169 | } |
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170 | |||
171 | //TSC Calibration using RTC |
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172 | void ll_calibrate_tsc_cmos(void) |
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173 | { |
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174 | |||
305 | giacomo | 175 | unsigned long long dtsc; |
264 | giacomo | 176 | |
299 | giacomo | 177 | irq_bind(8, calibrate_tsc_IRQ8, INT_FORCE); |
264 | giacomo | 178 | |
179 | CMOS_READ(0x0A,save_CMOS_regA); |
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180 | CMOS_READ(0x0B,save_CMOS_regB); |
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181 | |||
182 | CMOS_WRITE(0x0A,0x2F); // Set 2 Hz Periodic Interrupt |
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183 | CMOS_WRITE(0x0B,0x42); // Enable Interrupt |
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184 | |||
185 | irq_unmask(8); |
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317 | giacomo | 186 | |
264 | giacomo | 187 | sti(); |
188 | |||
189 | while (cmos_calibrate_status != CMOS_END) { |
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190 | barrier(); |
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191 | } |
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317 | giacomo | 192 | |
193 | cli(); |
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264 | giacomo | 194 | |
195 | dtsc = irq8_end - irq8_start; |
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196 | |||
197 | clk_per_msec = dtsc / 500; |
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336 | giacomo | 198 | clk_opt_0 = (unsigned int)(dtsc); |
329 | giacomo | 199 | clk_opt_1 = (unsigned int)((unsigned long long)(dtsc << 1)); |
200 | clk_opt_2 = (unsigned int)((unsigned long long)(dtsc << 33) / 1000000000L); |
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201 | clk_opt_3 = (unsigned int)((unsigned long long)(dtsc << 32) / 1000000000L); |
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202 | clk_opt_4 = (unsigned int)((unsigned long long)(dtsc << 31) / 1000000000L); |
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336 | giacomo | 203 | clk_opt_5 = (unsigned int)((unsigned long long)(dtsc << 30) / 1000000000L); |
264 | giacomo | 204 | |
329 | giacomo | 205 | message("Calibrated CPU Clk/msec = %10u\n",clk_per_msec); |
264 | giacomo | 206 | |
329 | giacomo | 207 | #ifdef __O1000__ |
208 | if (clk_per_msec < 1000000) { |
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209 | message("Timer Optimization CPU < 1 GHz\n"); |
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210 | } else { |
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211 | message("Bad Timer Optimization\n"); |
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212 | ll_abort(66); |
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213 | } |
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214 | #endif |
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215 | |||
216 | #ifdef __O2000__ |
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217 | if (clk_per_msec < 2000000 && clk_per_msec >= 1000000) { |
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218 | message("Timer Optimization 1 GHz < CPU < 2 GHz\n"); |
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219 | } else { |
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220 | message("Bad Timer Optimization\n"); |
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221 | ll_abort(66); |
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222 | } |
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223 | #endif |
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224 | |||
225 | #ifdef __O4000__ |
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226 | if (clk_per_msec < 4000000 && clk_per_msec >= 2000000) { |
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227 | message("Timer Optimization 2 GHz < CPU < 4 GHz\n"); |
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228 | } else { |
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229 | message("Bad Timer Optimization\n"); |
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230 | ll_abort(66); |
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231 | } |
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232 | #endif |
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233 | |||
264 | giacomo | 234 | irq_mask(8); |
235 | |||
236 | CMOS_WRITE(0x0A,save_CMOS_regA); |
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237 | CMOS_WRITE(0x0B,save_CMOS_regB); |
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238 | |||
239 | } |
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240 | |||
299 | giacomo | 241 | int apic_get_maxlvt(void) |
242 | { |
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243 | unsigned int v, ver, maxlvt; |
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244 | |||
245 | v = apic_read(APIC_LVR); |
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246 | ver = GET_APIC_VERSION(v); |
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247 | /* 82489DXs do not report # of LVT entries. */ |
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248 | maxlvt = APIC_INTEGRATED(ver) ? GET_APIC_MAXLVT(v) : 2; |
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249 | return maxlvt; |
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250 | } |
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251 | |||
304 | giacomo | 252 | /* Clear local APIC, from Linux kernel */ |
299 | giacomo | 253 | void clear_local_APIC(void) |
254 | { |
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255 | int maxlvt; |
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256 | unsigned long v; |
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257 | |||
258 | maxlvt = apic_get_maxlvt(); |
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259 | |||
260 | /* |
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261 | * Masking an LVT entry on a P6 can trigger a local APIC error |
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262 | * if the vector is zero. Mask LVTERR first to prevent this. |
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263 | */ |
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264 | if (maxlvt >= 3) { |
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265 | v = 0xFF; /* any non-zero vector will do */ |
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266 | apic_write_around(APIC_LVTERR, v | APIC_LVT_MASKED); |
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267 | } |
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268 | /* |
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269 | * Careful: we have to set masks only first to deassert |
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270 | * any level-triggered sources. |
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271 | */ |
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272 | v = apic_read(APIC_LVTT); |
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273 | apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); |
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274 | v = apic_read(APIC_LVT0); |
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275 | apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED); |
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276 | v = apic_read(APIC_LVT1); |
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277 | apic_write_around(APIC_LVT1, v | APIC_LVT_MASKED); |
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278 | if (maxlvt >= 4) { |
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279 | v = apic_read(APIC_LVTPC); |
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280 | apic_write_around(APIC_LVTPC, v | APIC_LVT_MASKED); |
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281 | } |
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282 | |||
283 | /* |
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284 | * Clean APIC state for other OSs: |
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285 | */ |
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286 | apic_write_around(APIC_LVTT, APIC_LVT_MASKED); |
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287 | apic_write_around(APIC_LVT0, APIC_LVT_MASKED); |
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288 | apic_write_around(APIC_LVT1, APIC_LVT_MASKED); |
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289 | if (maxlvt >= 3) |
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290 | apic_write_around(APIC_LVTERR, APIC_LVT_MASKED); |
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291 | if (maxlvt >= 4) |
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292 | apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); |
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293 | v = GET_APIC_VERSION(apic_read(APIC_LVR)); |
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294 | if (APIC_INTEGRATED(v)) { /* !82489DX */ |
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295 | if (maxlvt > 3) |
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296 | apic_write(APIC_ESR, 0); |
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297 | apic_read(APIC_ESR); |
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298 | } |
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299 | } |
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300 | |||
301 | void disable_local_APIC(void) |
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302 | { |
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303 | unsigned long value; |
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304 | |||
305 | clear_local_APIC(); |
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306 | |||
307 | /* |
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308 | * Disable APIC (implies clearing of registers |
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309 | * for 82489DX!). |
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310 | */ |
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311 | value = apic_read(APIC_SPIV); |
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312 | value &= ~APIC_SPIV_APIC_ENABLED; |
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313 | apic_write_around(APIC_SPIV, value); |
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314 | } |
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315 | |||
316 | #define SPURIOUS_APIC_VECTOR 0xFF |
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317 | |||
318 | /* |
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302 | giacomo | 319 | * Setup the local APIC, minimal code to run P6 APIC |
299 | giacomo | 320 | */ |
321 | void setup_local_APIC (void) |
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322 | { |
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301 | giacomo | 323 | unsigned long value; |
299 | giacomo | 324 | |
325 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ |
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326 | |||
327 | apic_write(APIC_ESR, 0); |
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328 | apic_write(APIC_ESR, 0); |
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329 | apic_write(APIC_ESR, 0); |
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330 | apic_write(APIC_ESR, 0); |
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331 | |||
301 | giacomo | 332 | value = APIC_SPIV_FOCUS_DISABLED | APIC_SPIV_APIC_ENABLED | SPURIOUS_APIC_VECTOR; |
333 | apic_write_around(APIC_SPIV, value); |
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299 | giacomo | 334 | |
301 | giacomo | 335 | value = APIC_DM_EXTINT | APIC_LVT_LEVEL_TRIGGER; |
336 | apic_write_around(APIC_LVT0, value); |
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299 | giacomo | 337 | |
301 | giacomo | 338 | value = APIC_DM_NMI; |
339 | apic_write_around(APIC_LVT1, value); |
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299 | giacomo | 340 | |
301 | giacomo | 341 | apic_write(APIC_ESR, 0); |
299 | giacomo | 342 | |
343 | } |
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344 | |||
345 | void disable_APIC_timer(void) |
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346 | { |
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347 | unsigned long v; |
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348 | |||
349 | v = apic_read(APIC_LVTT); |
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350 | apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); |
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351 | |||
352 | } |
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353 | |||
354 | void enable_APIC_timer(void) |
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355 | { |
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356 | unsigned long v; |
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357 | |||
358 | v = apic_read(APIC_LVTT); |
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359 | apic_write_around(APIC_LVTT, v & ~APIC_LVT_MASKED); |
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360 | |||
361 | } |
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362 | |||
304 | giacomo | 363 | #define LOCAL_TIMER_VECTOR 0x39 |
302 | giacomo | 364 | |
303 | giacomo | 365 | /* Set APIC Timer... from Linux kernel */ |
366 | void setup_APIC_timer() |
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299 | giacomo | 367 | { |
314 | giacomo | 368 | unsigned int lvtt1_value; |
299 | giacomo | 369 | |
370 | lvtt1_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | |
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371 | APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; |
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372 | apic_write_around(APIC_LVTT, lvtt1_value); |
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373 | |||
374 | /* |
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375 | * Divide PICLK by 1 |
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376 | */ |
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312 | giacomo | 377 | apic_write_around(APIC_TDCR, APIC_TDR_DIV_1); |
303 | giacomo | 378 | |
314 | giacomo | 379 | apic_write_around(APIC_TMICT, MAX_DWORD); |
303 | giacomo | 380 | |
381 | disable_APIC_timer(); |
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299 | giacomo | 382 | } |
383 | |||
384 | #define APIC_LIMIT 0xFF000000 |
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303 | giacomo | 385 | #define APIC_SET_LIMIT 10 |
299 | giacomo | 386 | |
387 | void ll_calibrate_apic(void) |
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388 | { |
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389 | |||
390 | unsigned int apic_start = 0, apic_end = 0, dapic; |
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305 | giacomo | 391 | unsigned long long tsc_start = 0, tsc_end = 0, dtsc; |
299 | giacomo | 392 | unsigned int tmp_value; |
393 | |||
312 | giacomo | 394 | tmp_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | LOCAL_TIMER_VECTOR; |
395 | apic_write_around(APIC_LVTT, tmp_value); |
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299 | giacomo | 396 | |
312 | giacomo | 397 | apic_write_around(APIC_TDCR, APIC_TDR_DIV_1); |
398 | |||
299 | giacomo | 399 | apic_write(APIC_TMICT, MAX_DWORD); |
400 | |||
312 | giacomo | 401 | enable_APIC_timer(); |
402 | |||
299 | giacomo | 403 | barrier(); |
404 | rdtscll(tsc_start); |
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405 | barrier(); |
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406 | apic_start = apic_read(APIC_TMCCT); |
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407 | barrier(); |
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408 | |||
409 | while (apic_read(APIC_TMCCT) > APIC_LIMIT) { |
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410 | barrier(); |
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411 | rdtscll(tsc_end); |
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412 | } |
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413 | |||
414 | barrier(); |
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415 | rdtscll(tsc_end); |
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416 | barrier(); |
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417 | apic_end = apic_read(APIC_TMCCT); |
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418 | barrier(); |
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419 | |||
312 | giacomo | 420 | disable_APIC_timer(); |
421 | |||
299 | giacomo | 422 | dtsc = tsc_end - tsc_start; |
423 | dapic = apic_start - apic_end; |
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424 | |||
305 | giacomo | 425 | apic_clk_per_msec = (unsigned long long)(clk_per_msec) * (unsigned long long)(dapic) / dtsc; |
312 | giacomo | 426 | apic_set_limit = ((apic_clk_per_msec / 100) != 0) ? (apic_clk_per_msec/100) : APIC_SET_LIMIT; |
303 | giacomo | 427 | |
305 | giacomo | 428 | message("Calibrated APIC Clk/msec = %10d\n",apic_clk_per_msec); |
299 | giacomo | 429 | |
430 | } |
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431 | |||
120 | giacomo | 432 | void ll_init_advtimer() |
433 | { |
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305 | giacomo | 434 | #ifdef __APIC__ |
435 | unsigned long msr_low_orig, tmp; |
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436 | #endif |
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120 | giacomo | 437 | |
305 | giacomo | 438 | #ifdef __TSC__ |
120 | giacomo | 439 | |
264 | giacomo | 440 | #ifdef CALIBRATE_USING_CMOS |
441 | ll_calibrate_tsc_cmos(); |
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442 | #else |
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443 | ll_calibrate_tsc(); |
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444 | #endif |
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445 | |||
120 | giacomo | 446 | rdtscll(init_tsc); // Read start TSC |
447 | init_nsec = 0; |
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448 | |||
305 | giacomo | 449 | #ifdef __APIC__ |
299 | giacomo | 450 | |
451 | rdmsr(APIC_BASE_MSR, msr_low_orig, tmp); |
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452 | wrmsr(APIC_BASE_MSR, msr_low_orig|(1<<11), 0); |
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453 | |||
301 | giacomo | 454 | clear_local_APIC(); |
299 | giacomo | 455 | |
301 | giacomo | 456 | ll_calibrate_apic(); |
457 | |||
299 | giacomo | 458 | setup_local_APIC(); |
303 | giacomo | 459 | |
460 | setup_APIC_timer(); |
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299 | giacomo | 461 | |
305 | giacomo | 462 | #endif |
299 | giacomo | 463 | |
305 | giacomo | 464 | #endif |
120 | giacomo | 465 | |
466 | } |
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467 | |||
301 | giacomo | 468 | void ll_restore_adv() |
120 | giacomo | 469 | { |
302 | giacomo | 470 | /* Disable APIC */ |
305 | giacomo | 471 | #ifdef __APIC__ |
472 | unsigned int msr_low_orig, tmp; |
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301 | giacomo | 473 | |
317 | giacomo | 474 | cli(); |
301 | giacomo | 475 | |
476 | disable_APIC_timer(); |
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477 | |||
478 | rdmsr(APIC_BASE_MSR, msr_low_orig, tmp); |
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479 | wrmsr(APIC_BASE_MSR, msr_low_orig&~(1<<11), 0); |
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480 | |||
481 | sti(); |
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482 | |||
305 | giacomo | 483 | #endif |
301 | giacomo | 484 | |
120 | giacomo | 485 | } |