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Rev | Author | Line No. | Line |
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120 | giacomo | 1 | /* Project: OSLib |
2 | * Description: The OS Construction Kit |
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3 | * Date: 1.6.2000 |
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4 | * Idea by: Luca Abeni & Gerardo Lamastra |
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5 | * |
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6 | * OSLib is an SO project aimed at developing a common, easy-to-use |
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7 | * low-level infrastructure for developing OS kernels and Embedded |
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8 | * Applications; it partially derives from the HARTIK project but it |
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9 | * currently is independently developed. |
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10 | * |
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11 | * OSLib is distributed under GPL License, and some of its code has |
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12 | * been derived from the Linux kernel source; also some important |
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13 | * ideas come from studying the DJGPP go32 extender. |
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14 | * |
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15 | * We acknowledge the Linux Community, Free Software Foundation, |
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16 | * D.J. Delorie and all the other developers who believe in the |
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17 | * freedom of software and ideas. |
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18 | * |
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19 | * For legalese, check out the included GPL license. |
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20 | */ |
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21 | |||
22 | /* Advanced Timer Managment |
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23 | * Author: Giacomo Guidi <giacomo@gandalf.sssup.it> |
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24 | */ |
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25 | |||
26 | #include <ll/i386/stdlib.h> |
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27 | #include <ll/i386/error.h> |
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28 | #include <ll/sys/ll/ll-data.h> |
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29 | #include <ll/sys/ll/ll-func.h> |
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30 | #include <ll/i386/pic.h> |
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299 | giacomo | 31 | #include <ll/i386/apic.h> |
305 | giacomo | 32 | #include <ll/i386/64bit.h> |
120 | giacomo | 33 | #include <ll/sys/ll/event.h> |
34 | #include <ll/sys/ll/time.h> |
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305 | giacomo | 35 | #include <ll/i386/advtimer.h> |
120 | giacomo | 36 | |
264 | giacomo | 37 | #define CALIBRATE_USING_CMOS |
38 | |||
305 | giacomo | 39 | unsigned long long init_tsc; |
40 | unsigned long long * ptr_init_tsc = &init_tsc; |
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120 | giacomo | 41 | |
333 | giacomo | 42 | unsigned long long init_nsec; |
305 | giacomo | 43 | unsigned long long * ptr_init_nsec = &init_nsec; |
120 | giacomo | 44 | |
305 | giacomo | 45 | unsigned int clk_per_msec = 0; |
46 | unsigned int apic_clk_per_msec = 0; |
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47 | unsigned int apic_set_limit = 0; |
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194 | giacomo | 48 | |
336 | giacomo | 49 | /* Precalcolated const |
50 | used in ll_read_timer */ |
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51 | unsigned int clk_opt_0 = 0; |
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329 | giacomo | 52 | unsigned int clk_opt_1 = 0; |
53 | unsigned int clk_opt_2 = 0; |
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54 | unsigned int clk_opt_3 = 0; |
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55 | unsigned int clk_opt_4 = 0; |
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336 | giacomo | 56 | unsigned int clk_opt_5 = 0; |
329 | giacomo | 57 | |
120 | giacomo | 58 | unsigned char save_CMOS_regA; |
59 | unsigned char save_CMOS_regB; |
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60 | |||
619 | mauro | 61 | unsigned char X86_tsc = 0; |
62 | unsigned char X86_apic = 0; |
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63 | unsigned char use_tsc = 0; |
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64 | unsigned char use_apic = 0; |
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65 | |||
120 | giacomo | 66 | #ifdef CONFIG_MELAN |
67 | # define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ |
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68 | #else |
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249 | giacomo | 69 | # define CLOCK_TICK_RATE 1193182 /* Underlying HZ */ |
120 | giacomo | 70 | #endif |
71 | |||
248 | giacomo | 72 | #define COUNTER_END 100 |
120 | giacomo | 73 | |
245 | giacomo | 74 | #define barrier() __asm__ __volatile__("" ::: "memory"); |
75 | |||
120 | giacomo | 76 | //TSC Calibration (idea from the linux kernel code) |
77 | void ll_calibrate_tsc(void) |
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78 | { |
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79 | |||
305 | giacomo | 80 | unsigned long long start; |
81 | unsigned long long end; |
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82 | unsigned long long dtsc; |
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120 | giacomo | 83 | |
305 | giacomo | 84 | unsigned int start_8253, end_8253, delta_8253; |
120 | giacomo | 85 | |
248 | giacomo | 86 | outp(0x61, (inp(0x61) & ~0x02) | 0x01); |
120 | giacomo | 87 | |
88 | outp(0x43,0xB0); /* binary, mode 0, LSB/MSB, Ch 2 */ |
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238 | giacomo | 89 | outp(0x42,0xFF); /* LSB of count */ |
90 | outp(0x42,0xFF); /* MSB of count */ |
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242 | giacomo | 91 | |
619 | mauro | 92 | barrier(); |
93 | rdtscll(start); |
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94 | barrier(); |
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95 | outp(0x43,0x00); |
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243 | giacomo | 96 | start_8253 = inp(0x42); |
97 | start_8253 |= inp(0x42) << 8; |
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619 | mauro | 98 | barrier(); |
99 | rdtscll(start); |
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100 | barrier(); |
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243 | giacomo | 101 | |
102 | do { |
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103 | outp(0x43,0x00); |
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104 | end_8253 = inp(0x42); |
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105 | end_8253 |= inp(0x42) << 8; |
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106 | } while (end_8253 > COUNTER_END); |
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107 | |||
619 | mauro | 108 | barrier(); |
109 | rdtscll(end); |
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110 | barrier(); |
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243 | giacomo | 111 | outp(0x43,0x00); |
112 | end_8253 = inp(0x42); |
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113 | end_8253 |= inp(0x42) << 8; |
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619 | mauro | 114 | barrier(); |
115 | rdtscll(end); |
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116 | barrier(); |
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243 | giacomo | 117 | |
118 | //Delta TSC |
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619 | mauro | 119 | dtsc = end - start; |
243 | giacomo | 120 | |
121 | //Delta PIT |
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264 | giacomo | 122 | delta_8253 = start_8253 - end_8253; |
243 | giacomo | 123 | |
242 | giacomo | 124 | if (delta_8253 > 0x20000) { |
120 | giacomo | 125 | message("Error calculating Delta PIT\n"); |
126 | ll_abort(10); |
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127 | } |
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128 | |||
305 | giacomo | 129 | message("Delta TSC = %10d\n",(int)dtsc); |
120 | giacomo | 130 | |
305 | giacomo | 131 | message("Delta PIT = %10d\n",delta_8253); |
120 | giacomo | 132 | |
252 | giacomo | 133 | clk_per_msec = dtsc * CLOCK_TICK_RATE / delta_8253 / 1000; |
120 | giacomo | 134 | |
305 | giacomo | 135 | message("Calibrated Clk_per_msec = %10d\n",clk_per_msec); |
120 | giacomo | 136 | } |
137 | |||
264 | giacomo | 138 | #define CMOS_INIT 0 |
139 | #define CMOS_BEGIN 1 |
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140 | #define CMOS_START 2 |
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141 | #define CMOS_END 3 |
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142 | |||
143 | int cmos_calibrate_status = CMOS_INIT; |
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305 | giacomo | 144 | unsigned long long irq8_start; |
145 | unsigned long long irq8_end; |
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264 | giacomo | 146 | |
299 | giacomo | 147 | void calibrate_tsc_IRQ8(void *p) |
264 | giacomo | 148 | { |
619 | mauro | 149 | unsigned char set; |
264 | giacomo | 150 | |
619 | mauro | 151 | CMOS_READ(0x0C,set); |
264 | giacomo | 152 | |
619 | mauro | 153 | barrier(); |
154 | rdtscll(irq8_end); |
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155 | barrier(); |
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264 | giacomo | 156 | |
619 | mauro | 157 | if (cmos_calibrate_status == CMOS_START) { |
158 | cmos_calibrate_status = CMOS_END; |
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159 | } |
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264 | giacomo | 160 | |
619 | mauro | 161 | if (cmos_calibrate_status == CMOS_BEGIN) { |
162 | irq8_start = irq8_end; |
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163 | cmos_calibrate_status = CMOS_START; |
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164 | } |
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264 | giacomo | 165 | |
619 | mauro | 166 | if (cmos_calibrate_status == CMOS_INIT) { |
167 | cmos_calibrate_status = CMOS_BEGIN; |
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168 | } |
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264 | giacomo | 169 | } |
170 | |||
171 | //TSC Calibration using RTC |
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172 | void ll_calibrate_tsc_cmos(void) |
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173 | { |
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619 | mauro | 174 | unsigned long long dtsc; |
264 | giacomo | 175 | |
619 | mauro | 176 | irq_bind(8, calibrate_tsc_IRQ8, INT_FORCE); |
264 | giacomo | 177 | |
619 | mauro | 178 | CMOS_READ(0x0A,save_CMOS_regA); |
179 | CMOS_READ(0x0B,save_CMOS_regB); |
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180 | |||
181 | CMOS_WRITE(0x0A,0x2F); // Set 2 Hz Periodic Interrupt |
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182 | CMOS_WRITE(0x0B,0x42); // Enable Interrupt |
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264 | giacomo | 183 | |
619 | mauro | 184 | irq_unmask(8); |
317 | giacomo | 185 | |
619 | mauro | 186 | sti(); |
264 | giacomo | 187 | |
619 | mauro | 188 | while (cmos_calibrate_status != CMOS_END) { |
189 | barrier(); |
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190 | } |
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317 | giacomo | 191 | |
619 | mauro | 192 | cli(); |
264 | giacomo | 193 | |
619 | mauro | 194 | dtsc = irq8_end - irq8_start; |
264 | giacomo | 195 | |
619 | mauro | 196 | clk_per_msec = dtsc / 500; |
197 | clk_opt_0 = (unsigned int)(dtsc); |
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198 | clk_opt_1 = (unsigned int)((unsigned long long)(dtsc << 1)); |
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199 | clk_opt_2 = (unsigned int)((unsigned long long)(dtsc << 33) / 1000000000L); |
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200 | clk_opt_3 = (unsigned int)((unsigned long long)(dtsc << 32) / 1000000000L); |
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201 | clk_opt_4 = (unsigned int)((unsigned long long)(dtsc << 31) / 1000000000L); |
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202 | clk_opt_5 = (unsigned int)((unsigned long long)(dtsc << 30) / 1000000000L); |
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264 | giacomo | 203 | |
619 | mauro | 204 | message("Calibrated CPU Clk/msec = %10u\n",clk_per_msec); |
264 | giacomo | 205 | |
619 | mauro | 206 | #ifdef __O1000__ |
207 | if (clk_per_msec < 1000000) { |
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208 | message("Timer Optimization CPU < 1 GHz\n"); |
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209 | } else { |
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210 | message("Bad Timer Optimization\n"); |
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211 | ll_abort(66); |
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212 | } |
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213 | #endif |
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329 | giacomo | 214 | |
619 | mauro | 215 | #ifdef __O2000__ |
216 | if (clk_per_msec < 2000000 && clk_per_msec >= 1000000) { |
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217 | message("Timer Optimization 1 GHz < CPU < 2 GHz\n"); |
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218 | } else { |
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219 | message("Bad Timer Optimization\n"); |
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220 | ll_abort(66); |
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221 | } |
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222 | #endif |
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329 | giacomo | 223 | |
619 | mauro | 224 | #ifdef __O4000__ |
225 | if (clk_per_msec < 4000000 && clk_per_msec >= 2000000) { |
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226 | message("Timer Optimization 2 GHz < CPU < 4 GHz\n"); |
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227 | } else { |
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228 | message("Bad Timer Optimization\n"); |
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229 | ll_abort(66); |
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230 | } |
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231 | #endif |
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329 | giacomo | 232 | |
619 | mauro | 233 | irq_mask(8); |
264 | giacomo | 234 | |
619 | mauro | 235 | CMOS_WRITE(0x0A,save_CMOS_regA); |
236 | CMOS_WRITE(0x0B,save_CMOS_regB); |
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264 | giacomo | 237 | } |
238 | |||
299 | giacomo | 239 | int apic_get_maxlvt(void) |
240 | { |
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241 | unsigned int v, ver, maxlvt; |
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242 | |||
243 | v = apic_read(APIC_LVR); |
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244 | ver = GET_APIC_VERSION(v); |
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245 | /* 82489DXs do not report # of LVT entries. */ |
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246 | maxlvt = APIC_INTEGRATED(ver) ? GET_APIC_MAXLVT(v) : 2; |
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247 | return maxlvt; |
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248 | } |
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249 | |||
304 | giacomo | 250 | /* Clear local APIC, from Linux kernel */ |
299 | giacomo | 251 | void clear_local_APIC(void) |
252 | { |
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253 | int maxlvt; |
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254 | unsigned long v; |
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255 | |||
256 | maxlvt = apic_get_maxlvt(); |
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257 | |||
258 | /* |
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259 | * Masking an LVT entry on a P6 can trigger a local APIC error |
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260 | * if the vector is zero. Mask LVTERR first to prevent this. |
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261 | */ |
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262 | if (maxlvt >= 3) { |
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263 | v = 0xFF; /* any non-zero vector will do */ |
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264 | apic_write_around(APIC_LVTERR, v | APIC_LVT_MASKED); |
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265 | } |
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266 | /* |
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267 | * Careful: we have to set masks only first to deassert |
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268 | * any level-triggered sources. |
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269 | */ |
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270 | v = apic_read(APIC_LVTT); |
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271 | apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); |
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272 | v = apic_read(APIC_LVT0); |
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273 | apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED); |
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274 | v = apic_read(APIC_LVT1); |
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275 | apic_write_around(APIC_LVT1, v | APIC_LVT_MASKED); |
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276 | if (maxlvt >= 4) { |
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277 | v = apic_read(APIC_LVTPC); |
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278 | apic_write_around(APIC_LVTPC, v | APIC_LVT_MASKED); |
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279 | } |
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280 | |||
281 | /* |
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282 | * Clean APIC state for other OSs: |
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283 | */ |
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284 | apic_write_around(APIC_LVTT, APIC_LVT_MASKED); |
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285 | apic_write_around(APIC_LVT0, APIC_LVT_MASKED); |
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286 | apic_write_around(APIC_LVT1, APIC_LVT_MASKED); |
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287 | if (maxlvt >= 3) |
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288 | apic_write_around(APIC_LVTERR, APIC_LVT_MASKED); |
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289 | if (maxlvt >= 4) |
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290 | apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); |
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291 | v = GET_APIC_VERSION(apic_read(APIC_LVR)); |
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292 | if (APIC_INTEGRATED(v)) { /* !82489DX */ |
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293 | if (maxlvt > 3) |
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294 | apic_write(APIC_ESR, 0); |
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295 | apic_read(APIC_ESR); |
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296 | } |
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297 | } |
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298 | |||
299 | void disable_local_APIC(void) |
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300 | { |
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301 | unsigned long value; |
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302 | |||
303 | clear_local_APIC(); |
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304 | |||
305 | /* |
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306 | * Disable APIC (implies clearing of registers |
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307 | * for 82489DX!). |
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308 | */ |
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309 | value = apic_read(APIC_SPIV); |
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310 | value &= ~APIC_SPIV_APIC_ENABLED; |
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311 | apic_write_around(APIC_SPIV, value); |
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312 | } |
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313 | |||
314 | #define SPURIOUS_APIC_VECTOR 0xFF |
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315 | |||
316 | /* |
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302 | giacomo | 317 | * Setup the local APIC, minimal code to run P6 APIC |
299 | giacomo | 318 | */ |
319 | void setup_local_APIC (void) |
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320 | { |
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301 | giacomo | 321 | unsigned long value; |
299 | giacomo | 322 | |
323 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ |
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619 | mauro | 324 | |
299 | giacomo | 325 | apic_write(APIC_ESR, 0); |
326 | apic_write(APIC_ESR, 0); |
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327 | apic_write(APIC_ESR, 0); |
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328 | apic_write(APIC_ESR, 0); |
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619 | mauro | 329 | |
301 | giacomo | 330 | value = APIC_SPIV_FOCUS_DISABLED | APIC_SPIV_APIC_ENABLED | SPURIOUS_APIC_VECTOR; |
331 | apic_write_around(APIC_SPIV, value); |
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299 | giacomo | 332 | |
619 | mauro | 333 | value = APIC_DM_EXTINT | APIC_LVT_LEVEL_TRIGGER; |
334 | apic_write_around(APIC_LVT0, value); |
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299 | giacomo | 335 | |
619 | mauro | 336 | value = APIC_DM_NMI; |
337 | apic_write_around(APIC_LVT1, value); |
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299 | giacomo | 338 | |
619 | mauro | 339 | apic_write(APIC_ESR, 0); |
299 | giacomo | 340 | } |
341 | |||
342 | void disable_APIC_timer(void) |
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343 | { |
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619 | mauro | 344 | unsigned long v; |
299 | giacomo | 345 | |
619 | mauro | 346 | v = apic_read(APIC_LVTT); |
347 | apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); |
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299 | giacomo | 348 | } |
349 | |||
350 | void enable_APIC_timer(void) |
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351 | { |
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619 | mauro | 352 | unsigned long v; |
299 | giacomo | 353 | |
619 | mauro | 354 | v = apic_read(APIC_LVTT); |
355 | apic_write_around(APIC_LVTT, v & ~APIC_LVT_MASKED); |
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299 | giacomo | 356 | } |
357 | |||
304 | giacomo | 358 | #define LOCAL_TIMER_VECTOR 0x39 |
302 | giacomo | 359 | |
303 | giacomo | 360 | /* Set APIC Timer... from Linux kernel */ |
361 | void setup_APIC_timer() |
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299 | giacomo | 362 | { |
619 | mauro | 363 | unsigned int lvtt1_value; |
303 | giacomo | 364 | |
619 | mauro | 365 | lvtt1_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | |
366 | APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; |
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367 | apic_write_around(APIC_LVTT, lvtt1_value); |
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303 | giacomo | 368 | |
619 | mauro | 369 | /* |
370 | * Divide PICLK by 1 |
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371 | */ |
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372 | apic_write_around(APIC_TDCR, APIC_TDR_DIV_1); |
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373 | |||
374 | apic_write_around(APIC_TMICT, MAX_DWORD); |
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375 | |||
376 | disable_APIC_timer(); |
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299 | giacomo | 377 | } |
378 | |||
379 | #define APIC_LIMIT 0xFF000000 |
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303 | giacomo | 380 | #define APIC_SET_LIMIT 10 |
299 | giacomo | 381 | |
382 | void ll_calibrate_apic(void) |
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383 | { |
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619 | mauro | 384 | unsigned int apic_start = 0, apic_end = 0, dapic; |
385 | unsigned long long tsc_start = 0, tsc_end = 0, dtsc; |
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386 | unsigned int tmp_value; |
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299 | giacomo | 387 | |
619 | mauro | 388 | tmp_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | LOCAL_TIMER_VECTOR; |
389 | apic_write_around(APIC_LVTT, tmp_value); |
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299 | giacomo | 390 | |
619 | mauro | 391 | apic_write_around(APIC_TDCR, APIC_TDR_DIV_1); |
299 | giacomo | 392 | |
619 | mauro | 393 | apic_write(APIC_TMICT, MAX_DWORD); |
312 | giacomo | 394 | |
619 | mauro | 395 | enable_APIC_timer(); |
299 | giacomo | 396 | |
619 | mauro | 397 | barrier(); |
398 | rdtscll(tsc_start); |
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399 | barrier(); |
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400 | apic_start = apic_read(APIC_TMCCT); |
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401 | barrier(); |
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312 | giacomo | 402 | |
619 | mauro | 403 | while (apic_read(APIC_TMCCT) > APIC_LIMIT) { |
404 | barrier(); |
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405 | rdtscll(tsc_end); |
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406 | } |
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299 | giacomo | 407 | |
619 | mauro | 408 | barrier(); |
409 | rdtscll(tsc_end); |
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410 | barrier(); |
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411 | apic_end = apic_read(APIC_TMCCT); |
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412 | barrier(); |
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299 | giacomo | 413 | |
619 | mauro | 414 | disable_APIC_timer(); |
312 | giacomo | 415 | |
619 | mauro | 416 | dtsc = tsc_end - tsc_start; |
417 | dapic = apic_start - apic_end; |
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418 | |||
419 | apic_clk_per_msec = (unsigned long long)(clk_per_msec) * (unsigned long long)(dapic) / dtsc; |
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420 | apic_set_limit = ((apic_clk_per_msec / 100) != 0) ? (apic_clk_per_msec/100) : APIC_SET_LIMIT; |
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299 | giacomo | 421 | |
619 | mauro | 422 | message("Calibrated APIC Clk/msec = %10d\n",apic_clk_per_msec); |
299 | giacomo | 423 | } |
424 | |||
120 | giacomo | 425 | void ll_init_advtimer() |
426 | { |
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619 | mauro | 427 | unsigned long msr_low_orig, tmp; |
120 | giacomo | 428 | |
619 | mauro | 429 | #ifdef __APIC__ |
430 | use_apic = X86_apic; |
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431 | #endif |
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432 | |||
433 | #ifdef __TSC__ |
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434 | use_tsc = X86_tsc; |
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435 | #endif |
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436 | |||
437 | if (use_tsc) { |
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120 | giacomo | 438 | |
619 | mauro | 439 | #ifdef CALIBRATE_USING_CMOS |
440 | ll_calibrate_tsc_cmos(); |
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441 | #else |
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442 | ll_calibrate_tsc(); |
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443 | #endif |
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264 | giacomo | 444 | |
619 | mauro | 445 | rdtscll(init_tsc); // Read start TSC |
446 | init_nsec = 0; |
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120 | giacomo | 447 | |
619 | mauro | 448 | if (use_apic) { |
449 | rdmsr(APIC_BASE_MSR, msr_low_orig, tmp); |
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450 | wrmsr(APIC_BASE_MSR, msr_low_orig|(1<<11), 0); |
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299 | giacomo | 451 | |
619 | mauro | 452 | clear_local_APIC(); |
299 | giacomo | 453 | |
619 | mauro | 454 | ll_calibrate_apic(); |
299 | giacomo | 455 | |
619 | mauro | 456 | setup_local_APIC(); |
303 | giacomo | 457 | |
619 | mauro | 458 | setup_APIC_timer(); |
459 | } |
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460 | } |
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120 | giacomo | 461 | } |
462 | |||
301 | giacomo | 463 | void ll_restore_adv() |
120 | giacomo | 464 | { |
646 | mauro | 465 | SYS_FLAGS f; |
466 | |||
467 | /* Disable APIC */ |
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619 | mauro | 468 | if (use_apic) { |
646 | mauro | 469 | unsigned int msr_low_orig, tmp; |
301 | giacomo | 470 | |
646 | mauro | 471 | f = ll_fsave(); |
301 | giacomo | 472 | |
646 | mauro | 473 | disable_APIC_timer(); |
301 | giacomo | 474 | |
475 | rdmsr(APIC_BASE_MSR, msr_low_orig, tmp); |
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646 | mauro | 476 | wrmsr(APIC_BASE_MSR, msr_low_orig&~(1<<11), 0); |
301 | giacomo | 477 | |
646 | mauro | 478 | ll_frestore(f); |
619 | mauro | 479 | } |
120 | giacomo | 480 | } |
646 | mauro | 481 | |
482 | void ll_scale_advtimer(unsigned int old_f, unsigned int new_f) |
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483 | { |
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484 | unsigned long long dtsc; |
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485 | unsigned long temp; |
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486 | SYS_FLAGS f; |
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487 | |||
488 | f = ll_fsave(); |
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489 | |||
490 | mul32div32to32(clk_per_msec,new_f,old_f,temp); /* TODO */ |
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491 | clk_per_msec = temp; |
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492 | dtsc = clk_per_msec * 500; |
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493 | clk_opt_0 = (unsigned int)(dtsc); |
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494 | clk_opt_1 = (unsigned int)((unsigned long long)(dtsc << 1)); |
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495 | clk_opt_2 = (unsigned int)((unsigned long long)(dtsc << 33) / 1000000000L); |
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496 | clk_opt_3 = (unsigned int)((unsigned long long)(dtsc << 32) / 1000000000L); |
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497 | clk_opt_4 = (unsigned int)((unsigned long long)(dtsc << 31) / 1000000000L); |
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498 | clk_opt_5 = (unsigned int)((unsigned long long)(dtsc << 30) / 1000000000L); |
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499 | |||
500 | ll_frestore(f); |
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501 | } |