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Rev | Author | Line No. | Line |
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120 | giacomo | 1 | /* Project: OSLib |
2 | * Description: The OS Construction Kit |
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3 | * Date: 1.6.2000 |
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4 | * Idea by: Luca Abeni & Gerardo Lamastra |
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5 | * |
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6 | * OSLib is an SO project aimed at developing a common, easy-to-use |
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7 | * low-level infrastructure for developing OS kernels and Embedded |
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8 | * Applications; it partially derives from the HARTIK project but it |
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9 | * currently is independently developed. |
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10 | * |
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11 | * OSLib is distributed under GPL License, and some of its code has |
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12 | * been derived from the Linux kernel source; also some important |
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13 | * ideas come from studying the DJGPP go32 extender. |
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14 | * |
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15 | * We acknowledge the Linux Community, Free Software Foundation, |
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16 | * D.J. Delorie and all the other developers who believe in the |
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17 | * freedom of software and ideas. |
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18 | * |
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19 | * For legalese, check out the included GPL license. |
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20 | */ |
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21 | |||
22 | /* Advanced Timer Managment |
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23 | * Author: Giacomo Guidi <giacomo@gandalf.sssup.it> |
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24 | */ |
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25 | |||
26 | #include <ll/i386/stdlib.h> |
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27 | #include <ll/i386/error.h> |
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28 | #include <ll/sys/ll/ll-data.h> |
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29 | #include <ll/sys/ll/ll-func.h> |
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30 | #include <ll/i386/pic.h> |
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299 | giacomo | 31 | #include <ll/i386/apic.h> |
305 | giacomo | 32 | #include <ll/i386/64bit.h> |
120 | giacomo | 33 | #include <ll/sys/ll/event.h> |
34 | #include <ll/sys/ll/time.h> |
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305 | giacomo | 35 | #include <ll/i386/advtimer.h> |
120 | giacomo | 36 | |
264 | giacomo | 37 | #define CALIBRATE_USING_CMOS |
38 | |||
305 | giacomo | 39 | unsigned long long init_tsc; |
40 | unsigned long long * ptr_init_tsc = &init_tsc; |
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120 | giacomo | 41 | |
305 | giacomo | 42 | unsigned long long init_nsec; //Wraparound 292 years |
43 | unsigned long long * ptr_init_nsec = &init_nsec; |
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120 | giacomo | 44 | |
305 | giacomo | 45 | unsigned int clk_per_msec = 0; |
46 | unsigned int apic_clk_per_msec = 0; |
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47 | unsigned int apic_set_limit = 0; |
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194 | giacomo | 48 | |
120 | giacomo | 49 | unsigned char save_CMOS_regA; |
50 | unsigned char save_CMOS_regB; |
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51 | |||
52 | #ifdef CONFIG_MELAN |
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53 | # define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ |
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54 | #else |
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249 | giacomo | 55 | # define CLOCK_TICK_RATE 1193182 /* Underlying HZ */ |
120 | giacomo | 56 | #endif |
57 | |||
248 | giacomo | 58 | #define COUNTER_END 100 |
120 | giacomo | 59 | |
245 | giacomo | 60 | #define barrier() __asm__ __volatile__("" ::: "memory"); |
61 | |||
120 | giacomo | 62 | //TSC Calibration (idea from the linux kernel code) |
63 | void ll_calibrate_tsc(void) |
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64 | { |
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65 | |||
305 | giacomo | 66 | unsigned long long start; |
67 | unsigned long long end; |
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68 | unsigned long long dtsc; |
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120 | giacomo | 69 | |
305 | giacomo | 70 | unsigned int start_8253, end_8253, delta_8253; |
120 | giacomo | 71 | |
248 | giacomo | 72 | outp(0x61, (inp(0x61) & ~0x02) | 0x01); |
120 | giacomo | 73 | |
74 | outp(0x43,0xB0); /* binary, mode 0, LSB/MSB, Ch 2 */ |
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238 | giacomo | 75 | outp(0x42,0xFF); /* LSB of count */ |
76 | outp(0x42,0xFF); /* MSB of count */ |
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242 | giacomo | 77 | |
245 | giacomo | 78 | barrier(); |
79 | rdtscll(start); |
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80 | barrier(); |
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243 | giacomo | 81 | outp(0x43,0x00); |
82 | start_8253 = inp(0x42); |
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83 | start_8253 |= inp(0x42) << 8; |
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245 | giacomo | 84 | barrier(); |
264 | giacomo | 85 | rdtscll(start); |
86 | barrier(); |
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243 | giacomo | 87 | |
88 | do { |
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89 | |||
90 | outp(0x43,0x00); |
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91 | end_8253 = inp(0x42); |
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92 | end_8253 |= inp(0x42) << 8; |
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93 | |||
94 | } while (end_8253 > COUNTER_END); |
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95 | |||
245 | giacomo | 96 | barrier(); |
97 | rdtscll(end); |
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98 | barrier(); |
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243 | giacomo | 99 | outp(0x43,0x00); |
100 | end_8253 = inp(0x42); |
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101 | end_8253 |= inp(0x42) << 8; |
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245 | giacomo | 102 | barrier(); |
264 | giacomo | 103 | rdtscll(end); |
104 | barrier(); |
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243 | giacomo | 105 | |
106 | //Delta TSC |
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244 | giacomo | 107 | dtsc = end - start; |
243 | giacomo | 108 | |
109 | //Delta PIT |
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264 | giacomo | 110 | delta_8253 = start_8253 - end_8253; |
243 | giacomo | 111 | |
242 | giacomo | 112 | if (delta_8253 > 0x20000) { |
120 | giacomo | 113 | message("Error calculating Delta PIT\n"); |
114 | ll_abort(10); |
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115 | } |
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116 | |||
305 | giacomo | 117 | message("Delta TSC = %10d\n",(int)dtsc); |
120 | giacomo | 118 | |
305 | giacomo | 119 | message("Delta PIT = %10d\n",delta_8253); |
120 | giacomo | 120 | |
252 | giacomo | 121 | clk_per_msec = dtsc * CLOCK_TICK_RATE / delta_8253 / 1000; |
120 | giacomo | 122 | |
305 | giacomo | 123 | message("Calibrated Clk_per_msec = %10d\n",clk_per_msec); |
120 | giacomo | 124 | |
125 | } |
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126 | |||
264 | giacomo | 127 | #define CMOS_INIT 0 |
128 | #define CMOS_BEGIN 1 |
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129 | #define CMOS_START 2 |
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130 | #define CMOS_END 3 |
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131 | |||
132 | int cmos_calibrate_status = CMOS_INIT; |
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305 | giacomo | 133 | unsigned long long irq8_start; |
134 | unsigned long long irq8_end; |
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264 | giacomo | 135 | |
299 | giacomo | 136 | void calibrate_tsc_IRQ8(void *p) |
264 | giacomo | 137 | { |
138 | |||
139 | unsigned char set; |
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140 | |||
141 | CMOS_READ(0x0C,set); |
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142 | |||
143 | barrier(); |
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144 | rdtscll(irq8_end); |
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145 | barrier(); |
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146 | |||
147 | if (cmos_calibrate_status == CMOS_START) { |
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148 | cmos_calibrate_status = CMOS_END; |
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149 | } |
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150 | |||
151 | if (cmos_calibrate_status == CMOS_BEGIN) { |
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152 | irq8_start = irq8_end; |
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153 | cmos_calibrate_status = CMOS_START; |
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154 | } |
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155 | |||
156 | if (cmos_calibrate_status == CMOS_INIT) { |
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157 | cmos_calibrate_status = CMOS_BEGIN; |
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158 | } |
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159 | |||
160 | } |
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161 | |||
162 | //TSC Calibration using RTC |
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163 | void ll_calibrate_tsc_cmos(void) |
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164 | { |
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165 | |||
305 | giacomo | 166 | unsigned long long dtsc; |
264 | giacomo | 167 | |
299 | giacomo | 168 | irq_bind(8, calibrate_tsc_IRQ8, INT_FORCE); |
264 | giacomo | 169 | |
170 | CMOS_READ(0x0A,save_CMOS_regA); |
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171 | CMOS_READ(0x0B,save_CMOS_regB); |
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172 | |||
173 | CMOS_WRITE(0x0A,0x2F); // Set 2 Hz Periodic Interrupt |
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174 | CMOS_WRITE(0x0B,0x42); // Enable Interrupt |
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175 | |||
176 | irq_unmask(8); |
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317 | giacomo | 177 | |
264 | giacomo | 178 | sti(); |
179 | |||
180 | while (cmos_calibrate_status != CMOS_END) { |
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181 | barrier(); |
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182 | } |
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317 | giacomo | 183 | |
184 | cli(); |
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264 | giacomo | 185 | |
186 | dtsc = irq8_end - irq8_start; |
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187 | |||
188 | clk_per_msec = dtsc / 500; |
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189 | |||
305 | giacomo | 190 | message("Calibrated CPU Clk/msec = %10d\n",clk_per_msec); |
264 | giacomo | 191 | |
192 | irq_mask(8); |
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193 | |||
194 | CMOS_WRITE(0x0A,save_CMOS_regA); |
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195 | CMOS_WRITE(0x0B,save_CMOS_regB); |
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196 | |||
197 | } |
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198 | |||
299 | giacomo | 199 | int apic_get_maxlvt(void) |
200 | { |
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201 | unsigned int v, ver, maxlvt; |
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202 | |||
203 | v = apic_read(APIC_LVR); |
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204 | ver = GET_APIC_VERSION(v); |
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205 | /* 82489DXs do not report # of LVT entries. */ |
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206 | maxlvt = APIC_INTEGRATED(ver) ? GET_APIC_MAXLVT(v) : 2; |
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207 | return maxlvt; |
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208 | } |
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209 | |||
304 | giacomo | 210 | /* Clear local APIC, from Linux kernel */ |
299 | giacomo | 211 | void clear_local_APIC(void) |
212 | { |
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213 | int maxlvt; |
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214 | unsigned long v; |
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215 | |||
216 | maxlvt = apic_get_maxlvt(); |
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217 | |||
218 | /* |
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219 | * Masking an LVT entry on a P6 can trigger a local APIC error |
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220 | * if the vector is zero. Mask LVTERR first to prevent this. |
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221 | */ |
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222 | if (maxlvt >= 3) { |
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223 | v = 0xFF; /* any non-zero vector will do */ |
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224 | apic_write_around(APIC_LVTERR, v | APIC_LVT_MASKED); |
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225 | } |
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226 | /* |
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227 | * Careful: we have to set masks only first to deassert |
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228 | * any level-triggered sources. |
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229 | */ |
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230 | v = apic_read(APIC_LVTT); |
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231 | apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); |
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232 | v = apic_read(APIC_LVT0); |
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233 | apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED); |
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234 | v = apic_read(APIC_LVT1); |
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235 | apic_write_around(APIC_LVT1, v | APIC_LVT_MASKED); |
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236 | if (maxlvt >= 4) { |
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237 | v = apic_read(APIC_LVTPC); |
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238 | apic_write_around(APIC_LVTPC, v | APIC_LVT_MASKED); |
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239 | } |
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240 | |||
241 | /* |
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242 | * Clean APIC state for other OSs: |
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243 | */ |
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244 | apic_write_around(APIC_LVTT, APIC_LVT_MASKED); |
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245 | apic_write_around(APIC_LVT0, APIC_LVT_MASKED); |
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246 | apic_write_around(APIC_LVT1, APIC_LVT_MASKED); |
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247 | if (maxlvt >= 3) |
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248 | apic_write_around(APIC_LVTERR, APIC_LVT_MASKED); |
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249 | if (maxlvt >= 4) |
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250 | apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); |
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251 | v = GET_APIC_VERSION(apic_read(APIC_LVR)); |
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252 | if (APIC_INTEGRATED(v)) { /* !82489DX */ |
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253 | if (maxlvt > 3) |
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254 | apic_write(APIC_ESR, 0); |
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255 | apic_read(APIC_ESR); |
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256 | } |
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257 | } |
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258 | |||
259 | void disable_local_APIC(void) |
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260 | { |
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261 | unsigned long value; |
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262 | |||
263 | clear_local_APIC(); |
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264 | |||
265 | /* |
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266 | * Disable APIC (implies clearing of registers |
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267 | * for 82489DX!). |
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268 | */ |
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269 | value = apic_read(APIC_SPIV); |
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270 | value &= ~APIC_SPIV_APIC_ENABLED; |
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271 | apic_write_around(APIC_SPIV, value); |
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272 | } |
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273 | |||
274 | #define SPURIOUS_APIC_VECTOR 0xFF |
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275 | |||
276 | /* |
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302 | giacomo | 277 | * Setup the local APIC, minimal code to run P6 APIC |
299 | giacomo | 278 | */ |
279 | void setup_local_APIC (void) |
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280 | { |
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301 | giacomo | 281 | unsigned long value; |
299 | giacomo | 282 | |
283 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ |
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284 | |||
285 | apic_write(APIC_ESR, 0); |
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286 | apic_write(APIC_ESR, 0); |
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287 | apic_write(APIC_ESR, 0); |
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288 | apic_write(APIC_ESR, 0); |
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289 | |||
301 | giacomo | 290 | value = APIC_SPIV_FOCUS_DISABLED | APIC_SPIV_APIC_ENABLED | SPURIOUS_APIC_VECTOR; |
291 | apic_write_around(APIC_SPIV, value); |
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299 | giacomo | 292 | |
301 | giacomo | 293 | value = APIC_DM_EXTINT | APIC_LVT_LEVEL_TRIGGER; |
294 | apic_write_around(APIC_LVT0, value); |
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299 | giacomo | 295 | |
301 | giacomo | 296 | value = APIC_DM_NMI; |
297 | apic_write_around(APIC_LVT1, value); |
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299 | giacomo | 298 | |
301 | giacomo | 299 | apic_write(APIC_ESR, 0); |
299 | giacomo | 300 | |
301 | } |
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302 | |||
303 | void disable_APIC_timer(void) |
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304 | { |
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305 | unsigned long v; |
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306 | |||
307 | v = apic_read(APIC_LVTT); |
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308 | apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); |
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309 | |||
310 | } |
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311 | |||
312 | void enable_APIC_timer(void) |
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313 | { |
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314 | unsigned long v; |
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315 | |||
316 | v = apic_read(APIC_LVTT); |
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317 | apic_write_around(APIC_LVTT, v & ~APIC_LVT_MASKED); |
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318 | |||
319 | } |
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320 | |||
304 | giacomo | 321 | #define LOCAL_TIMER_VECTOR 0x39 |
302 | giacomo | 322 | |
303 | giacomo | 323 | /* Set APIC Timer... from Linux kernel */ |
324 | void setup_APIC_timer() |
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299 | giacomo | 325 | { |
314 | giacomo | 326 | unsigned int lvtt1_value; |
299 | giacomo | 327 | |
328 | lvtt1_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | |
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329 | APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; |
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330 | apic_write_around(APIC_LVTT, lvtt1_value); |
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331 | |||
332 | /* |
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333 | * Divide PICLK by 1 |
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334 | */ |
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312 | giacomo | 335 | apic_write_around(APIC_TDCR, APIC_TDR_DIV_1); |
303 | giacomo | 336 | |
314 | giacomo | 337 | apic_write_around(APIC_TMICT, MAX_DWORD); |
303 | giacomo | 338 | |
339 | disable_APIC_timer(); |
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299 | giacomo | 340 | } |
341 | |||
342 | #define APIC_LIMIT 0xFF000000 |
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303 | giacomo | 343 | #define APIC_SET_LIMIT 10 |
299 | giacomo | 344 | |
345 | void ll_calibrate_apic(void) |
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346 | { |
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347 | |||
348 | unsigned int apic_start = 0, apic_end = 0, dapic; |
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305 | giacomo | 349 | unsigned long long tsc_start = 0, tsc_end = 0, dtsc; |
299 | giacomo | 350 | unsigned int tmp_value; |
351 | |||
312 | giacomo | 352 | tmp_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | LOCAL_TIMER_VECTOR; |
353 | apic_write_around(APIC_LVTT, tmp_value); |
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299 | giacomo | 354 | |
312 | giacomo | 355 | apic_write_around(APIC_TDCR, APIC_TDR_DIV_1); |
356 | |||
299 | giacomo | 357 | apic_write(APIC_TMICT, MAX_DWORD); |
358 | |||
312 | giacomo | 359 | enable_APIC_timer(); |
360 | |||
299 | giacomo | 361 | barrier(); |
362 | rdtscll(tsc_start); |
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363 | barrier(); |
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364 | apic_start = apic_read(APIC_TMCCT); |
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365 | barrier(); |
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366 | |||
367 | while (apic_read(APIC_TMCCT) > APIC_LIMIT) { |
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368 | barrier(); |
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369 | rdtscll(tsc_end); |
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370 | } |
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371 | |||
372 | barrier(); |
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373 | rdtscll(tsc_end); |
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374 | barrier(); |
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375 | apic_end = apic_read(APIC_TMCCT); |
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376 | barrier(); |
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377 | |||
312 | giacomo | 378 | disable_APIC_timer(); |
379 | |||
299 | giacomo | 380 | dtsc = tsc_end - tsc_start; |
381 | dapic = apic_start - apic_end; |
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382 | |||
305 | giacomo | 383 | apic_clk_per_msec = (unsigned long long)(clk_per_msec) * (unsigned long long)(dapic) / dtsc; |
312 | giacomo | 384 | apic_set_limit = ((apic_clk_per_msec / 100) != 0) ? (apic_clk_per_msec/100) : APIC_SET_LIMIT; |
303 | giacomo | 385 | |
305 | giacomo | 386 | message("Calibrated APIC Clk/msec = %10d\n",apic_clk_per_msec); |
299 | giacomo | 387 | |
388 | } |
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389 | |||
120 | giacomo | 390 | void ll_init_advtimer() |
391 | { |
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305 | giacomo | 392 | #ifdef __APIC__ |
393 | unsigned long msr_low_orig, tmp; |
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394 | #endif |
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120 | giacomo | 395 | |
305 | giacomo | 396 | #ifdef __TSC__ |
120 | giacomo | 397 | |
264 | giacomo | 398 | #ifdef CALIBRATE_USING_CMOS |
399 | ll_calibrate_tsc_cmos(); |
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400 | #else |
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401 | ll_calibrate_tsc(); |
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402 | #endif |
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403 | |||
120 | giacomo | 404 | rdtscll(init_tsc); // Read start TSC |
405 | init_nsec = 0; |
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406 | |||
305 | giacomo | 407 | #ifdef __APIC__ |
299 | giacomo | 408 | |
409 | rdmsr(APIC_BASE_MSR, msr_low_orig, tmp); |
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410 | wrmsr(APIC_BASE_MSR, msr_low_orig|(1<<11), 0); |
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411 | |||
301 | giacomo | 412 | clear_local_APIC(); |
299 | giacomo | 413 | |
301 | giacomo | 414 | ll_calibrate_apic(); |
415 | |||
299 | giacomo | 416 | setup_local_APIC(); |
303 | giacomo | 417 | |
418 | setup_APIC_timer(); |
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299 | giacomo | 419 | |
305 | giacomo | 420 | #endif |
299 | giacomo | 421 | |
305 | giacomo | 422 | #endif |
120 | giacomo | 423 | |
424 | } |
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425 | |||
301 | giacomo | 426 | void ll_restore_adv() |
120 | giacomo | 427 | { |
302 | giacomo | 428 | /* Disable APIC */ |
305 | giacomo | 429 | #ifdef __APIC__ |
430 | unsigned int msr_low_orig, tmp; |
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301 | giacomo | 431 | |
317 | giacomo | 432 | cli(); |
301 | giacomo | 433 | |
434 | disable_APIC_timer(); |
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435 | |||
436 | rdmsr(APIC_BASE_MSR, msr_low_orig, tmp); |
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437 | wrmsr(APIC_BASE_MSR, msr_low_orig&~(1<<11), 0); |
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438 | |||
439 | sti(); |
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440 | |||
305 | giacomo | 441 | #endif |
301 | giacomo | 442 | |
120 | giacomo | 443 | } |