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Rev | Author | Line No. | Line |
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2 | pj | 1 | /* Project: OSLib |
2 | * Description: The OS Construction Kit |
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3 | * Date: 1.6.2000 |
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4 | * Idea by: Luca Abeni & Gerardo Lamastra |
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5 | * |
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6 | * OSLib is an SO project aimed at developing a common, easy-to-use |
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7 | * low-level infrastructure for developing OS kernels and Embedded |
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8 | * Applications; it partially derives from the HARTIK project but it |
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9 | * currently is independently developed. |
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10 | * |
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11 | * OSLib is distributed under GPL License, and some of its code has |
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12 | * been derived from the Linux kernel source; also some important |
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13 | * ideas come from studying the DJGPP go32 extender. |
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14 | * |
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15 | * We acknowledge the Linux Community, Free Software Foundation, |
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16 | * D.J. Delorie and all the other developers who believe in the |
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17 | * freedom of software and ideas. |
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18 | * |
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19 | * For legalese, check out the included GPL license. |
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20 | */ |
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21 | |||
22 | /* File: Vm86.C |
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23 | * |
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24 | * VM86 mode switch routines! |
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25 | * This is basically an alternative way of invoking the |
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26 | * BIOS service routines; it is very useful to support |
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27 | * native VBE compliant Video card, without writing an explicit driver |
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28 | */ |
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29 | |||
40 | pj | 30 | #include <ll/i386/hw-data.h> |
31 | #include <ll/i386/hw-instr.h> |
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32 | #include <ll/i386/hw-func.h> |
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2 | pj | 33 | #include <ll/i386/mem.h> |
34 | #include <ll/i386/x-bios.h> |
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40 | pj | 35 | #include <ll/i386/x-dosmem.h> |
2 | pj | 36 | #include <ll/i386/cons.h> |
37 | #include <ll/i386/error.h> |
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451 | giacomo | 38 | #include <ll/i386/apic.h> |
39 | #include <ll/i386/advtimer.h> |
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2 | pj | 40 | |
40 | pj | 41 | FILE(VM-86); |
2 | pj | 42 | |
43 | /* |
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44 | #define __LL_DEBUG__ |
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45 | #define __DUMB_CODE__ |
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46 | #define __CHK_IO__ |
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47 | */ |
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48 | |||
443 | giacomo | 49 | //#define __LL_DEBUG__ |
313 | giacomo | 50 | |
444 | giacomo | 51 | #define VM86_STACK_SIZE 8192 |
2 | pj | 52 | |
40 | pj | 53 | extern DWORD ll_irq_table[256]; |
54 | |||
2 | pj | 55 | /* TSS optional section */ |
40 | pj | 56 | static BYTE vm86_stack0[VM86_STACK_SIZE]; |
2 | pj | 57 | |
477 | giacomo | 58 | static BYTE init = 0; |
59 | |||
2 | pj | 60 | static struct { |
61 | TSS t; |
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62 | DWORD io_map[2048]; |
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63 | } vm86_TSS; |
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64 | static LIN_ADDR vm86_stack; |
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65 | static LIN_ADDR vm86_iretAddress; |
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66 | |||
40 | pj | 67 | struct registers *global_regs; |
443 | giacomo | 68 | WORD VM86_ret_ctx; |
2 | pj | 69 | |
70 | #ifdef __DUMB_CODE__ |
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71 | static LIN_ADDR vm86_code; |
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72 | static BYTE prova86[] = { |
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40 | pj | 73 | 0x1e, /* push ds */ |
74 | 0xb8,0x00,0xb8, /* mov ax,0xb800 */ |
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75 | 0x8e,0xd8, /* mov ds,ax */ |
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76 | 0xbf,0x9e,0x00, /* mov di,0x009e (158) */ |
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77 | 0xb0,0x2a, /* mov ax,'*' */ |
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78 | 0x88,0x05, /* mov ds:[di],al */ |
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79 | 0x1f, /* pop ds */ |
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80 | 0xcd, 0x40, /*???*/ |
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81 | #ifdef __CHK_IO__ |
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82 | 0xb0, 0x00, /* movb $0x0,%al*/ |
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83 | 0x66,0xba, 0x80, 0x00, /* movw $0x80,%dx */ |
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84 | 0x66,0xef, /* outw %ax, (%dx) */ |
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85 | #endif |
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86 | 0xcf, /* iret */ |
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87 | 0xf4, /* hlt */ |
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88 | 0}; |
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2 | pj | 89 | #endif |
90 | |||
444 | giacomo | 91 | static BYTE vm86_retAddr[] = {0xcd, 0x48, /* int 48h */ |
92 | 0xf4, |
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93 | 0}; |
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2 | pj | 94 | |
40 | pj | 95 | TSS *vm86_get_tss(void) |
96 | { |
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97 | return &(vm86_TSS.t); |
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98 | } |
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99 | |||
2 | pj | 100 | /* Just a debugging function; it dumps the status of the TSS */ |
101 | void vm86_dump_TSS(void) |
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102 | { |
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40 | pj | 103 | BYTE acc,gran; |
104 | DWORD base,lim; |
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2 | pj | 105 | message("vm86_TSS.t dump\n"); |
40 | pj | 106 | message("Flag: %lx\n",vm86_TSS.t.eflags); |
107 | message("SS: %hx SP:%lx\n", vm86_TSS.t.ss,vm86_TSS.t.esp); |
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108 | message("Stack0: %hx:%lx\n",vm86_TSS.t.ss0,vm86_TSS.t.esp0); |
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109 | message("Stack1: %hx:%lx\n",vm86_TSS.t.ss1,vm86_TSS.t.esp1); |
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110 | message("Stack2: %hx:%lx\n",vm86_TSS.t.ss2,vm86_TSS.t.esp2); |
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111 | message("CS: %hx IP: %lx",vm86_TSS.t.cs, vm86_TSS.t.eip); |
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112 | message("DS: %hx\n",vm86_TSS.t.ds); |
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113 | base = GDT_read(X_VM86_TSS,&lim,&acc,&gran); |
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2 | pj | 114 | message("Base : %lx Lim : %lx Acc : %x Gran %x\n", |
40 | pj | 115 | base,lim,(unsigned)(acc),(unsigned)(gran)); |
2 | pj | 116 | } |
117 | |||
118 | void vm86_init(void) |
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119 | { |
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120 | int register i; |
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40 | pj | 121 | |
477 | giacomo | 122 | if (init != 0) return; |
123 | init = 1; |
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124 | |||
2 | pj | 125 | /* First of all, we need to setup a GDT entries to |
126 | * allow vm86 task execution. We just need a free 386 TSS, which |
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127 | * will be used to store the execution context of the virtual 8086 |
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128 | * task |
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129 | */ |
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40 | pj | 130 | GDT_place(X_VM86_TSS,(DWORD)(&vm86_TSS), |
131 | sizeof(vm86_TSS),FREE_TSS386,GRAN_16); |
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2 | pj | 132 | |
443 | giacomo | 133 | /* Return Registers */ |
134 | global_regs = DOS_alloc(sizeof(struct registers)); |
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40 | pj | 135 | |
2 | pj | 136 | /* Prepare a real-mode stack, obtaining it from the |
137 | * DOS memory allocator! |
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138 | * 8K should be OK! Stack top is vm86_stack + SIZE! |
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139 | */ |
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40 | pj | 140 | vm86_stack = DOS_alloc(VM86_STACK_SIZE*2); |
141 | vm86_stack += VM86_STACK_SIZE/2; |
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142 | |||
2 | pj | 143 | vm86_iretAddress = DOS_alloc(sizeof(vm86_retAddr)); |
40 | pj | 144 | memcpy(vm86_iretAddress,vm86_retAddr,sizeof(vm86_retAddr)); |
2 | pj | 145 | #ifdef __LL_DEBUG__ |
40 | pj | 146 | message("PM reentry linear address=0x%lx\n", (DWORD)vm86_iretAddress); |
2 | pj | 147 | #endif |
148 | #ifdef __DUMB_CODE__ |
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149 | vm86_code = DOS_alloc(2048); |
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40 | pj | 150 | lmemcpy(vm86_code,prova86,sizeof(prova86)); |
2 | pj | 151 | #endif |
152 | /* Zero the PM/Ring[1,2] ss:esp; they're unused! */ |
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153 | vm86_TSS.t.esp1 = 0; |
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154 | vm86_TSS.t.esp2 = 0; |
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155 | vm86_TSS.t.ss1 = 0; |
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156 | vm86_TSS.t.ss2 = 0; |
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157 | /* Use only the GDT */ |
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158 | vm86_TSS.t.ldt = 0; |
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159 | /* No paging activated */ |
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160 | vm86_TSS.t.cr3 = 0; |
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161 | vm86_TSS.t.trap = 0; |
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162 | /* Yeah, free access to any I/O port; we trust BIOS anyway! */ |
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163 | /* Here is the explanation: we have 65536 I/O ports... each bit |
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164 | * in the io_map masks/unmasks the exception for the given I/O port |
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165 | * If the bit is set, an exception is generated; otherwise, if the bit |
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166 | * is clear, everythings works fine... |
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167 | * Because of alignment problem, we need to add an extra byte all set |
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168 | * to 1, according to Intel manuals |
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169 | */ |
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40 | pj | 170 | vm86_TSS.t.io_base = (DWORD)(&(vm86_TSS.io_map)) - |
171 | (DWORD)(&(vm86_TSS)); |
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172 | for (i = 0; i < 2047; i++) vm86_TSS.io_map[i] = 0; |
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2 | pj | 173 | vm86_TSS.io_map[2047] = 0xFF000000; |
174 | } |
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175 | |||
40 | pj | 176 | int vm86_callBIOS(int service,X_REGS16 *in,X_REGS16 *out,X_SREGS16 *s) |
2 | pj | 177 | { |
178 | DWORD vm86_tmpAddr; |
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40 | pj | 179 | DWORD vm86_flags, vm86_cs,vm86_ip; |
2 | pj | 180 | LIN_ADDR vm86_stackPtr; |
181 | DWORD *IRQTable_entry; |
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444 | giacomo | 182 | BYTE p1,p2; |
443 | giacomo | 183 | |
451 | giacomo | 184 | #ifdef __APIC__ |
185 | DWORD msr1 = 0,msr2 = 0; |
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186 | #endif |
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187 | |||
443 | giacomo | 188 | SYS_FLAGS f; |
444 | giacomo | 189 | |
443 | giacomo | 190 | if (service < 0x10 || in == NULL) return -1; |
40 | pj | 191 | |
443 | giacomo | 192 | f = ll_fsave(); |
193 | |||
2 | pj | 194 | /* Setup the stack frame */ |
40 | pj | 195 | vm86_tmpAddr = (DWORD)(vm86_stack); |
2 | pj | 196 | vm86_TSS.t.ss = (vm86_tmpAddr & 0xFF000) >> 4; |
197 | vm86_TSS.t.ebp = vm86_TSS.t.esp = (vm86_tmpAddr & 0x0FFF) |
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40 | pj | 198 | + VM86_STACK_SIZE - 6; |
2 | pj | 199 | /* Build an iret stack frame which returns to vm86_iretAddress */ |
40 | pj | 200 | vm86_tmpAddr = (DWORD)(vm86_iretAddress); |
2 | pj | 201 | vm86_cs = (vm86_tmpAddr & 0xFF000) >> 4; |
202 | vm86_ip = (vm86_tmpAddr & 0xFFF); |
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444 | giacomo | 203 | vm86_flags = 0; |
2 | pj | 204 | vm86_stackPtr = vm86_stack + VM86_STACK_SIZE; |
40 | pj | 205 | lmempokew(vm86_stackPtr-6,vm86_ip); |
206 | lmempokew(vm86_stackPtr-4,vm86_cs); |
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207 | lmempokew(vm86_stackPtr-2,vm86_flags); |
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2 | pj | 208 | #ifdef __LL_DEBUG__ |
209 | message("Stack: %lx SS: %lx SP: %lx\n", |
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40 | pj | 210 | vm86_tmpAddr + VM86_STACK_SIZE,(DWORD)vm86_TSS.t.ss,vm86_TSS.t.esp); |
2 | pj | 211 | #endif |
212 | /* Wanted VM86 mode + IOPL = 3! */ |
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443 | giacomo | 213 | vm86_TSS.t.eflags = CPU_FLAG_VM + CPU_FLAG_IOPL; |
2 | pj | 214 | /* Preload some standard values into the registers */ |
215 | vm86_TSS.t.ss0 = X_FLATDATA_SEL; |
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40 | pj | 216 | vm86_TSS.t.esp0 = (DWORD)&(vm86_stack0[VM86_STACK_SIZE-1]); |
217 | |||
2 | pj | 218 | #ifdef __DUMB_CODE__ |
40 | pj | 219 | vm86_TSS.t.cs = ((DWORD)(vm86_code) & 0xFFFF0) >> 4; |
220 | vm86_TSS.t.eip = ((DWORD)(vm86_code) & 0x000F); |
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2 | pj | 221 | #ifdef __LL_DEBUG_ |
222 | message("(DUMB CODE) CS:%x IP:%x/%x\n", |
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40 | pj | 223 | (DWORD)vm86_TSS.t.cs,vm86_TSS.t.eip,&prova86); |
2 | pj | 224 | message("(DUMB CODE) Go...\n"); |
225 | #endif |
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443 | giacomo | 226 | |
227 | p1 = inp(0x21); |
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228 | p2 = inp(0xA1); |
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229 | outp(0x21,0xFF); |
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230 | outp(0xA1,0xFF); |
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444 | giacomo | 231 | |
451 | giacomo | 232 | #ifdef __APIC__ |
233 | rdmsr(APIC_BASE_MSR,msr1,msr2); |
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234 | disable_APIC_timer(); |
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235 | #endif |
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236 | |||
444 | giacomo | 237 | vm86_TSS.t.back_link = ll_context_save(); |
238 | VM86_ret_ctx = vm86_TSS.t.back_link |
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451 | giacomo | 239 | sti(); |
2 | pj | 240 | ll_context_load(X_VM86_TSS); |
451 | giacomo | 241 | cli(); |
2 | pj | 242 | |
451 | giacomo | 243 | #ifdef __APIC__ |
244 | wrmsr(APIC_BASE_MSR,msr1,msr2); |
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245 | enable_APIC_timer(); |
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246 | #endif |
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247 | |||
443 | giacomo | 248 | outp(0x21,p1); |
249 | outp(0xA1,p2); |
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250 | |||
2 | pj | 251 | #ifdef __LL_DEBUG_ |
252 | message("(DUMB CODE) I am back...\n"); |
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253 | #endif |
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254 | #else |
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255 | /* Copy the parms from the X_*REGS structures in the vm86 TSS */ |
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40 | pj | 256 | vm86_TSS.t.eax = (DWORD)in->x.ax; |
257 | vm86_TSS.t.ebx = (DWORD)in->x.bx; |
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258 | vm86_TSS.t.ecx = (DWORD)in->x.cx; |
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259 | vm86_TSS.t.edx = (DWORD)in->x.dx; |
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260 | vm86_TSS.t.esi = (DWORD)in->x.si; |
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261 | vm86_TSS.t.edi = (DWORD)in->x.di; |
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2 | pj | 262 | /* IF Segment registers are required, copy them... */ |
263 | if (s != NULL) { |
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40 | pj | 264 | vm86_TSS.t.es = (WORD)s->es; |
265 | vm86_TSS.t.ds = (WORD)s->ds; |
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2 | pj | 266 | } else { |
40 | pj | 267 | vm86_TSS.t.ds = vm86_TSS.t.ss; |
268 | vm86_TSS.t.es = vm86_TSS.t.ss; |
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2 | pj | 269 | } |
40 | pj | 270 | vm86_TSS.t.gs = vm86_TSS.t.ss; |
271 | vm86_TSS.t.fs = vm86_TSS.t.ss; |
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2 | pj | 272 | /* Execute the BIOS call, fetching the CS:IP of the real interrupt |
273 | * handler from 0:0 (DOS irq table!) |
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274 | */ |
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40 | pj | 275 | IRQTable_entry = (void *)(0L); |
276 | vm86_TSS.t.cs= ((IRQTable_entry[service]) & 0xFFFF0000) >> 16; |
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2 | pj | 277 | vm86_TSS.t.eip = ((IRQTable_entry[service]) & 0x0000FFFF); |
40 | pj | 278 | #ifdef __LL_DEBUG__ |
279 | message("CS:%x IP:%lx\n", vm86_TSS.t.cs, vm86_TSS.t.eip); |
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2 | pj | 280 | #endif |
281 | /* Let's use the ll standard call... */ |
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443 | giacomo | 282 | |
283 | p1 = inp(0x21); |
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284 | p2 = inp(0xA1); |
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285 | outp(0x21,0xFF); |
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286 | outp(0xA1,0xFF); |
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444 | giacomo | 287 | |
451 | giacomo | 288 | #ifdef __APIC__ |
289 | rdmsr(APIC_BASE_MSR,msr1,msr2); |
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290 | disable_APIC_timer(); |
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291 | #endif |
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292 | |||
444 | giacomo | 293 | vm86_TSS.t.back_link = ll_context_save(); |
294 | VM86_ret_ctx = vm86_TSS.t.back_link; |
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443 | giacomo | 295 | sti(); |
2 | pj | 296 | ll_context_load(X_VM86_TSS); |
451 | giacomo | 297 | cli(); |
443 | giacomo | 298 | |
451 | giacomo | 299 | #ifdef __APIC__ |
300 | wrmsr(APIC_BASE_MSR,msr1,msr2); |
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301 | enable_APIC_timer(); |
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302 | #endif |
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303 | |||
443 | giacomo | 304 | outp(0x21,p1); |
305 | outp(0xA1,p2); |
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306 | |||
40 | pj | 307 | #ifdef __LL_DEBUG__ |
2 | pj | 308 | message("I am back...\n"); |
309 | message("TSS CS=%hx IP=%lx\n", vm86_TSS.t.cs, vm86_TSS.t.eip); |
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310 | #endif |
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311 | /* Send back in the X_*REGS structure the value obtained with |
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312 | * the real-mode interrupt call |
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313 | */ |
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314 | if (out != NULL) { |
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443 | giacomo | 315 | |
40 | pj | 316 | out->x.ax = global_regs->eax; |
317 | out->x.bx = global_regs->ebx; |
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318 | out->x.cx = global_regs->ecx; |
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319 | out->x.dx = global_regs->edx; |
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320 | out->x.si = global_regs->esi; |
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321 | out->x.di = global_regs->edi; |
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322 | out->x.cflag = global_regs->flags; |
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443 | giacomo | 323 | |
324 | //message("ax = %d bx = %d cx = %d dx = %d\n",out->x.ax,out->x.bx,out->x.cx,out->x.dx); |
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325 | //message("si = %d di = %d\n",out->x.si,out->x.di); |
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326 | |||
2 | pj | 327 | } |
328 | if (s != NULL) { |
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40 | pj | 329 | s->es = vm86_TSS.t.es; |
330 | s->ds = vm86_TSS.t.ds; |
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2 | pj | 331 | } |
332 | #endif |
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443 | giacomo | 333 | |
444 | giacomo | 334 | ll_frestore(f); |
443 | giacomo | 335 | |
444 | giacomo | 336 | return 1; |
337 | |||
2 | pj | 338 | } |