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| Rev | Author | Line No. | Line |
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| 309 | giacomo | 1 | # S.Ha.R.K. Setup File |
| 2 | # |
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| 3 | # Oslib Configuration |
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| 4 | # |
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| 5 | |||
| 6 | # Enable the system time computation through TSC register |
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| 7 | # Only Pentium or higher CPU class |
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| 8 | TSC = TRUE |
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| 9 | |||
| 10 | # Enable timer interrupt through P6 APIC instead of PIT |
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| 11 | # Only P6 or higher CPU class, TSC support must be enabled |
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| 12 | APIC = FALSE |
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| 13 | |||
| 331 | giacomo | 14 | #Enable Read Timer Optimization |
| 15 | #TIMER_OPT = 1000 (For CPU < 1 GHz - Wraparound 585 years) |
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| 16 | #TIMER_OPT = 2000 (For 1 GHz < CPU < 2 GHz - Wraparound 146 years) |
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| 17 | #TIMER_OPT = 4000 (For 2 GHz < CPU < 4 GHz - Wraparound 36 years) |
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| 18 | #TIMER_OPT = SLOW (No CPU dependent - Wraparound 585 years) |
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| 19 | TIMER_OPT = SLOW |
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| 20 |