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587 giacomo 1
/*
2
 *      Low-Level PCI Support for PC -- Routing of Interrupts
3
 *
4
 *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
5
 */
6
 
7
#include <linuxcomp.h>
8
 
9
#include <linux/config.h>
10
#include <linux/types.h>
11
#include <linux/kernel.h>
12
#include <linux/pci.h>
13
#include <linux/init.h>
14
#include <linux/slab.h>
15
#include <linux/interrupt.h>
16
#include <linux/irq.h>
17
#include <asm/io.h>
18
#include <asm/smp.h>
19
#include <asm/io_apic.h>
20
 
21
#include "pci2.h"
22
 
23
#define PIRQ_SIGNATURE  (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
24
#define PIRQ_VERSION 0x0100
25
 
26
int broken_hp_bios_irq9;
27
 
28
static struct irq_routing_table *pirq_table;
29
 
30
/*
31
 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
32
 * Avoid using: 13, 14 and 15 (FP error and IDE).
33
 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
34
 */
35
unsigned int pcibios_irq_mask = 0xfff8;
36
 
37
static int pirq_penalty[16] = {
38
        1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
39
        0, 0, 0, 0, 1000, 100000, 100000, 100000
40
};
41
 
42
struct irq_router {
43
        char *name;
44
        u16 vendor, device;
45
        int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
46
        int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
47
};
48
 
49
struct irq_router_handler {
50
        u16 vendor;
51
        int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
52
};
53
 
54
int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
55
 
56
/*
57
 *  Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
58
 */
59
 
60
static struct irq_routing_table * __init pirq_find_routing_table(void)
61
{
62
        u8 *addr;
63
        struct irq_routing_table *rt;
64
        int i;
65
        u8 sum;
66
 
67
        for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
68
                rt = (struct irq_routing_table *) addr;
69
                if (rt->signature != PIRQ_SIGNATURE ||
70
                    rt->version != PIRQ_VERSION ||
71
                    rt->size % 16 ||
72
                    rt->size < sizeof(struct irq_routing_table))
73
                        continue;
74
                sum = 0;
75
                for(i=0; i<rt->size; i++)
76
                        sum += addr[i];
77
                if (!sum) {
78
                        DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt);
79
                        return rt;
80
                }
81
        }
82
        return NULL;
83
}
84
 
85
/*
86
 *  If we have a IRQ routing table, use it to search for peer host
87
 *  bridges.  It's a gross hack, but since there are no other known
88
 *  ways how to get a list of buses, we have to go this way.
89
 */
90
 
91
static void __init pirq_peer_trick(void)
92
{
93
        struct irq_routing_table *rt = pirq_table;
94
        u8 busmap[256];
95
        int i;
96
        struct irq_info *e;
97
 
98
        memset(busmap, 0, sizeof(busmap));
99
        for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
100
                e = &rt->slots[i];
101
#ifdef DEBUG
102
                {
103
                        int j;
104
                        DBG("%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
105
                        for(j=0; j<4; j++)
106
                                DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
107
                        DBG("\n");
108
                }
109
#endif
110
                busmap[e->bus] = 1;
111
        }
112
        for(i = 1; i < 256; i++) {
113
                if (!busmap[i] || pci_find_bus(0, i))
114
                        continue;
115
                if (pci_scan_bus(i, &pci_root_ops, NULL))
116
                        printk(KERN_INFO "PCI: Discovered primary peer bus %02x [IRQ]\n", i);
117
        }
118
        pcibios_last_bus = -1;
119
}
120
 
121
/*
122
 *  Code for querying and setting of IRQ routes on various interrupt routers.
123
 */
124
 
125
void eisa_set_level_irq(unsigned int irq)
126
{
127
        unsigned char mask = 1 << (irq & 7);
128
        unsigned int port = 0x4d0 + (irq >> 3);
129
        unsigned char val = inb(port);
130
 
131
        if (!(val & mask)) {
132
                DBG(" -> edge");
133
                outb(val | mask, port);
134
        }
135
}
136
 
137
/*
138
 * Common IRQ routing practice: nybbles in config space,
139
 * offset by some magic constant.
140
 */
141
static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
142
{
143
        u8 x;
144
        unsigned reg = offset + (nr >> 1);
145
 
146
        pci_read_config_byte(router, reg, &x);
147
        return (nr & 1) ? (x >> 4) : (x & 0xf);
148
}
149
 
150
static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
151
{
152
        u8 x;
153
        unsigned reg = offset + (nr >> 1);
154
 
155
        pci_read_config_byte(router, reg, &x);
156
        x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
157
        pci_write_config_byte(router, reg, x);
158
}
159
 
160
/*
161
 * ALI pirq entries are damn ugly, and completely undocumented.
162
 * This has been figured out from pirq tables, and it's not a pretty
163
 * picture.
164
 */
165
static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
166
{
167
        static unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
168
 
169
        return irqmap[read_config_nybble(router, 0x48, pirq-1)];
170
}
171
 
172
static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
173
{
174
        static unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
175
        unsigned int val = irqmap[irq];
176
 
177
        if (val) {
178
                write_config_nybble(router, 0x48, pirq-1, val);
179
                return 1;
180
        }
181
        return 0;
182
}
183
 
184
/*
185
 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
186
 * just a pointer to the config space.
187
 */
188
static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
189
{
190
        u8 x;
191
 
192
        pci_read_config_byte(router, pirq, &x);
193
        return (x < 16) ? x : 0;
194
}
195
 
196
static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
197
{
198
        pci_write_config_byte(router, pirq, irq);
199
        return 1;
200
}
201
 
202
/*
203
 * The VIA pirq rules are nibble-based, like ALI,
204
 * but without the ugly irq number munging.
205
 * However, PIRQD is in the upper instead of lower 4 bits.
206
 */
207
static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
208
{
209
        return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
210
}
211
 
212
static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
213
{
214
        write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
215
        return 1;
216
}
217
 
218
/*
219
 * ITE 8330G pirq rules are nibble-based
220
 * FIXME: pirqmap may be { 1, 0, 3, 2 },
221
 *        2+3 are both mapped to irq 9 on my system
222
 */
223
static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
224
{
225
        static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
226
        return read_config_nybble(router,0x43, pirqmap[pirq-1]);
227
}
228
 
229
static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
230
{
231
        static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
232
        write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
233
        return 1;
234
}
235
 
236
/*
237
 * OPTI: high four bits are nibble pointer..
238
 * I wonder what the low bits do?
239
 */
240
static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
241
{
242
        return read_config_nybble(router, 0xb8, pirq >> 4);
243
}
244
 
245
static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
246
{
247
        write_config_nybble(router, 0xb8, pirq >> 4, irq);
248
        return 1;
249
}
250
 
251
/*
252
 * Cyrix: nibble offset 0x5C
253
 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
254
 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
255
 */
256
static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
257
{
258
        return read_config_nybble(router, 0x5C, (pirq-1)^1);
259
}
260
 
261
static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
262
{
263
        write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
264
        return 1;
265
}
266
 
267
/*
268
 *      PIRQ routing for SiS 85C503 router used in several SiS chipsets.
269
 *      We have to deal with the following issues here:
270
 *      - vendors have different ideas about the meaning of link values
271
 *      - some onboard devices (integrated in the chipset) have special
272
 *        links and are thus routed differently (i.e. not via PCI INTA-INTD)
273
 *      - different revision of the router have a different layout for
274
 *        the routing registers, particularly for the onchip devices
275
 *
276
 *      For all routing registers the common thing is we have one byte
277
 *      per routeable link which is defined as:
278
 *               bit 7      IRQ mapping enabled (0) or disabled (1)
279
 *               bits [6:4] reserved (sometimes used for onchip devices)
280
 *               bits [3:0] IRQ to map to
281
 *                   allowed: 3-7, 9-12, 14-15
282
 *                   reserved: 0, 1, 2, 8, 13
283
 *
284
 *      The config-space registers located at 0x41/0x42/0x43/0x44 are
285
 *      always used to route the normal PCI INT A/B/C/D respectively.
286
 *      Apparently there are systems implementing PCI routing table using
287
 *      link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
288
 *      We try our best to handle both link mappings.
289
 *     
290
 *      Currently (2003-05-21) it appears most SiS chipsets follow the
291
 *      definition of routing registers from the SiS-5595 southbridge.
292
 *      According to the SiS 5595 datasheets the revision id's of the
293
 *      router (ISA-bridge) should be 0x01 or 0xb0.
294
 *
295
 *      Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
296
 *      Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
297
 *      They seem to work with the current routing code. However there is
298
 *      some concern because of the two USB-OHCI HCs (original SiS 5595
299
 *      had only one). YMMV.
300
 *
301
 *      Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
302
 *
303
 *      0x61:   IDEIRQ:
304
 *              bits [6:5] must be written 01
305
 *              bit 4 channel-select primary (0), secondary (1)
306
 *
307
 *      0x62:   USBIRQ:
308
 *              bit 6 OHCI function disabled (0), enabled (1)
309
 *     
310
 *      0x6a:   ACPI/SCI IRQ: bits 4-6 reserved
311
 *
312
 *      0x7e:   Data Acq. Module IRQ - bits 4-6 reserved
313
 *
314
 *      We support USBIRQ (in addition to INTA-INTD) and keep the
315
 *      IDE, ACPI and DAQ routing untouched as set by the BIOS.
316
 *
317
 *      Currently the only reported exception is the new SiS 65x chipset
318
 *      which includes the SiS 69x southbridge. Here we have the 85C503
319
 *      router revision 0x04 and there are changes in the register layout
320
 *      mostly related to the different USB HCs with USB 2.0 support.
321
 *
322
 *      Onchip routing for router rev-id 0x04 (try-and-error observation)
323
 *
324
 *      0x60/0x61/0x62/0x63:    1xEHCI and 3xOHCI (companion) USB-HCs
325
 *                              bit 6-4 are probably unused, not like 5595
326
 */
327
 
328
#define PIRQ_SIS_IRQ_MASK       0x0f
329
#define PIRQ_SIS_IRQ_DISABLE    0x80
330
#define PIRQ_SIS_USB_ENABLE     0x40
331
 
332
static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
333
{
334
        u8 x;
335
        int reg;
336
 
337
        reg = pirq;
338
        if (reg >= 0x01 && reg <= 0x04)
339
                reg += 0x40;
340
        pci_read_config_byte(router, reg, &x);
341
        return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
342
}
343
 
344
static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
345
{
346
        u8 x;
347
        int reg;
348
 
349
        reg = pirq;
350
        if (reg >= 0x01 && reg <= 0x04)
351
                reg += 0x40;
352
        pci_read_config_byte(router, reg, &x);
353
        x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
354
        x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
355
        pci_write_config_byte(router, reg, x);
356
        return 1;
357
}
358
 
359
 
360
/*
361
 * VLSI: nibble offset 0x74 - educated guess due to routing table and
362
 *       config space of VLSI 82C534 PCI-bridge/router (1004:0102)
363
 *       Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
364
 *       devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
365
 *       for the busbridge to the docking station.
366
 */
367
 
368
static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
369
{
370
        if (pirq > 8) {
371
                printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
372
                return 0;
373
        }
374
        return read_config_nybble(router, 0x74, pirq-1);
375
}
376
 
377
static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
378
{
379
        if (pirq > 8) {
380
                printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
381
                return 0;
382
        }
383
        write_config_nybble(router, 0x74, pirq-1, irq);
384
        return 1;
385
}
386
 
387
/*
388
 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
389
 * and Redirect I/O registers (0x0c00 and 0x0c01).  The Index register
390
 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a.  The Redirect
391
 * register is a straight binary coding of desired PIC IRQ (low nibble).
392
 *
393
 * The 'link' value in the PIRQ table is already in the correct format
394
 * for the Index register.  There are some special index values:
395
 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
396
 * and 0x03 for SMBus.
397
 */
398
static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
399
{
400
        outb_p(pirq, 0xc00);
401
        return inb(0xc01) & 0xf;
402
}
403
 
404
static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
405
{
406
        outb_p(pirq, 0xc00);
407
        outb_p(irq, 0xc01);
408
        return 1;
409
}
410
 
411
/* Support for AMD756 PCI IRQ Routing
412
 * Jhon H. Caicedo <jhcaiced@osso.org.co>
413
 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
414
 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
415
 * The AMD756 pirq rules are nibble-based
416
 * offset 0x56 0-3 PIRQA  4-7  PIRQB
417
 * offset 0x57 0-3 PIRQC  4-7  PIRQD
418
 */
419
static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
420
{
421
        u8 irq;
422
        irq = 0;
423
        if (pirq <= 4)
424
        {
425
                irq = read_config_nybble(router, 0x56, pirq - 1);
426
        }
427
        printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
428
                dev->vendor, dev->device, pirq, irq);
429
        return irq;
430
}
431
 
432
static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
433
{
434
        printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
435
                dev->vendor, dev->device, pirq, irq);
436
        if (pirq <= 4)
437
        {
438
                write_config_nybble(router, 0x56, pirq - 1, irq);
439
        }
440
        return 1;
441
}
442
 
443
#ifdef CONFIG_PCI_BIOS
444
 
445
static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
446
{
447
        struct pci_dev *bridge;
448
        int pin = pci_get_interrupt_pin(dev, &bridge);
449
        return pcibios_set_irq_routing(bridge, pin, irq);
450
}
451
 
452
#endif
453
 
454
 
455
static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
456
{
457
#if 0 /* Let's see what chip this is supposed to be ... */
458
        /* We must not touch 440GX even if we have tables. 440GX has
459
           different IRQ routing weirdness */
460
        if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82440GX, NULL))
461
                return 0;
462
#endif
463
 
464
        switch(device)
465
        {
466
                case PCI_DEVICE_ID_INTEL_82371FB_0:
467
                case PCI_DEVICE_ID_INTEL_82371SB_0:
468
                case PCI_DEVICE_ID_INTEL_82371AB_0:
469
                case PCI_DEVICE_ID_INTEL_82371MX:
470
                case PCI_DEVICE_ID_INTEL_82443MX_0:
471
                case PCI_DEVICE_ID_INTEL_82801AA_0:
472
                case PCI_DEVICE_ID_INTEL_82801AB_0:
473
                case PCI_DEVICE_ID_INTEL_82801BA_0:
474
                case PCI_DEVICE_ID_INTEL_82801BA_10:
475
                case PCI_DEVICE_ID_INTEL_82801CA_0:
476
                case PCI_DEVICE_ID_INTEL_82801CA_12:
477
                case PCI_DEVICE_ID_INTEL_82801DB_0:
478
                case PCI_DEVICE_ID_INTEL_82801E_0:
479
                case PCI_DEVICE_ID_INTEL_82801EB_0:
480
                case PCI_DEVICE_ID_INTEL_ESB_0:
481
                        r->name = "PIIX/ICH";
482
                        r->get = pirq_piix_get;
483
                        r->set = pirq_piix_set;
484
                        return 1;
485
        }
486
        return 0;
487
}
488
 
489
static __init int via_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
490
{
491
        /* FIXME: We should move some of the quirk fixup stuff here */
492
        switch(device)
493
        {
494
                case PCI_DEVICE_ID_VIA_82C586_0:
495
                case PCI_DEVICE_ID_VIA_82C596:
496
                case PCI_DEVICE_ID_VIA_82C686:
497
                case PCI_DEVICE_ID_VIA_8231:
498
                /* FIXME: add new ones for 8233/5 */
499
                        r->name = "VIA";
500
                        r->get = pirq_via_get;
501
                        r->set = pirq_via_set;
502
                        return 1;
503
        }
504
        return 0;
505
}
506
 
507
static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
508
{
509
        switch(device)
510
        {
511
                case PCI_DEVICE_ID_VLSI_82C534:
512
                        r->name = "VLSI 82C534";
513
                        r->get = pirq_vlsi_get;
514
                        r->set = pirq_vlsi_set;
515
                        return 1;
516
        }
517
        return 0;
518
}
519
 
520
 
521
static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
522
{
523
        switch(device)
524
        {
525
                case PCI_DEVICE_ID_SERVERWORKS_OSB4:
526
                case PCI_DEVICE_ID_SERVERWORKS_CSB5:
527
                        r->name = "ServerWorks";
528
                        r->get = pirq_serverworks_get;
529
                        r->set = pirq_serverworks_set;
530
                        return 1;
531
        }
532
        return 0;
533
}
534
 
535
static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
536
{
537
        if (device != PCI_DEVICE_ID_SI_503)
538
                return 0;
539
 
540
        r->name = "SIS";
541
        r->get = pirq_sis_get;
542
        r->set = pirq_sis_set;
543
        return 1;
544
}
545
 
546
static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
547
{
548
        switch(device)
549
        {
550
                case PCI_DEVICE_ID_CYRIX_5520:
551
                        r->name = "NatSemi";
552
                        r->get = pirq_cyrix_get;
553
                        r->set = pirq_cyrix_set;
554
                        return 1;
555
        }
556
        return 0;
557
}
558
 
559
static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
560
{
561
        switch(device)
562
        {
563
                case PCI_DEVICE_ID_OPTI_82C700:
564
                        r->name = "OPTI";
565
                        r->get = pirq_opti_get;
566
                        r->set = pirq_opti_set;
567
                        return 1;
568
        }
569
        return 0;
570
}
571
 
572
static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
573
{
574
        switch(device)
575
        {
576
                case PCI_DEVICE_ID_ITE_IT8330G_0:
577
                        r->name = "ITE";
578
                        r->get = pirq_ite_get;
579
                        r->set = pirq_ite_set;
580
                        return 1;
581
        }
582
        return 0;
583
}
584
 
585
static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
586
{
587
        switch(device)
588
        {
589
                case PCI_DEVICE_ID_AL_M1533:
590
                        r->name = "ALI";
591
                        r->get = pirq_ali_get;
592
                        r->set = pirq_ali_set;
593
                        return 1;
594
                /* Should add 156x some day */
595
        }
596
        return 0;
597
}
598
 
599
static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
600
{
601
        switch(device)
602
        {
603
                case PCI_DEVICE_ID_AMD_VIPER_740B:
604
                        r->name = "AMD756";
605
                        break;
606
                case PCI_DEVICE_ID_AMD_VIPER_7413:
607
                        r->name = "AMD766";
608
                        break;
609
                case PCI_DEVICE_ID_AMD_VIPER_7443:
610
                        r->name = "AMD768";
611
                        break;
612
                default:
613
                        return 0;
614
        }
615
        r->get = pirq_amd756_get;
616
        r->set = pirq_amd756_set;
617
        return 1;
618
}
619
 
620
static __initdata struct irq_router_handler pirq_routers[] = {
621
        { PCI_VENDOR_ID_INTEL, intel_router_probe },
622
        { PCI_VENDOR_ID_AL, ali_router_probe },
623
        { PCI_VENDOR_ID_ITE, ite_router_probe },
624
        { PCI_VENDOR_ID_VIA, via_router_probe },
625
        { PCI_VENDOR_ID_OPTI, opti_router_probe },
626
        { PCI_VENDOR_ID_SI, sis_router_probe },
627
        { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
628
        { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
629
        { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
630
        { PCI_VENDOR_ID_AMD, amd_router_probe },
631
        /* Someone with docs needs to add the ATI Radeon IGP */
632
        { 0, NULL }
633
};
634
static struct irq_router pirq_router;
635
static struct pci_dev *pirq_router_dev;
636
 
637
 
638
/*
639
 *      FIXME: should we have an option to say "generic for
640
 *      chipset" ?
641
 */
642
 
643
static void __init pirq_find_router(struct irq_router *r)
644
{
645
        struct irq_routing_table *rt = pirq_table;
646
        struct irq_router_handler *h;
647
 
648
#ifdef CONFIG_PCI_BIOS
649
        if (!rt->signature) {
650
                printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
651
                r->set = pirq_bios_set;
652
                r->name = "BIOS";
653
                return;
654
        }
655
#endif
656
 
657
        /* Default unless a driver reloads it */
658
        r->name = "default";
659
        r->get = NULL;
660
        r->set = NULL;
661
 
662
        DBG("PCI: Attempting to find IRQ router for %04x:%04x\n",
663
            rt->rtr_vendor, rt->rtr_device);
664
 
665
        pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn);
666
        if (!pirq_router_dev) {
667
                DBG("PCI: Interrupt router not found at %02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
668
                return;
669
        }
670
 
671
        for( h = pirq_routers; h->vendor; h++) {
672
                /* First look for a router match */
673
                if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
674
                        break;
675
                /* Fall back to a device match */
676
                if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
677
                        break;
678
        }
679
        printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
680
                pirq_router.name,
681
                pirq_router_dev->vendor,
682
                pirq_router_dev->device,
683
                pci_name(pirq_router_dev));
684
}
685
 
686
static struct irq_info *pirq_get_info(struct pci_dev *dev)
687
{
688
        struct irq_routing_table *rt = pirq_table;
689
        int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
690
        struct irq_info *info;
691
 
692
        for (info = rt->slots; entries--; info++)
693
                if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
694
                        return info;
695
        return NULL;
696
}
697
 
698
static irqreturn_t pcibios_test_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
699
{
700
        return IRQ_NONE;
701
}
702
 
703
static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
704
{
705
        u8 pin;
706
        struct irq_info *info;
707
        int i, pirq, newirq;
708
        int irq = 0;
709
        u32 mask;
710
        struct irq_router *r = &pirq_router;
711
        struct pci_dev *dev2 = NULL;
712
        char *msg = NULL;
713
 
714
        /* Find IRQ pin */
715
        pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
716
        if (!pin) {
717
                DBG(" -> no interrupt pin\n");
718
                return 0;
719
        }
720
        pin = pin - 1;
721
 
722
        /* Find IRQ routing entry */
723
 
724
        if (!pirq_table)
725
                return 0;
726
 
727
        DBG("IRQ for %s:%d", pci_name(dev), pin);
728
        info = pirq_get_info(dev);
729
        if (!info) {
730
                DBG(" -> not found in routing table\n");
731
                return 0;
732
        }
733
        pirq = info->irq[pin].link;
734
        mask = info->irq[pin].bitmap;
735
        if (!pirq) {
736
                DBG(" -> not routed\n");
737
                return 0;
738
        }
739
        DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
740
        mask &= pcibios_irq_mask;
741
 
742
        /* Work around broken HP Pavilion Notebooks which assign USB to
743
           IRQ 9 even though it is actually wired to IRQ 11 */
744
 
745
        if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
746
                dev->irq = 11;
747
                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
748
                r->set(pirq_router_dev, dev, pirq, 11);
749
        }
750
 
751
        /*
752
         * Find the best IRQ to assign: use the one
753
         * reported by the device if possible.
754
         */
755
        newirq = dev->irq;
756
        if (!((1 << newirq) & mask)) {
757
                if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
758
                else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, pci_name(dev));
759
        }
760
        if (!newirq && assign) {
761
                for (i = 0; i < 16; i++) {
762
                        if (!(mask & (1 << i)))
763
                                continue;
764
                        if (pirq_penalty[i] < pirq_penalty[newirq] &&
765
                            !request_irq(i, pcibios_test_irq_handler, SA_SHIRQ, "pci-test", dev)) {
766
                                free_irq(i, dev);
767
                                newirq = i;
768
                        }
769
                }
770
        }
771
        DBG(" -> newirq=%d", newirq);
772
 
773
        /* Check if it is hardcoded */
774
        if ((pirq & 0xf0) == 0xf0) {
775
                irq = pirq & 0xf;
776
                DBG(" -> hardcoded IRQ %d\n", irq);
777
                msg = "Hardcoded";
778
        } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
779
        ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
780
                DBG(" -> got IRQ %d\n", irq);
781
                msg = "Found";
782
        } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
783
                DBG(" -> assigning IRQ %d", newirq);
784
                if (r->set(pirq_router_dev, dev, pirq, newirq)) {
785
                        eisa_set_level_irq(newirq);
786
                        DBG(" ... OK\n");
787
                        msg = "Assigned";
788
                        irq = newirq;
789
                }
790
        }
791
 
792
        if (!irq) {
793
                DBG(" ... failed\n");
794
                if (newirq && mask == (1 << newirq)) {
795
                        msg = "Guessed";
796
                        irq = newirq;
797
                } else
798
                        return 0;
799
        }
800
        printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
801
 
802
        /* Update IRQ for all devices with the same pirq value */
803
        while ((dev2 = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
804
                pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
805
                if (!pin)
806
                        continue;
807
                pin--;
808
                info = pirq_get_info(dev2);
809
                if (!info)
810
                        continue;
811
                if (info->irq[pin].link == pirq) {
812
                        /* We refuse to override the dev->irq information. Give a warning! */
813
                        if ( dev2->irq && dev2->irq != irq && \
814
                        (!(pci_probe & PCI_USE_PIRQ_MASK) || \
815
                        ((1 << dev2->irq) & mask)) ) {
816
                                printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
817
                                       pci_name(dev2), dev2->irq, irq);
818
                                continue;
819
                        }
820
                        dev2->irq = irq;
821
                        pirq_penalty[irq]++;
822
                        if (dev != dev2)
823
                                printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
824
                }
825
        }
826
        return 1;
827
}
828
 
829
static void __init pcibios_fixup_irqs(void)
830
{
831
        struct pci_dev *dev = NULL;
832
        u8 pin;
833
 
834
        DBG("PCI: IRQ fixup\n");
835
        while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
836
                /*
837
                 * If the BIOS has set an out of range IRQ number, just ignore it.
838
                 * Also keep track of which IRQ's are already in use.
839
                 */
840
                if (dev->irq >= 16) {
841
                        DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
842
                        dev->irq = 0;
843
                }
844
                /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
845
                if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
846
                        pirq_penalty[dev->irq] = 0;
847
                pirq_penalty[dev->irq]++;
848
        }
849
 
850
        dev = NULL;
851
        while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
852
                pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
853
#ifdef CONFIG_X86_IO_APIC
854
                /*
855
                 * Recalculate IRQ numbers if we use the I/O APIC.
856
                 */
857
                if (io_apic_assign_pci_irqs)
858
                {
859
                        int irq;
860
 
861
                        if (pin) {
862
                                pin--;          /* interrupt pins are numbered starting from 1 */
863
                                irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
864
        /*
865
         * Busses behind bridges are typically not listed in the MP-table.
866
         * In this case we have to look up the IRQ based on the parent bus,
867
         * parent slot, and pin number. The SMP code detects such bridged
868
         * busses itself so we should get into this branch reliably.
869
         */
870
                                if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
871
                                        struct pci_dev * bridge = dev->bus->self;
872
 
873
                                        pin = (pin + PCI_SLOT(dev->devfn)) % 4;
874
                                        irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
875
                                                        PCI_SLOT(bridge->devfn), pin);
876
                                        if (irq >= 0)
877
                                                printk(KERN_WARNING "PCI: using PPB(B%d,I%d,P%d) to get irq %d\n",
878
                                                        bridge->bus->number, PCI_SLOT(bridge->devfn), pin, irq);
879
                                }
880
                                if (irq >= 0) {
881
                                        printk(KERN_INFO "PCI->APIC IRQ transform: (B%d,I%d,P%d) -> %d\n",
882
                                                dev->bus->number, PCI_SLOT(dev->devfn), pin, irq);
883
                                        dev->irq = irq;
884
                                }
885
                        }
886
                }
887
#endif
888
                /*
889
                 * Still no IRQ? Try to lookup one...
890
                 */
891
                if (pin && !dev->irq)
892
                        pcibios_lookup_irq(dev, 0);
893
        }
894
}
895
 
896
int __init pcibios_irq_init(void)
897
{
898
        DBG("PCI: IRQ init\n");
899
 
900
        if (pcibios_enable_irq)
901
                return 0;
902
 
903
        pirq_table = pirq_find_routing_table();
904
 
905
#ifdef CONFIG_PCI_BIOS
906
        if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
907
                pirq_table = pcibios_get_irq_routing_table();
908
#endif
909
        if (pirq_table) {
910
                pirq_peer_trick();
911
                pirq_find_router(&pirq_router);
912
                if (pirq_table->exclusive_irqs) {
913
                        int i;
914
                        for (i=0; i<16; i++)
915
                                if (!(pirq_table->exclusive_irqs & (1 << i)))
916
                                        pirq_penalty[i] += 100;
917
                }
918
                /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
919
                if (io_apic_assign_pci_irqs)
920
                        pirq_table = NULL;
921
        }
922
 
923
        pcibios_enable_irq = pirq_enable_irq;
924
 
925
        pcibios_fixup_irqs();
926
        return 0;
927
}
928
 
929
subsys_initcall(pcibios_irq_init);
930
 
931
 
932
void pcibios_penalize_isa_irq(int irq)
933
{
934
        /*
935
         *  If any ISAPnP device reports an IRQ in its list of possible
936
         *  IRQ's, we try to avoid assigning it to PCI devices.
937
         */
938
        pirq_penalty[irq] += 100;
939
}
940
 
941
int pirq_enable_irq(struct pci_dev *dev)
942
{
943
        u8 pin;
944
        extern int interrupt_line_quirk;
945
        pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
946
        if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
947
                char *msg;
948
                if (io_apic_assign_pci_irqs)
949
                        msg = " Probably buggy MP table.";
950
                else if (pci_probe & PCI_BIOS_IRQ_SCAN)
951
                        msg = "";
952
                else
953
                        msg = " Please try using pci=biosirq.";
954
 
955
                /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
956
                if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
957
                        return 0;
958
 
959
                printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
960
                       'A' + pin - 1, pci_name(dev), msg);
961
        }
962
        /* VIA bridges use interrupt line for apic/pci steering across
963
           the V-Link */
964
        else if (interrupt_line_quirk)
965
                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
966
        return 0;
967
}