WebSVN - shark - Blame - Rev 489 - /shark/trunk/drivers/fb/matrox/matroxfb

Rev	Author	Line No.	Line
489	giacomo	1	/*
		2	*
		3	* Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
		4	*
		5	* (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
		6	*
		7	* Portions Copyright (c) 2001 Matrox Graphics Inc.
		8	*
		9	* Version: 1.65 2002/08/14
		10	*
		11	* MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
		12	*
		13	* Contributors: "menion?" <menion@mindless.com>
		14	* Betatesting, fixes, ideas
		15	*
		16	* "Kurt Garloff" <garloff@suse.de>
		17	* Betatesting, fixes, ideas, videomodes, videomodes timmings
		18	*
		19	* "Tom Rini" <trini@kernel.crashing.org>
		20	* MTRR stuff, PPC cleanups, betatesting, fixes, ideas
		21	*
		22	* "Bibek Sahu" <scorpio@dodds.net>
		23	* Access device through readb\|w\|l and write b\|w\|l
		24	* Extensive debugging stuff
		25	*
		26	* "Daniel Haun" <haund@usa.net>
		27	* Testing, hardware cursor fixes
		28	*
		29	* "Scott Wood" <sawst46+@pitt.edu>
		30	* Fixes
		31	*
		32	* "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
		33	* Betatesting
		34	*
		35	* "Kelly French" <targon@hazmat.com>
		36	* "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
		37	* Betatesting, bug reporting
		38	*
		39	* "Pablo Bianucci" <pbian@pccp.com.ar>
		40	* Fixes, ideas, betatesting
		41	*
		42	* "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
		43	* Fixes, enhandcements, ideas, betatesting
		44	*
		45	* "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
		46	* PPC betatesting, PPC support, backward compatibility
		47	*
		48	* "Paul Womar" <Paul@pwomar.demon.co.uk>
		49	* "Owen Waller" <O.Waller@ee.qub.ac.uk>
		50	* PPC betatesting
		51	*
		52	* "Thomas Pornin" <pornin@bolet.ens.fr>
		53	* Alpha betatesting
		54	*
		55	* "Pieter van Leuven" <pvl@iae.nl>
		56	* "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
		57	* G100 testing
		58	*
		59	* "H. Peter Arvin" <hpa@transmeta.com>
		60	* Ideas
		61	*
		62	* "Cort Dougan" <cort@cs.nmt.edu>
		63	* CHRP fixes and PReP cleanup
		64	*
		65	* "Mark Vojkovich" <mvojkovi@ucsd.edu>
		66	* G400 support
		67	*
		68	* "Samuel Hocevar" <sam@via.ecp.fr>
		69	* Fixes
		70	*
		71	* "Anton Altaparmakov" <AntonA@bigfoot.com>
		72	* G400 MAX/non-MAX distinction
		73	*
		74	* "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
		75	* memtype extension (needed for GXT130P RS/6000 adapter)
		76	*
		77	* "Uns Lider" <unslider@miranda.org>
		78	* G100 PLNWT fixes
		79	*
		80	* "Denis Zaitsev" <zzz@cd-club.ru>
		81	* Fixes
		82	*
		83	* "Mike Pieper" <mike@pieper-family.de>
		84	* TVOut enhandcements, V4L2 control interface.
		85	*
		86	* "Diego Biurrun" <diego@biurrun.de>
		87	* DFP testing
		88	*
		89	* (following author is not in any relation with this code, but his code
		90	* is included in this driver)
		91	*
		92	* Based on framebuffer driver for VBE 2.0 compliant graphic boards
		93	* (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
		94	*
		95	* (following author is not in any relation with this code, but his ideas
		96	* were used when writting this driver)
		97	*
		98	* FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
		99	*
		100	*/
		101
		102	/* make checkconfig does not check included files... */
		103
		104	#include <linuxcomp.h>
		105
		106	#include <linux/config.h>
		107	#include <linux/version.h>
		108
		109	#include "matroxfb_base.h"
		110	#include "matroxfb_misc.h"
		111	#include "matroxfb_accel.h"
		112	#include "matroxfb_DAC1064.h"
		113	#include "matroxfb_Ti3026.h"
		114	#include "matroxfb_maven.h"
		115	#include "matroxfb_crtc2.h"
		116	#include "matroxfb_g450.h"
		117	#include <linux/matroxfb.h>
		118	#include <linux/interrupt.h>
		119	#include <asm/uaccess.h>
		120
		121	#ifdef CONFIG_PPC_PMAC
		122	unsigned char nvram_read_byte(int);
		123	static int default_vmode = VMODE_NVRAM;
		124	static int default_cmode = CMODE_NVRAM;
		125	#endif
		126
		127	static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
		128
		129	/* --------------------------------------------------------------------- */
		130
		131	/*
		132	* card parameters
		133	*/
		134
		135	/* --------------------------------------------------------------------- */
		136
		137	static struct fb_var_screeninfo vesafb_defined = {
		138	640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
		139	0,0, /* virtual -> visible no offset */
		140	8, /* depth -> load bits_per_pixel */
		141	0, /* greyscale ? */
		142	{0,0,0}, /* R */
		143	{0,0,0}, /* G */
		144	{0,0,0}, /* B */
		145	{0,0,0}, /* transparency */
		146	0, /* standard pixel format */
		147	FB_ACTIVATE_NOW,
		148	-1,-1,
		149	FB_ACCELF_TEXT, /* accel flags */
		150	39721L,48L,16L,33L,10L,
		151	96L,2L,~0, /* No sync info */
		152	FB_VMODE_NONINTERLACED,
		153	0, {0,0,0,0,0}
		154	};
		155
		156
		157
		158	/* --------------------------------------------------------------------- */
		159	static void update_crtc2(WPMINFO unsigned int pos) {
		160	struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
		161
		162	/* Make sure that displays are compatible */
		163	if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
		164	&& (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
		165	&& (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
		166	) {
		167	switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
		168	case 16:
		169	case 32:
		170	pos = pos * 8;
		171	if (info->interlaced) {
		172	mga_outl(0x3C2C, pos);
		173	mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
		174	} else {
		175	mga_outl(0x3C28, pos);
		176	}
		177	break;
		178	}
		179	}
		180	}
		181
		182	static void matroxfb_crtc1_panpos(WPMINFO2) {
		183	if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
		184	unsigned long flags;
		185	int panpos;
		186
		187	matroxfb_DAC_lock_irqsave(flags);
		188	panpos = ACCESS_FBINFO(crtc1.panpos);
		189	if (panpos >= 0) {
		190	unsigned int extvga_reg;
		191
		192	ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
		193	extvga_reg = mga_inb(M_EXTVGA_INDEX);
		194	mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
		195	if (extvga_reg != 0x00) {
		196	mga_outb(M_EXTVGA_INDEX, extvga_reg);
		197	}
		198	}
		199	matroxfb_DAC_unlock_irqrestore(flags);
		200	}
		201	}
		202
		203	static irqreturn_t matrox_irq(int irq, void dev_id, struct pt_regs fp)
		204	{
		205	u_int32_t status;
		206	int handled = 0;
		207
		208	MINFO_FROM(dev_id);
		209
		210	status = mga_inl(M_STATUS);
		211
		212	if (status & 0x20) {
		213	mga_outl(M_ICLEAR, 0x20);
		214	ACCESS_FBINFO(crtc1.vsync.cnt)++;
		215	matroxfb_crtc1_panpos(PMINFO2);
		216	//wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
		217	handled = 1;
		218	}
		219	if (status & 0x200) {
		220	mga_outl(M_ICLEAR, 0x200);
		221	ACCESS_FBINFO(crtc2.vsync.cnt)++;
		222	//wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
		223	handled = 1;
		224	}
		225	return IRQ_RETVAL(handled);
		226	}
		227
		228	int matroxfb_enable_irq(WPMINFO int reenable) {
		229	u_int32_t bm;
		230
		231	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
		232	bm = 0x220;
		233	else
		234	bm = 0x020;
		235
		236	if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
		237	if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
		238	SA_SHIRQ, "matroxfb", MINFO)) {
		239	clear_bit(0, &ACCESS_FBINFO(irq_flags));
		240	return -EINVAL;
		241	}
		242	/* Clear any pending field interrupts */
		243	mga_outl(M_ICLEAR, bm);
		244	mga_outl(M_IEN, mga_inl(M_IEN) \| bm);
		245	} else if (reenable) {
		246	u_int32_t ien;
		247
		248	ien = mga_inl(M_IEN);
		249	if ((ien & bm) != bm) {
		250	printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", (int)ien);
		251	mga_outl(M_IEN, ien \| bm);
		252	}
		253	}
		254	return 0;
		255	}
		256
		257	static void matroxfb_disable_irq(WPMINFO2) {
		258	if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
		259	/* Flush pending pan-at-vbl request... */
		260	matroxfb_crtc1_panpos(PMINFO2);
		261	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
		262	mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
		263	else
		264	mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
		265	free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
		266	}
		267	}
		268
		269	int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
		270	wait_queue_t __wait;
		271	struct matrox_vsync *vs;
		272	unsigned int cnt;
		273	int ret;
		274
		275	switch (crtc) {
		276	case 0:
		277	vs = &ACCESS_FBINFO(crtc1.vsync);
		278	break;
		279	case 1:
		280	if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
		281	return -ENODEV;
		282	}
		283	vs = &ACCESS_FBINFO(crtc2.vsync);
		284	break;
		285	default:
		286	return -ENODEV;
		287	}
		288	ret = matroxfb_enable_irq(PMINFO 0);
		289	if (ret) {
		290	return ret;
		291	}
		292	//init_waitqueue_entry(&__wait, current);
		293
		294	cnt = vs->cnt;
		295	ret = 1;//ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
		296	if (ret < 0) {
		297	return ret;
		298	}
		299	if (ret == 0) {
		300	matroxfb_enable_irq(PMINFO 1);
		301	return -ETIMEDOUT;
		302	}
		303	return 0;
		304	}
		305
		306	/* --------------------------------------------------------------------- */
		307
		308	static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
		309	unsigned int pos;
		310	unsigned short p0, p1, p2;
		311	#ifdef CONFIG_FB_MATROX_32MB
		312	unsigned int p3;
		313	#endif
		314	int vbl;
		315	unsigned long flags;
		316
		317	CRITFLAGS
		318
		319	DBG(__FUNCTION__)
		320
		321	if (ACCESS_FBINFO(dead))
		322	return;
		323
		324	ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
		325	ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
		326	pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
		327	pos += ACCESS_FBINFO(curr.ydstorg.chunks);
		328	p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
		329	p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
		330	p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) \| ((pos >> 16) & 0x0F) \| ((pos >> 14) & 0x40);
		331	#ifdef CONFIG_FB_MATROX_32MB
		332	p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
		333	#endif
		334
		335	/* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
		336	vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
		337
		338	CRITBEGIN
		339
		340	matroxfb_DAC_lock_irqsave(flags);
		341	mga_setr(M_CRTC_INDEX, 0x0D, p0);
		342	mga_setr(M_CRTC_INDEX, 0x0C, p1);
		343	#ifdef CONFIG_FB_MATROX_32MB
		344	if (ACCESS_FBINFO(devflags.support32MB))
		345	mga_setr(M_EXTVGA_INDEX, 0x08, p3);
		346	#endif
		347	if (vbl) {
		348	ACCESS_FBINFO(crtc1.panpos) = p2;
		349	} else {
		350	/* Abort any pending change */
		351	ACCESS_FBINFO(crtc1.panpos) = -1;
		352	mga_setr(M_EXTVGA_INDEX, 0x00, p2);
		353	}
		354	matroxfb_DAC_unlock_irqrestore(flags);
		355
		356	update_crtc2(PMINFO pos);
		357
		358	CRITEND
		359	}
		360
		361	static void matroxfb_remove(WPMINFO int dummy) {
		362	/* Currently we are holding big kernel lock on all dead & usecount updates.
		363	* Destroy everything after all users release it. Especially do not unregister
		364	* framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
		365	* for device unplugged when in use.
		366	* In future we should point mmio.vbase & video.vbase somewhere where we can
		367	* write data without causing too much damage...
		368	*/
		369
		370	ACCESS_FBINFO(dead) = 1;
		371	if (ACCESS_FBINFO(usecount)) {
		372	/* destroy it later */
		373	return;
		374	}
		375	matroxfb_unregister_device(MINFO);
		376	unregister_framebuffer(&ACCESS_FBINFO(fbcon));
		377	matroxfb_g450_shutdown(PMINFO2);
		378	#ifdef CONFIG_MTRR
		379	if (ACCESS_FBINFO(mtrr.vram_valid))
		380	mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
		381	#endif
		382	mga_iounmap(ACCESS_FBINFO(mmio.vbase));
		383	mga_iounmap(ACCESS_FBINFO(video.vbase));
		384	release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
		385	release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
		386	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		387	kfree(minfo);
		388	#endif
		389	}
		390
		391	/*
		392	* Open/Release the frame buffer device
		393	*/
		394
		395	static int matroxfb_open(struct fb_info *info, int user)
		396	{
		397	MINFO_FROM_INFO(info);
		398
		399	DBG_LOOP(__FUNCTION__)
		400
		401	if (ACCESS_FBINFO(dead)) {
		402	return -ENXIO;
		403	}
		404	ACCESS_FBINFO(usecount)++;
		405	if (user) {
		406	ACCESS_FBINFO(userusecount)++;
		407	}
		408	return(0);
		409	}
		410
		411	static int matroxfb_release(struct fb_info *info, int user)
		412	{
		413	MINFO_FROM_INFO(info);
		414
		415	DBG_LOOP(__FUNCTION__)
		416
		417	if (user) {
		418	if (0 == --ACCESS_FBINFO(userusecount)) {
		419	matroxfb_disable_irq(PMINFO2);
		420	}
		421	}
		422	if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
		423	matroxfb_remove(PMINFO 0);
		424	}
		425	return(0);
		426	}
		427
		428	static int matroxfb_pan_display(struct fb_var_screeninfo *var,
		429	struct fb_info* info) {
		430	MINFO_FROM_INFO(info);
		431
		432	DBG(__FUNCTION__)
		433
		434	matrox_pan_var(PMINFO var);
		435	return 0;
		436	}
		437
		438	static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
		439	int bppshft2;
		440
		441	DBG(__FUNCTION__)
		442
		443	bppshft2 = bpp;
		444	if (!bppshft2) {
		445	return 8;
		446	}
		447	if (isInterleave(MINFO))
		448	bppshft2 >>= 1;
		449	if (ACCESS_FBINFO(devflags.video64bits))
		450	bppshft2 >>= 1;
		451	return bppshft2;
		452	}
		453
		454	static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
		455	int over;
		456	int rounding;
		457
		458	DBG(__FUNCTION__)
		459
		460	switch (bpp) {
		461	case 0: return xres;
		462	case 4: rounding = 128;
		463	break;
		464	case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
		465	break;
		466	case 16: rounding = 32;
		467	break;
		468	case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
		469	break;
		470	default: rounding = 16;
		471	/* on G400, 16 really does not work */
		472	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
		473	rounding = 32;
		474	break;
		475	}
		476	if (isInterleave(MINFO)) {
		477	rounding *= 2;
		478	}
		479	over = xres % rounding;
		480	if (over)
		481	xres += rounding-over;
		482	return xres;
		483	}
		484
		485	static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
		486	const int* width;
		487	int xres_new;
		488
		489	DBG(__FUNCTION__)
		490
		491	if (!bpp) return xres;
		492
		493	width = ACCESS_FBINFO(capable.vxres);
		494
		495	if (ACCESS_FBINFO(devflags.precise_width)) {
		496	while (*width) {
		497	if ((width >= xres) && (matroxfb_test_and_set_rounding(PMINFO width, bpp) == *width)) {
		498	break;
		499	}
		500	width++;
		501	}
		502	xres_new = *width;
		503	} else {
		504	xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
		505	}
		506	if (!xres_new) return 0;
		507	if (xres != xres_new) {
		508	printk(KERN_INFO "matroxfb: cannot set xres to %d, rounded up to %d\n", xres, xres_new);
		509	}
		510	return xres_new;
		511	}
		512
		513	static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
		514
		515	DBG(__FUNCTION__)
		516
		517	switch (var->bits_per_pixel) {
		518	case 4:
		519	return 16; /* pseudocolor... 16 entries HW palette */
		520	case 8:
		521	return 256; /* pseudocolor... 256 entries HW palette */
		522	case 16:
		523	return 16; /* directcolor... 16 entries SW palette */
		524	/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
		525	case 24:
		526	return 16; /* directcolor... 16 entries SW palette */
		527	/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
		528	case 32:
		529	return 16; /* directcolor... 16 entries SW palette */
		530	/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
		531	}
		532	return 16; /* return something reasonable... or panic()? */
		533	}
		534
		535	static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo var, int visual, int video_cmap_len, unsigned int ydstorg) {
		536	struct RGBT {
		537	unsigned char bpp;
		538	struct {
		539	unsigned char offset,
		540	length;
		541	} red,
		542	green,
		543	blue,
		544	transp;
		545	signed char visual;
		546	};
		547	static const struct RGBT table[]= {
		548	{ 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
		549	{15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
		550	{16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
		551	{24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
		552	{32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
		553	};
		554	struct RGBT const *rgbt;
		555	unsigned int bpp = var->bits_per_pixel;
		556	unsigned int vramlen;
		557	unsigned int memlen;
		558
		559	DBG(__FUNCTION__)
		560
		561	switch (bpp) {
		562	case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
		563	break;
		564	case 8: break;
		565	case 16: break;
		566	case 24: break;
		567	case 32: break;
		568	default: return -EINVAL;
		569	}
		570	*ydstorg = 0;
		571	vramlen = ACCESS_FBINFO(video.len_usable);
		572	if (var->yres_virtual < var->yres)
		573	var->yres_virtual = var->yres;
		574	if (var->xres_virtual < var->xres)
		575	var->xres_virtual = var->xres;
		576
		577	var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
		578	memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
		579	if (memlen > vramlen) {
		580	var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
		581	memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
		582	}
		583	/* There is hardware bug that no line can cross 4MB boundary */
		584	/* give up for CFB24, it is impossible to easy workaround it */
		585	/* for other try to do something */
		586	if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
		587	if (bpp == 24) {
		588	/* sorry */
		589	} else {
		590	unsigned int linelen;
		591	unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
		592	unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
		593	unsigned int max_yres;
		594
		595	while (m1) {
		596	int t;
		597
		598	while (m2 >= m1) m2 -= m1;
		599	t = m1;
		600	m1 = m2;
		601	m2 = t;
		602	}
		603	m2 = linelen * PAGE_SIZE / m2;
		604	*ydstorg = m2 = 0x400000 % m2;
		605	max_yres = (vramlen - m2) / linelen;
		606	if (var->yres_virtual > max_yres)
		607	var->yres_virtual = max_yres;
		608	}
		609	}
		610	/* YDSTLEN contains only signed 16bit value */
		611	if (var->yres_virtual > 32767)
		612	var->yres_virtual = 32767;
		613	/* we must round yres/xres down, we already rounded y/xres_virtual up
		614	if it was possible. We should return -EINVAL, but I disagree */
		615	if (var->yres_virtual < var->yres)
		616	var->yres = var->yres_virtual;
		617	if (var->xres_virtual < var->xres)
		618	var->xres = var->xres_virtual;
		619	if (var->xoffset + var->xres > var->xres_virtual)
		620	var->xoffset = var->xres_virtual - var->xres;
		621	if (var->yoffset + var->yres > var->yres_virtual)
		622	var->yoffset = var->yres_virtual - var->yres;
		623
		624	if (bpp == 16 && var->green.length == 5) {
		625	bpp--; /* an artifical value - 15 */
		626	}
		627
		628	for (rgbt = table; rgbt->bpp < bpp; rgbt++);
		629	#define SETCLR(clr)\
		630	var->clr.offset = rgbt->clr.offset;\
		631	var->clr.length = rgbt->clr.length
		632	SETCLR(red);
		633	SETCLR(green);
		634	SETCLR(blue);
		635	SETCLR(transp);
		636	#undef SETCLR
		637	*visual = rgbt->visual;
		638
		639	if (bpp > 8)
		640	dprintk("matroxfb: truecolor: "
		641	"size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
		642	var->transp.length, var->red.length, var->green.length, var->blue.length,
		643	var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
		644
		645	*video_cmap_len = matroxfb_get_cmap_len(var);
		646	dprintk(KERN_INFO "requested %d%d/%dbpp (%d%d)\n", var->xres, var->yres, var->bits_per_pixel,
		647	var->xres_virtual, var->yres_virtual);
		648	return 0;
		649	}
		650
		651	static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
		652	unsigned blue, unsigned transp,
		653	struct fb_info *fb_info)
		654	{
		655	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		656	struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
		657	#endif
		658
		659	DBG(__FUNCTION__)
		660
		661	/*
		662	* Set a single color register. The values supplied are
		663	* already rounded down to the hardware's capabilities
		664	* (according to the entries in the `var' structure). Return
		665	* != 0 for invalid regno.
		666	*/
		667
		668	if (regno >= ACCESS_FBINFO(curr.cmap_len))
		669	return 1;
		670
		671	if (ACCESS_FBINFO(fbcon).var.grayscale) {
		672	/* gray = 0.30R + 0.59G + 0.11B /
		673	red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
		674	}
		675
		676	red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
		677	green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
		678	blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
		679	transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
		680
		681	switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
		682	case 4:
		683	case 8:
		684	mga_outb(M_DAC_REG, regno);
		685	mga_outb(M_DAC_VAL, red);
		686	mga_outb(M_DAC_VAL, green);
		687	mga_outb(M_DAC_VAL, blue);
		688	break;
		689	case 16:
		690	{
		691	u_int16_t col =
		692	(red << ACCESS_FBINFO(fbcon).var.red.offset) \|
		693	(green << ACCESS_FBINFO(fbcon).var.green.offset) \|
		694	(blue << ACCESS_FBINFO(fbcon).var.blue.offset) \|
		695	(transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
		696	ACCESS_FBINFO(cmap[regno]) = col \| (col << 16);
		697	}
		698	break;
		699	case 24:
		700	case 32:
		701	ACCESS_FBINFO(cmap[regno]) =
		702	(red << ACCESS_FBINFO(fbcon).var.red.offset) \|
		703	(green << ACCESS_FBINFO(fbcon).var.green.offset) \|
		704	(blue << ACCESS_FBINFO(fbcon).var.blue.offset) \|
		705	(transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
		706	break;
		707	}
		708	return 0;
		709	}
		710
		711	static void matroxfb_init_fix(WPMINFO2)
		712	{
		713	struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
		714	DBG(__FUNCTION__)
		715
		716	strcpy(fix->id,"MATROX");
		717
		718	fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
		719	fix->ypanstep = 1;
		720	fix->ywrapstep = 0;
		721	fix->mmio_start = ACCESS_FBINFO(mmio.base);
		722	fix->mmio_len = ACCESS_FBINFO(mmio.len);
		723	fix->accel = ACCESS_FBINFO(devflags.accelerator);
		724	}
		725
		726	static void matroxfb_update_fix(WPMINFO2)
		727	{
		728	struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
		729	DBG(__FUNCTION__)
		730
		731	fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
		732	fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
		733	}
		734
		735	static int matroxfb_check_var(struct fb_var_screeninfo var, struct fb_info info)
		736	{
		737	int err;
		738	int visual;
		739	int cmap_len;
		740	unsigned int ydstorg;
		741	MINFO_FROM_INFO(info);
		742
		743	if (ACCESS_FBINFO(dead)) {
		744	return -ENXIO;
		745	}
		746	if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
		747	return err;
		748	return 0;
		749	}
		750
		751	static int matroxfb_set_par(struct fb_info *info)
		752	{
		753	int err;
		754	int visual;
		755	int cmap_len;
		756	unsigned int ydstorg;
		757	struct fb_var_screeninfo *var;
		758	MINFO_FROM_INFO(info);
		759
		760	DBG(__FUNCTION__)
		761
		762	if (ACCESS_FBINFO(dead)) {
		763	return -ENXIO;
		764	}
		765
		766	var = &info->var;
		767	if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
		768	return err;
		769	ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
		770	matroxfb_update_fix(PMINFO2);
		771	ACCESS_FBINFO(fbcon).fix.visual = visual;
		772	ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
		773	ACCESS_FBINFO(fbcon).fix.type_aux = 0;
		774	ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
		775	{
		776	unsigned int pos;
		777
		778	ACCESS_FBINFO(curr.cmap_len) = cmap_len;
		779	ydstorg += ACCESS_FBINFO(devflags.ydstorg);
		780	ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
		781	ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
		782	if (var->bits_per_pixel == 4)
		783	ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
		784	else
		785	ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
		786	ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
		787	{ struct my_timming mt;
		788	struct matrox_hw_state* hw;
		789	int out;
		790
		791	matroxfb_var2my(var, &mt);
		792	mt.crtc = MATROXFB_SRC_CRTC1;
		793	/* CRTC1 delays */
		794	switch (var->bits_per_pixel) {
		795	case 0: mt.delay = 31 + 0; break;
		796	case 16: mt.delay = 21 + 8; break;
		797	case 24: mt.delay = 17 + 8; break;
		798	case 32: mt.delay = 16 + 8; break;
		799	default: mt.delay = 31 + 8; break;
		800	}
		801
		802	hw = &ACCESS_FBINFO(hw);
		803
		804	//down_read(&ACCESS_FBINFO(altout).lock);
		805	for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
		806	if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
		807	ACCESS_FBINFO(outputs[out]).output->compute) {
		808	ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
		809	}
		810	}
		811	//up_read(&ACCESS_FBINFO(altout).lock);
		812	ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
		813	ACCESS_FBINFO(crtc1).mnp = mt.mnp;
		814	ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
		815	pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
		816	pos += ACCESS_FBINFO(curr.ydstorg.chunks);
		817
		818	hw->CRTC[0x0D] = pos & 0xFF;
		819	hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
		820	hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) \| ((pos >> 16) & 0x0F) \| ((pos >> 14) & 0x40);
		821	hw->CRTCEXT[8] = pos >> 21;
		822	ACCESS_FBINFO(hw_switch->restore(PMINFO2));
		823	update_crtc2(PMINFO pos);
		824	//down_read(&ACCESS_FBINFO(altout).lock);
		825	for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
		826	if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
		827	ACCESS_FBINFO(outputs[out]).output->program) {
		828	ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
		829	}
		830	}
		831	for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
		832	if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
		833	ACCESS_FBINFO(outputs[out]).output->start) {
		834	ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
		835	}
		836	}
		837	//up_read(&ACCESS_FBINFO(altout).lock);
		838	matrox_cfbX_init(PMINFO2);
		839	}
		840	}
		841	return 0;
		842	}
		843
		844	static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
		845	{
		846	unsigned int sts1;
		847
		848	matroxfb_enable_irq(PMINFO 0);
		849	memset(vblank, 0, sizeof(*vblank));
		850	vblank->flags = FB_VBLANK_HAVE_VCOUNT \| FB_VBLANK_HAVE_VSYNC \|
		851	FB_VBLANK_HAVE_VBLANK \| FB_VBLANK_HAVE_HBLANK;
		852	sts1 = mga_inb(M_INSTS1);
		853	vblank->vcount = mga_inl(M_VCOUNT);
		854	/* BTW, on my PIII/450 with G400, reading M_INSTS1
		855	byte makes this call about 12% slower (1.70 vs. 2.05 us
		856	per ioctl()) */
		857	if (sts1 & 1)
		858	vblank->flags \|= FB_VBLANK_HBLANKING;
		859	if (sts1 & 8)
		860	vblank->flags \|= FB_VBLANK_VSYNCING;
		861	if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
		862	vblank->flags \|= FB_VBLANK_VBLANKING;
		863	if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
		864	vblank->flags \|= FB_VBLANK_HAVE_COUNT;
		865	/* Only one writer, aligned int value...
		866	it should work without lock and without atomic_t */
		867	vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
		868	}
		869	return 0;
		870	}
		871
		872	static struct matrox_altout panellink_output = {
		873	.name = "Panellink output",
		874	};
		875
		876	static int matroxfb_ioctl(struct inode inode, struct file file,
		877	unsigned int cmd, unsigned long arg,
		878	struct fb_info *info)
		879	{
		880	MINFO_FROM_INFO(info);
		881
		882	DBG(__FUNCTION__)
		883
		884	if (ACCESS_FBINFO(dead)) {
		885	return -ENXIO;
		886	}
		887
		888	switch (cmd) {
		889	case FBIOGET_VBLANK:
		890	{
		891	struct fb_vblank vblank;
		892	int err;
		893
		894	err = matroxfb_get_vblank(PMINFO &vblank);
		895	if (err)
		896	return err;
		897	if (copy_to_user((struct fb_vblank*)arg, &vblank, sizeof(vblank)))
		898	return -EFAULT;
		899	return 0;
		900	}
		901	case FBIO_WAITFORVSYNC:
		902	{
		903	u_int32_t crt;
		904
		905	crt = (u_int32_t )arg;
		906
		907	return matroxfb_wait_for_sync(PMINFO crt);
		908	}
		909	case MATROXFB_SET_OUTPUT_MODE:
		910	{
		911	struct matroxioc_output_mode mom;
		912	struct matrox_altout *oproc;
		913	int val;
		914
		915	if (copy_from_user(&mom, (struct matroxioc_output_mode*)arg, sizeof(mom)))
		916	return -EFAULT;
		917	if (mom.output >= MATROXFB_MAX_OUTPUTS)
		918	return -ENXIO;
		919	//down_read(&ACCESS_FBINFO(altout.lock));
		920	oproc = ACCESS_FBINFO(outputs[mom.output]).output;
		921	if (!oproc) {
		922	val = -ENXIO;
		923	} else if (!oproc->verifymode) {
		924	if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
		925	val = 0;
		926	} else {
		927	val = -EINVAL;
		928	}
		929	} else {
		930	val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
		931	}
		932	if (!val) {
		933	if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
		934	ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
		935	val = 1;
		936	}
		937	}
		938	//up_read(&ACCESS_FBINFO(altout.lock));
		939	if (val != 1)
		940	return val;
		941	switch (ACCESS_FBINFO(outputs[mom.output]).src) {
		942	case MATROXFB_SRC_CRTC1:
		943	matroxfb_set_par(info);
		944	break;
		945	case MATROXFB_SRC_CRTC2:
		946	{
		947	struct matroxfb_dh_fb_info* crtc2;
		948
		949	//down_read(&ACCESS_FBINFO(crtc2.lock));
		950	crtc2 = ACCESS_FBINFO(crtc2.info);
		951	if (crtc2)
		952	crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
		953	//up_read(&ACCESS_FBINFO(crtc2.lock));
		954	}
		955	break;
		956	}
		957	return 0;
		958	}
		959	case MATROXFB_GET_OUTPUT_MODE:
		960	{
		961	struct matroxioc_output_mode mom;
		962	struct matrox_altout *oproc;
		963	int val;
		964
		965	if (copy_from_user(&mom, (struct matroxioc_output_mode*)arg, sizeof(mom)))
		966	return -EFAULT;
		967	if (mom.output >= MATROXFB_MAX_OUTPUTS)
		968	return -ENXIO;
		969	//down_read(&ACCESS_FBINFO(altout.lock));
		970	oproc = ACCESS_FBINFO(outputs[mom.output]).output;
		971	if (!oproc) {
		972	val = -ENXIO;
		973	} else {
		974	mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
		975	val = 0;
		976	}
		977	//up_read(&ACCESS_FBINFO(altout.lock));
		978	if (val)
		979	return val;
		980	if (copy_to_user((struct matroxioc_output_mode*)arg, &mom, sizeof(mom)))
		981	return -EFAULT;
		982	return 0;
		983	}
		984	case MATROXFB_SET_OUTPUT_CONNECTION:
		985	{
		986	u_int32_t tmp;
		987	int i;
		988	int changes;
		989
		990	if (copy_from_user(&tmp, (u_int32_t*)arg, sizeof(tmp)))
		991	return -EFAULT;
		992	for (i = 0; i < 32; i++) {
		993	if (tmp & (1 << i)) {
		994	if (i >= MATROXFB_MAX_OUTPUTS)
		995	return -ENXIO;
		996	if (!ACCESS_FBINFO(outputs[i]).output)
		997	return -ENXIO;
		998	switch (ACCESS_FBINFO(outputs[i]).src) {
		999	case MATROXFB_SRC_NONE:
		1000	case MATROXFB_SRC_CRTC1:
		1001	break;
		1002	default:
		1003	return -EBUSY;
		1004	}
		1005	}
		1006	}
		1007	if (ACCESS_FBINFO(devflags.panellink)) {
		1008	if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
		1009	if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
		1010	return -EINVAL;
		1011	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1012	if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
		1013	return -EBUSY;
		1014	}
		1015	}
		1016	}
		1017	}
		1018	changes = 0;
		1019	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1020	if (tmp & (1 << i)) {
		1021	if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
		1022	changes = 1;
		1023	ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
		1024	}
		1025	} else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
		1026	changes = 1;
		1027	ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
		1028	}
		1029	}
		1030	if (!changes)
		1031	return 0;
		1032	matroxfb_set_par(info);
		1033	return 0;
		1034	}
		1035	case MATROXFB_GET_OUTPUT_CONNECTION:
		1036	{
		1037	u_int32_t conn = 0;
		1038	int i;
		1039
		1040	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1041	if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
		1042	conn \|= 1 << i;
		1043	}
		1044	}
		1045	if (put_user(conn, (u_int32_t*)arg))
		1046	return -EFAULT;
		1047	return 0;
		1048	}
		1049	case MATROXFB_GET_AVAILABLE_OUTPUTS:
		1050	{
		1051	u_int32_t conn = 0;
		1052	int i;
		1053
		1054	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1055	if (ACCESS_FBINFO(outputs[i]).output) {
		1056	switch (ACCESS_FBINFO(outputs[i]).src) {
		1057	case MATROXFB_SRC_NONE:
		1058	case MATROXFB_SRC_CRTC1:
		1059	conn \|= 1 << i;
		1060	break;
		1061	}
		1062	}
		1063	}
		1064	if (ACCESS_FBINFO(devflags.panellink)) {
		1065	if (conn & MATROXFB_OUTPUT_CONN_DFP)
		1066	conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
		1067	if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
		1068	conn &= ~MATROXFB_OUTPUT_CONN_DFP;
		1069	}
		1070	if (put_user(conn, (u_int32_t*)arg))
		1071	return -EFAULT;
		1072	return 0;
		1073	}
		1074	case MATROXFB_GET_ALL_OUTPUTS:
		1075	{
		1076	u_int32_t conn = 0;
		1077	int i;
		1078
		1079	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1080	if (ACCESS_FBINFO(outputs[i]).output) {
		1081	conn \|= 1 << i;
		1082	}
		1083	}
		1084	if (put_user(conn, (u_int32_t*)arg))
		1085	return -EFAULT;
		1086	return 0;
		1087	}
		1088	case VIDIOC_QUERYCAP:
		1089	{
		1090	struct v4l2_capability r;
		1091
		1092	memset(&r, 0, sizeof(r));
		1093	strcpy(r.driver, "matroxfb");
		1094	strcpy(r.card, "Matrox");
		1095	sprintf26(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
		1096	r.version = KERNEL_VERSION(1,0,0);
		1097	r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
		1098	if (copy_to_user((void*)arg, &r, sizeof(r)))
		1099	return -EFAULT;
		1100	return 0;
		1101
		1102	}
		1103	case VIDIOC_QUERYCTRL:
		1104	{
		1105	struct v4l2_queryctrl qctrl;
		1106	int err;
		1107
		1108	if (copy_from_user(&qctrl, (struct v4l2_queryctrl*)arg, sizeof(qctrl)))
		1109	return -EFAULT;
		1110
		1111	//down_read(&ACCESS_FBINFO(altout).lock);
		1112	if (!ACCESS_FBINFO(outputs[1]).output) {
		1113	err = -ENXIO;
		1114	} else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
		1115	err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
		1116	} else {
		1117	err = -EINVAL;
		1118	}
		1119	//up_read(&ACCESS_FBINFO(altout).lock);
		1120	if (err >= 0 &&
		1121	copy_to_user((struct v4l2_queryctrl*)arg, &qctrl, sizeof(qctrl)))
		1122	return -EFAULT;
		1123	return err;
		1124	}
		1125	case VIDIOC_G_CTRL:
		1126	{
		1127	struct v4l2_control ctrl;
		1128	int err;
		1129
		1130	if (copy_from_user(&ctrl, (struct v4l2_control*)arg, sizeof(ctrl)))
		1131	return -EFAULT;
		1132
		1133	//down_read(&ACCESS_FBINFO(altout).lock);
		1134	if (!ACCESS_FBINFO(outputs[1]).output) {
		1135	err = -ENXIO;
		1136	} else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
		1137	err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
		1138	} else {
		1139	err = -EINVAL;
		1140	}
		1141	//up_read(&ACCESS_FBINFO(altout).lock);
		1142	if (err >= 0 &&
		1143	copy_to_user((struct v4l2_control*)arg, &ctrl, sizeof(ctrl)))
		1144	return -EFAULT;
		1145	return err;
		1146	}
		1147	case VIDIOC_S_CTRL:
		1148	{
		1149	struct v4l2_control ctrl;
		1150	int err;
		1151
		1152	if (copy_from_user(&ctrl, (struct v4l2_control*)arg, sizeof(ctrl)))
		1153	return -EFAULT;
		1154
		1155	//down_read(&ACCESS_FBINFO(altout).lock);
		1156	if (!ACCESS_FBINFO(outputs[1]).output) {
		1157	err = -ENXIO;
		1158	} else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
		1159	err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
		1160	} else {
		1161	err = -EINVAL;
		1162	}
		1163	//up_read(&ACCESS_FBINFO(altout).lock);
		1164	return err;
		1165	}
		1166	}
		1167	return -ENOTTY;
		1168	}
		1169
		1170	/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
		1171
		1172	static int matroxfb_blank(int blank, struct fb_info *info)
		1173	{
		1174	int seq;
		1175	int crtc;
		1176	CRITFLAGS
		1177	MINFO_FROM_INFO(info);
		1178
		1179	DBG(__FUNCTION__)
		1180
		1181	if (ACCESS_FBINFO(dead))
		1182	return 1;
		1183
		1184	switch (blank) {
		1185	case 1: seq = 0x20; crtc = 0x00; break; /* works ??? */
		1186	case 2: seq = 0x20; crtc = 0x10; break;
		1187	case 3: seq = 0x20; crtc = 0x20; break;
		1188	case 4: seq = 0x20; crtc = 0x30; break;
		1189	default: seq = 0x00; crtc = 0x00; break;
		1190	}
		1191
		1192	CRITBEGIN
		1193
		1194	mga_outb(M_SEQ_INDEX, 1);
		1195	mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) \| seq);
		1196	mga_outb(M_EXTVGA_INDEX, 1);
		1197	mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) \| crtc);
		1198
		1199	CRITEND
		1200	return 0;
		1201	}
		1202
		1203	static struct fb_ops matroxfb_ops = {
		1204	.owner = THIS_MODULE,
		1205	.fb_open = matroxfb_open,
		1206	.fb_release = matroxfb_release,
		1207	.fb_check_var = matroxfb_check_var,
		1208	.fb_set_par = matroxfb_set_par,
		1209	.fb_setcolreg = matroxfb_setcolreg,
		1210	.fb_pan_display =matroxfb_pan_display,
		1211	.fb_blank = matroxfb_blank,
		1212	.fb_ioctl = matroxfb_ioctl,
		1213	/* .fb_fillrect = <set by matrox_cfbX_init>, */
		1214	/* .fb_copyarea = <set by matrox_cfbX_init>, */
		1215	/* .fb_imageblit = <set by matrox_cfbX_init>, */
		1216	/* .fb_cursor = <set by matrox_cfbX_init>, */
		1217	};
		1218
		1219	#define RSDepth(X) (((X) >> 8) & 0x0F)
		1220	#define RS8bpp 0x1
		1221	#define RS15bpp 0x2
		1222	#define RS16bpp 0x3
		1223	#define RS32bpp 0x4
		1224	#define RS4bpp 0x5
		1225	#define RS24bpp 0x6
		1226	#define RSText 0x7
		1227	#define RSText8 0x8
		1228	/* 9-F */
		1229	static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
		1230	{ { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
		1231	{ { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
		1232	{ { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
		1233	{ { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
		1234	{ { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
		1235	{ { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
		1236	{ { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
		1237	{ { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
		1238	};
		1239
		1240	/* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
		1241	static unsigned int mem; /* "matrox:mem:xxxxxM" */
		1242	static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
		1243	static int inv24; /* "matrox:inv24" */
		1244	static int cross4MB = -1; /* "matrox:cross4MB" */
		1245	static int disabled; /* "matrox:disabled" */
		1246	static int noaccel; /* "matrox:noaccel" */
		1247	static int nopan; /* "matrox:nopan" */
		1248	static int no_pci_retry; /* "matrox:nopciretry" */
		1249	static int novga; /* "matrox:novga" */
		1250	static int nobios; /* "matrox:nobios" */
		1251	static int noinit = 1; /* "matrox:init" */
		1252	static int inverse; /* "matrox:inverse" */
		1253	static int sgram; /* "matrox:sgram" */
		1254	#ifdef CONFIG_MTRR
		1255	static int mtrr = 1; /* "matrox:nomtrr" */
		1256	#endif
		1257	static int grayscale; /* "matrox:grayscale" */
		1258	static int dev = -1; /* "matrox:dev:xxxxx" */
		1259	static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
		1260	static int depth = -1; /* "matrox:depth:xxxxx" */
		1261	static unsigned int xres; /* "matrox:xres:xxxxx" */
		1262	static unsigned int yres; /* "matrox:yres:xxxxx" */
		1263	static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
		1264	static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
		1265	static unsigned int vslen; /* "matrox:vslen:xxxxx" */
		1266	static unsigned int left = ~0; /* "matrox:left:xxxxx" */
		1267	static unsigned int right = ~0; /* "matrox:right:xxxxx" */
		1268	static unsigned int hslen; /* "matrox:hslen:xxxxx" */
		1269	static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
		1270	static int sync = -1; /* "matrox:sync:xxxxx" */
		1271	static unsigned int fv; /* "matrox:fv:xxxxx" */
		1272	static unsigned int fh; /* "matrox:fh:xxxxxk" */
		1273	static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
		1274	static int dfp; /* "matrox:dfp */
		1275	static int dfp_type = -1; /* "matrox:dfp:xxx */
		1276	static int memtype = -1; /* "matrox:memtype:xxx" */
		1277
		1278	#ifndef MODULE
		1279	static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
		1280	#endif
		1281
		1282	static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
		1283	vaddr_t vm;
		1284	unsigned int offs;
		1285	unsigned int offs2;
		1286	unsigned char store;
		1287	unsigned char bytes[32];
		1288	unsigned char* tmp;
		1289
		1290	DBG(__FUNCTION__)
		1291
		1292	vm = ACCESS_FBINFO(video.vbase);
		1293	maxSize &= ~0x1FFFFF; /* must be X2MB (really it must be 2 or X4MB) */
		1294	/* at least 2MB */
		1295	if (maxSize < 0x0200000) return 0;
		1296	if (maxSize > 0x2000000) maxSize = 0x2000000;
		1297
		1298	mga_outb(M_EXTVGA_INDEX, 0x03);
		1299	mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) \| 0x80);
		1300
		1301	store = mga_readb(vm, 0x1234);
		1302	tmp = bytes;
		1303	for (offs = 0x100000; offs < maxSize; offs += 0x200000)
		1304	*tmp++ = mga_readb(vm, offs);
		1305	for (offs = 0x100000; offs < maxSize; offs += 0x200000)
		1306	mga_writeb(vm, offs, 0x02);
		1307	if (ACCESS_FBINFO(features.accel.has_cacheflush))
		1308	mga_outb(M_CACHEFLUSH, 0x00);
		1309	else
		1310	mga_writeb(vm, 0x1234, 0x99);
		1311	for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
		1312	if (mga_readb(vm, offs) != 0x02)
		1313	break;
		1314	mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
		1315	if (mga_readb(vm, offs))
		1316	break;
		1317	}
		1318	tmp = bytes;
		1319	for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
		1320	mga_writeb(vm, offs2, *tmp++);
		1321	mga_writeb(vm, 0x1234, store);
		1322
		1323	mga_outb(M_EXTVGA_INDEX, 0x03);
		1324	mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) & ~0x80);
		1325
		1326	*realSize = offs - 0x100000;
		1327	#ifdef CONFIG_FB_MATROX_MILLENIUM
		1328	ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) \|\| ((offs - 0x100000) & 0x3FFFFF));
		1329	#endif
		1330	return 1;
		1331	}
		1332
		1333	struct video_board {
		1334	int maxvram;
		1335	int maxdisplayable;
		1336	int accelID;
		1337	struct matrox_switch* lowlevel;
		1338	};
		1339	#ifdef CONFIG_FB_MATROX_MILLENIUM
		1340	static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
		1341	static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
		1342	static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
		1343	#endif /* CONFIG_FB_MATROX_MILLENIUM */
		1344	#ifdef CONFIG_FB_MATROX_MYSTIQUE
		1345	static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
		1346	#endif /* CONFIG_FB_MATROX_MYSTIQUE */
		1347	#ifdef CONFIG_FB_MATROX_G100
		1348	static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
		1349	static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
		1350	#ifdef CONFIG_FB_MATROX_32MB
		1351	/* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
		1352	whole 32MB */
		1353	static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
		1354	#else
		1355	static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
		1356	#endif
		1357	#endif
		1358
		1359	#define DEVF_VIDEO64BIT 0x0001
		1360	#define DEVF_SWAPS 0x0002
		1361	#define DEVF_SRCORG 0x0004
		1362	#define DEVF_DUALHEAD 0x0008
		1363	#define DEVF_CROSS4MB 0x0010
		1364	#define DEVF_TEXT4B 0x0020
		1365	/* #define DEVF_recycled 0x0040 */
		1366	/* #define DEVF_recycled 0x0080 */
		1367	#define DEVF_SUPPORT32MB 0x0100
		1368	#define DEVF_ANY_VXRES 0x0200
		1369	#define DEVF_TEXT16B 0x0400
		1370	#define DEVF_CRTC2 0x0800
		1371	#define DEVF_MAVEN_CAPABLE 0x1000
		1372	#define DEVF_PANELLINK_CAPABLE 0x2000
		1373	#define DEVF_G450DAC 0x4000
		1374
		1375	#define DEVF_GCORE (DEVF_VIDEO64BIT \| DEVF_SWAPS \| DEVF_CROSS4MB)
		1376	#define DEVF_G2CORE (DEVF_GCORE \| DEVF_ANY_VXRES \| DEVF_MAVEN_CAPABLE \| DEVF_PANELLINK_CAPABLE \| DEVF_SRCORG \| DEVF_DUALHEAD)
		1377	#define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
		1378	#define DEVF_G200 (DEVF_G2CORE)
		1379	#define DEVF_G400 (DEVF_G2CORE \| DEVF_SUPPORT32MB \| DEVF_TEXT16B \| DEVF_CRTC2)
		1380	/* if you'll find how to drive DFP... */
		1381	#define DEVF_G450 (DEVF_GCORE \| DEVF_ANY_VXRES \| DEVF_SUPPORT32MB \| DEVF_TEXT16B \| DEVF_CRTC2 \| DEVF_G450DAC \| DEVF_SRCORG \| DEVF_DUALHEAD)
		1382	#define DEVF_G550 (DEVF_G450)
		1383
		1384	static struct board {
		1385	unsigned short vendor, device, rev, svid, sid;
		1386	unsigned int flags;
		1387	unsigned int maxclk;
		1388	enum mga_chip chip;
		1389	struct video_board* base;
		1390	const char* name;
		1391	} dev_list[] = {
		1392	#ifdef CONFIG_FB_MATROX_MILLENIUM
		1393	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
		1394	0, 0,
		1395	DEVF_TEXT4B,
		1396	230000,
		1397	MGA_2064,
		1398	&vbMillennium,
		1399	"Millennium (PCI)"},
		1400	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
		1401	0, 0,
		1402	DEVF_SWAPS,
		1403	220000,
		1404	MGA_2164,
		1405	&vbMillennium2,
		1406	"Millennium II (PCI)"},
		1407	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
		1408	0, 0,
		1409	DEVF_SWAPS,
		1410	250000,
		1411	MGA_2164,
		1412	&vbMillennium2A,
		1413	"Millennium II (AGP)"},
		1414	#endif
		1415	#ifdef CONFIG_FB_MATROX_MYSTIQUE
		1416	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
		1417	0, 0,
		1418	DEVF_VIDEO64BIT \| DEVF_CROSS4MB,
		1419	180000,
		1420	MGA_1064,
		1421	&vbMystique,
		1422	"Mystique (PCI)"},
		1423	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
		1424	0, 0,
		1425	DEVF_VIDEO64BIT \| DEVF_SWAPS \| DEVF_CROSS4MB,
		1426	220000,
		1427	MGA_1164,
		1428	&vbMystique,
		1429	"Mystique 220 (PCI)"},
		1430	#endif
		1431	#ifdef CONFIG_FB_MATROX_G100
		1432	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
		1433	0, 0,
		1434	DEVF_G100,
		1435	230000,
		1436	MGA_G100,
		1437	&vbG100,
		1438	"MGA-G100 (PCI)"},
		1439	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
		1440	0, 0,
		1441	DEVF_G100,
		1442	230000,
		1443	MGA_G100,
		1444	&vbG100,
		1445	"MGA-G100 (AGP)"},
		1446	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
		1447	0, 0,
		1448	DEVF_G200,
		1449	250000,
		1450	MGA_G200,
		1451	&vbG200,
		1452	"MGA-G200 (PCI)"},
		1453	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1454	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
		1455	DEVF_G200,
		1456	220000,
		1457	MGA_G200,
		1458	&vbG200,
		1459	"MGA-G200 (AGP)"},
		1460	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1461	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
		1462	DEVF_G200,
		1463	230000,
		1464	MGA_G200,
		1465	&vbG200,
		1466	"Mystique G200 (AGP)"},
		1467	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1468	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
		1469	DEVF_G200,
		1470	250000,
		1471	MGA_G200,
		1472	&vbG200,
		1473	"Millennium G200 (AGP)"},
		1474	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1475	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
		1476	DEVF_G200,
		1477	230000,
		1478	MGA_G200,
		1479	&vbG200,
		1480	"Marvel G200 (AGP)"},
		1481	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1482	PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
		1483	DEVF_G200,
		1484	230000,
		1485	MGA_G200,
		1486	&vbG200,
		1487	"MGA-G200 (AGP)"},
		1488	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1489	0, 0,
		1490	DEVF_G200,
		1491	230000,
		1492	MGA_G200,
		1493	&vbG200,
		1494	"G200 (AGP)"},
		1495	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
		1496	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
		1497	DEVF_G400,
		1498	360000,
		1499	MGA_G400,
		1500	&vbG400,
		1501	"Millennium G400 MAX (AGP)"},
		1502	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
		1503	0, 0,
		1504	DEVF_G400,
		1505	300000,
		1506	MGA_G400,
		1507	&vbG400,
		1508	"G400 (AGP)"},
		1509	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
		1510	0, 0,
		1511	DEVF_G450,
		1512	360000,
		1513	MGA_G450,
		1514	&vbG400,
		1515	"G450"},
		1516	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
		1517	0, 0,
		1518	DEVF_G550,
		1519	360000,
		1520	MGA_G550,
		1521	&vbG400,
		1522	"G550"},
		1523	#endif
		1524	{0, 0, 0xFF,
		1525	0, 0,
		1526	0,
		1527	0,
		1528	0,
		1529	NULL,
		1530	NULL}};
		1531
		1532	#ifndef MODULE
		1533	static struct fb_videomode defaultmode = {
		1534	/* 640x480 @ 60Hz, 31.5 kHz */
		1535	NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
		1536	0, FB_VMODE_NONINTERLACED
		1537	};
		1538	#endif /* !MODULE */
		1539
		1540	static int hotplug = 0;
		1541
		1542	static int initMatrox2(WPMINFO struct board* b){
		1543	unsigned long ctrlptr_phys = 0;
		1544	unsigned long video_base_phys = 0;
		1545	unsigned int memsize;
		1546	int err;
		1547
		1548	DBG(__FUNCTION__)
		1549
		1550	/* set default values... */
		1551	vesafb_defined.accel_flags = FB_ACCELF_TEXT;
		1552
		1553	ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
		1554	ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
		1555	ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
		1556
		1557	printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
		1558	ACCESS_FBINFO(capable.plnwt) = 1;
		1559	ACCESS_FBINFO(chip) = b->chip;
		1560	ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
		1561	ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
		1562	if (b->flags & DEVF_TEXT4B) {
		1563	ACCESS_FBINFO(devflags.vgastep) = 4;
		1564	ACCESS_FBINFO(devflags.textmode) = 4;
		1565	ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
		1566	} else if (b->flags & DEVF_TEXT16B) {
		1567	ACCESS_FBINFO(devflags.vgastep) = 16;
		1568	ACCESS_FBINFO(devflags.textmode) = 1;
		1569	ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
		1570	} else {
		1571	ACCESS_FBINFO(devflags.vgastep) = 8;
		1572	ACCESS_FBINFO(devflags.textmode) = 1;
		1573	ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
		1574	}
		1575	#ifdef CONFIG_FB_MATROX_32MB
		1576	ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
		1577	#endif
		1578	ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
		1579	ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
		1580	ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
		1581	ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
		1582	if (b->flags & DEVF_PANELLINK_CAPABLE) {
		1583	ACCESS_FBINFO(outputs[2]).data = MINFO;
		1584	ACCESS_FBINFO(outputs[2]).output = &panellink_output;
		1585	if (dfp)
		1586	ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_CRTC1;
		1587	else
		1588	ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_NONE;
		1589	ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
		1590	ACCESS_FBINFO(devflags.panellink) = 1;
		1591	}
		1592	ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
		1593	ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
		1594	ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
		1595	ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
		1596
		1597	if (ACCESS_FBINFO(capable.cross4MB) < 0)
		1598	ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
		1599	if (b->flags & DEVF_SWAPS) {
		1600	ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
		1601	video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
		1602	ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
		1603	} else {
		1604	ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
		1605	video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
		1606	ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
		1607	}
		1608	err = -EINVAL;
		1609	if (!ctrlptr_phys) {
		1610	printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
		1611	goto fail;
		1612	}
		1613	if (!video_base_phys) {
		1614	printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
		1615	goto fail;
		1616	}
		1617	memsize = b->base->maxvram;
		1618	if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
		1619	goto fail;
		1620	}
		1621	if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
		1622	goto failCtrlMR;
		1623	}
		1624	ACCESS_FBINFO(video.len_maximum) = memsize;
		1625	/* convert mem (autodetect k, M) */
		1626	if (mem < 1024) mem *= 1024;
		1627	if (mem < 0x00100000) mem *= 1024;
		1628
		1629	if (mem && (mem < memsize))
		1630	memsize = mem;
		1631	err = -ENOMEM;
		1632	if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
		1633	printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
		1634	goto failVideoMR;
		1635	}
		1636	ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
		1637	ACCESS_FBINFO(mmio.len) = 16384;
		1638	ACCESS_FBINFO(video.base) = video_base_phys;
		1639	if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
		1640	printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
		1641	video_base_phys, memsize);
		1642	goto failCtrlIO;
		1643	}
		1644	{
		1645	u_int32_t cmd;
		1646	u_int32_t mga_option;
		1647
		1648	pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, (void *)&mga_option);
		1649	pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, (void *)&cmd);
		1650	mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
		1651	mga_option \|= MX_OPTION_BSWAP;
		1652	/* disable palette snooping */
		1653	cmd &= ~PCI_COMMAND_VGA_PALETTE;
		1654	if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437, NULL)) {
		1655	if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
		1656	printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
		1657	}
		1658	mga_option \|= 0x20000000;
		1659	ACCESS_FBINFO(devflags.nopciretry) = 1;
		1660	}
		1661	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
		1662	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
		1663	ACCESS_FBINFO(hw).MXoptionReg = mga_option;
		1664
		1665	/* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
		1666	/* maybe preinit() candidate, but it is same... for all devices... at this time... */
		1667	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
		1668	}
		1669
		1670	err = -ENXIO;
		1671	matroxfb_read_pins(PMINFO2);
		1672	if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
		1673	goto failVideoIO;
		1674	}
		1675
		1676	err = -ENOMEM;
		1677	if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) \|\| !ACCESS_FBINFO(video.len)) {
		1678	printk(KERN_ERR "matroxfb: cannot determine memory size\n");
		1679	goto failVideoIO;
		1680	}
		1681	ACCESS_FBINFO(devflags.ydstorg) = 0;
		1682
		1683	ACCESS_FBINFO(fbcon.currcon) = -1;
		1684	ACCESS_FBINFO(video.base) = video_base_phys;
		1685	ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
		1686	if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
		1687	ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
		1688	#ifdef CONFIG_MTRR
		1689	if (mtrr) {
		1690	ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
		1691	ACCESS_FBINFO(mtrr.vram_valid) = 1;
		1692	printk(KERN_INFO "matroxfb: MTRR's turned on\n");
		1693	}
		1694	#endif /* CONFIG_MTRR */
		1695
		1696	if (!ACCESS_FBINFO(devflags.novga))
		1697	request_region(0x3C0, 32, "matrox");
		1698	matroxfb_g450_connect(PMINFO2);
		1699	ACCESS_FBINFO(hw_switch->reset(PMINFO2));
		1700
		1701	ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
		1702	ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
		1703	ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
		1704	ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
		1705	ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
		1706
		1707	/* static settings */
		1708	vesafb_defined.red = colors[depth-1].red;
		1709	vesafb_defined.green = colors[depth-1].green;
		1710	vesafb_defined.blue = colors[depth-1].blue;
		1711	vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
		1712	vesafb_defined.grayscale = grayscale;
		1713	vesafb_defined.vmode = 0;
		1714	if (noaccel)
		1715	vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
		1716
		1717	ACCESS_FBINFO(fbops) = matroxfb_ops;
		1718	ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
		1719	ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
		1720	/* after __init time we are like module... no logo */
		1721	ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
		1722	ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
		1723	fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
		1724
		1725	#ifndef MODULE
		1726	/* mode database is marked __init!!! */
		1727	if (!hotplug) {
		1728	fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
		1729	NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
		1730	}
		1731	#endif /* !MODULE */
		1732
		1733	/* mode modifiers */
		1734	if (hslen)
		1735	vesafb_defined.hsync_len = hslen;
		1736	if (vslen)
		1737	vesafb_defined.vsync_len = vslen;
		1738	if (left != ~0)
		1739	vesafb_defined.left_margin = left;
		1740	if (right != ~0)
		1741	vesafb_defined.right_margin = right;
		1742	if (upper != ~0)
		1743	vesafb_defined.upper_margin = upper;
		1744	if (lower != ~0)
		1745	vesafb_defined.lower_margin = lower;
		1746	if (xres)
		1747	vesafb_defined.xres = xres;
		1748	if (yres)
		1749	vesafb_defined.yres = yres;
		1750	if (sync != -1)
		1751	vesafb_defined.sync = sync;
		1752	else if (vesafb_defined.sync == ~0) {
		1753	vesafb_defined.sync = 0;
		1754	if (yres < 400)
		1755	vesafb_defined.sync \|= FB_SYNC_HOR_HIGH_ACT;
		1756	else if (yres < 480)
		1757	vesafb_defined.sync \|= FB_SYNC_VERT_HIGH_ACT;
		1758	}
		1759
		1760	/* fv, fh, maxclk limits was specified */
		1761	{
		1762	unsigned int tmp;
		1763
		1764	if (fv) {
		1765	tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
		1766	+ vesafb_defined.lower_margin + vesafb_defined.vsync_len);
		1767	if ((tmp < fh) \|\| (fh == 0)) fh = tmp;
		1768	}
		1769	if (fh) {
		1770	tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
		1771	+ vesafb_defined.right_margin + vesafb_defined.hsync_len);
		1772	if ((tmp < maxclk) \|\| (maxclk == 0)) maxclk = tmp;
		1773	}
		1774	tmp = (maxclk + 499) / 500;
		1775	if (tmp) {
		1776	tmp = (2000000000 + tmp) / tmp;
		1777	if (tmp > pixclock) pixclock = tmp;
		1778	}
		1779	}
		1780	if (pixclock) {
		1781	if (pixclock < 2000) /* > 500MHz */
		1782	pixclock = 4000; /* 250MHz */
		1783	if (pixclock > 1000000)
		1784	pixclock = 1000000; /* 1MHz */
		1785	vesafb_defined.pixclock = pixclock;
		1786	}
		1787
		1788	/* FIXME: Where to move this?! */
		1789	#if defined(CONFIG_PPC_PMAC)
		1790	#ifndef MODULE
		1791	if (_machine == _MACH_Pmac) {
		1792	struct fb_var_screeninfo var;
		1793	if (default_vmode <= 0 \|\| default_vmode > VMODE_MAX)
		1794	default_vmode = VMODE_640_480_60;
		1795	#ifdef CONFIG_NVRAM
		1796	if (default_cmode == CMODE_NVRAM)
		1797	default_cmode = nvram_read_byte(NV_CMODE);
		1798	#endif
		1799	if (default_cmode < CMODE_8 \|\| default_cmode > CMODE_32)
		1800	default_cmode = CMODE_8;
		1801	if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
		1802	var.accel_flags = vesafb_defined.accel_flags;
		1803	var.xoffset = var.yoffset = 0;
		1804	/* Note: mac_vmode_to_var() does not set all parameters */
		1805	vesafb_defined = var;
		1806	}
		1807	}
		1808	#endif /* !MODULE */
		1809	#endif /* CONFIG_PPC_PMAC */
		1810	vesafb_defined.xres_virtual = vesafb_defined.xres;
		1811	if (nopan) {
		1812	vesafb_defined.yres_virtual = vesafb_defined.yres;
		1813	} else {
		1814	vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
		1815	to yres_virtual * xres_virtual < 2^32 */
		1816	}
		1817	matroxfb_init_fix(PMINFO2);
		1818	err = -EINVAL;
		1819
		1820	printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
		1821	vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
		1822	vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
		1823	printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
		1824	ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
		1825
		1826	/* We do not have to set currcon to 0... register_framebuffer do it for us on first console
		1827	* and we do not want currcon == 0 for subsequent framebuffers */
		1828
		1829	if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
		1830	goto failVideoIO;
		1831	}
		1832	printk("fb%d: %s frame buffer device\n",
		1833	ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
		1834	if (ACCESS_FBINFO(fbcon.currcon) < 0) {
		1835	/* there is no console on this fb... but we have to initialize hardware
		1836	* until someone tells me what is proper thing to do */
		1837	printk(KERN_INFO "fb%d: initializing hardware\n",
		1838	ACCESS_FBINFO(fbcon.node));
		1839	fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
		1840	}
		1841	return 0;
		1842	failVideoIO:;
		1843	matroxfb_g450_shutdown(PMINFO2);
		1844	mga_iounmap(ACCESS_FBINFO(video.vbase));
		1845	failCtrlIO:;
		1846	mga_iounmap(ACCESS_FBINFO(mmio.vbase));
		1847	failVideoMR:;
		1848	release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
		1849	failCtrlMR:;
		1850	release_mem_region(ctrlptr_phys, 16384);
		1851	fail:;
		1852	return err;
		1853	}
		1854
		1855	LIST_HEAD(matroxfb_list);
		1856	LIST_HEAD(matroxfb_driver_list);
		1857
		1858	#define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
		1859	#define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
		1860	int matroxfb_register_driver(struct matroxfb_driver* drv) {
		1861	struct matrox_fb_info* minfo;
		1862
		1863	list_add(&drv->node, &matroxfb_driver_list);
		1864	for (minfo = matroxfb_l(matroxfb_list.next);
		1865	minfo != matroxfb_l(&matroxfb_list);
		1866	minfo = matroxfb_l(minfo->next_fb.next)) {
		1867	void* p;
		1868
		1869	if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
		1870	continue;
		1871	p = drv->probe(minfo);
		1872	if (p) {
		1873	minfo->drivers_data[minfo->drivers_count] = p;
		1874	minfo->drivers[minfo->drivers_count++] = drv;
		1875	}
		1876	}
		1877	return 0;
		1878	}
		1879
		1880	void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
		1881	struct matrox_fb_info* minfo;
		1882
		1883	list_del(&drv->node);
		1884	for (minfo = matroxfb_l(matroxfb_list.next);
		1885	minfo != matroxfb_l(&matroxfb_list);
		1886	minfo = matroxfb_l(minfo->next_fb.next)) {
		1887	int i;
		1888
		1889	for (i = 0; i < minfo->drivers_count; ) {
		1890	if (minfo->drivers[i] == drv) {
		1891	if (drv && drv->remove)
		1892	drv->remove(minfo, minfo->drivers_data[i]);
		1893	minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
		1894	minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
		1895	} else
		1896	i++;
		1897	}
		1898	}
		1899	}
		1900
		1901	static void matroxfb_register_device(struct matrox_fb_info* minfo) {
		1902	struct matroxfb_driver* drv;
		1903	int i = 0;
		1904	list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
		1905	for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
		1906	drv != matroxfb_driver_l(&matroxfb_driver_list);
		1907	drv = matroxfb_driver_l(drv->node.next)) {
		1908	if (drv && drv->probe) {
		1909	void *p = drv->probe(minfo);
		1910	if (p) {
		1911	minfo->drivers_data[i] = p;
		1912	minfo->drivers[i++] = drv;
		1913	if (i == MATROXFB_MAX_FB_DRIVERS)
		1914	break;
		1915	}
		1916	}
		1917	}
		1918	minfo->drivers_count = i;
		1919	}
		1920
		1921	static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
		1922	int i;
		1923
		1924	list_del(&ACCESS_FBINFO(next_fb));
		1925	for (i = 0; i < minfo->drivers_count; i++) {
		1926	struct matroxfb_driver* drv = minfo->drivers[i];
		1927
		1928	if (drv && drv->remove)
		1929	drv->remove(minfo, minfo->drivers_data[i]);
		1930	}
		1931	}
		1932
		1933	static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
		1934	struct board* b;
		1935	u_int8_t rev;
		1936	u_int16_t svid;
		1937	u_int16_t sid;
		1938	struct matrox_fb_info* minfo;
		1939	int err;
		1940	u_int32_t cmd;
		1941	#ifndef CONFIG_FB_MATROX_MULTIHEAD
		1942	static int registered = 0;
		1943	#endif
		1944	DBG(__FUNCTION__)
		1945
		1946	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
		1947	svid = pdev->subsystem_vendor;
		1948	sid = pdev->subsystem_device;
		1949	for (b = dev_list; b->vendor; b++) {
		1950	if ((b->vendor != pdev->vendor) \|\| (b->device != pdev->device) \|\| (b->rev < rev)) continue;
		1951	if (b->svid)
		1952	if ((b->svid != svid) \|\| (b->sid != sid)) continue;
		1953	break;
		1954	}
		1955	/* not match... */
		1956	if (!b->vendor)
		1957	return -1;
		1958	if (dev > 0) {
		1959	/* not requested one... */
		1960	dev--;
		1961	return -1;
		1962	}
		1963	pci_read_config_dword(pdev, PCI_COMMAND, (void *)&cmd);
		1964	if (pci_enable_device(pdev)) {
		1965	return -1;
		1966	}
		1967
		1968	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		1969	minfo = (struct matrox_fb_info)kmalloc(sizeof(minfo), GFP_KERNEL);
		1970	if (!minfo)
		1971	return -1;
		1972	#else
		1973	if (registered) /* singlehead driver... */
		1974	return -1;
		1975	minfo = &matroxfb_global_mxinfo;
		1976	#endif
		1977	memset(MINFO, 0, sizeof(*MINFO));
		1978
		1979	ACCESS_FBINFO(pcidev) = pdev;
		1980	ACCESS_FBINFO(dead) = 0;
		1981	ACCESS_FBINFO(usecount) = 0;
		1982	ACCESS_FBINFO(userusecount) = 0;
		1983
		1984	pci_set_drvdata(pdev, MINFO);
		1985	/* DEVFLAGS */
		1986	ACCESS_FBINFO(devflags.memtype) = memtype;
		1987	if (memtype != -1)
		1988	noinit = 0;
		1989	if (cmd & PCI_COMMAND_MEMORY) {
		1990	ACCESS_FBINFO(devflags.novga) = novga;
		1991	ACCESS_FBINFO(devflags.nobios) = nobios;
		1992	ACCESS_FBINFO(devflags.noinit) = noinit;
		1993	/* subsequent heads always needs initialization and must not enable BIOS */
		1994	novga = 1;
		1995	nobios = 1;
		1996	noinit = 0;
		1997	} else {
		1998	ACCESS_FBINFO(devflags.novga) = 1;
		1999	ACCESS_FBINFO(devflags.nobios) = 1;
		2000	ACCESS_FBINFO(devflags.noinit) = 0;
		2001	}
		2002
		2003	ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
		2004	ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
		2005	ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
		2006	ACCESS_FBINFO(devflags.sgram) = sgram;
		2007	ACCESS_FBINFO(capable.cross4MB) = cross4MB;
		2008
		2009	spin_lock_init(&ACCESS_FBINFO(lock.DAC));
		2010	spin_lock_init(&ACCESS_FBINFO(lock.accel));
		2011	init_rwsem(&ACCESS_FBINFO(crtc2.lock));
		2012	init_rwsem(&ACCESS_FBINFO(altout.lock));
		2013	ACCESS_FBINFO(irq_flags) = 0;
		2014	//init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
		2015	//init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
		2016	ACCESS_FBINFO(crtc1.panpos) = -1;
		2017
		2018	err = initMatrox2(PMINFO b);
		2019	if (!err) {
		2020	#ifndef CONFIG_FB_MATROX_MULTIHEAD
		2021	registered = 1;
		2022	#endif
		2023	matroxfb_register_device(MINFO);
		2024	return 0;
		2025	}
		2026	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		2027	kfree(minfo);
		2028	#endif
		2029	return -1;
		2030	}
		2031
		2032	static void pci_remove_matrox(struct pci_dev* pdev) {
		2033	struct matrox_fb_info* minfo;
		2034
		2035	minfo = pci_get_drvdata(pdev);
		2036	matroxfb_remove(PMINFO 1);
		2037	}
		2038
		2039	static struct pci_device_id matroxfb_devices[] = {
		2040	#ifdef CONFIG_FB_MATROX_MILLENIUM
		2041	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
		2042	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2043	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
		2044	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2045	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
		2046	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2047	#endif
		2048	#ifdef CONFIG_FB_MATROX_MYSTIQUE
		2049	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
		2050	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2051	#endif
		2052	#ifdef CONFIG_FB_MATROX_G100
		2053	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
		2054	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2055	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
		2056	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2057	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
		2058	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2059	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
		2060	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2061	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
		2062	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2063	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
		2064	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2065	#endif
		2066	{0, 0,
		2067	0, 0, 0, 0, 0}
		2068	};
		2069
		2070	MODULE_DEVICE_TABLE(pci, matroxfb_devices);
		2071
		2072
		2073	static struct pci_driver matroxfb_driver = {
		2074	.name = "matroxfb",
		2075	.id_table = matroxfb_devices,
		2076	.probe = matroxfb_probe,
		2077	.remove = pci_remove_matrox,
		2078	};
		2079
		2080	/* ************************** init-time only ************************** */
		2081
		2082	#define RSResolution(X) ((X) & 0x0F)
		2083	#define RS640x400 1
		2084	#define RS640x480 2
		2085	#define RS800x600 3
		2086	#define RS1024x768 4
		2087	#define RS1280x1024 5
		2088	#define RS1600x1200 6
		2089	#define RS768x576 7
		2090	#define RS960x720 8
		2091	#define RS1152x864 9
		2092	#define RS1408x1056 10
		2093	#define RS640x350 11
		2094	#define RS1056x344 12 /* 132 x 43 text */
		2095	#define RS1056x400 13 /* 132 x 50 text */
		2096	#define RS1056x480 14 /* 132 x 60 text */
		2097	#define RSNoxNo 15
		2098	/* 10-FF */
		2099	static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
		2100	{ 640, 400, 48, 16, 39, 8, 96, 2, 70 },
		2101	{ 640, 480, 48, 16, 33, 10, 96, 2, 60 },
		2102	{ 800, 600, 144, 24, 28, 8, 112, 6, 60 },
		2103	{ 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
		2104	{ 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
		2105	{ 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
		2106	{ 768, 576, 144, 16, 28, 6, 112, 4, 60 },
		2107	{ 960, 720, 144, 24, 28, 8, 112, 4, 60 },
		2108	{ 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
		2109	{ 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
		2110	{ 640, 350, 48, 16, 39, 8, 96, 2, 70 },
		2111	{ 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
		2112	{ 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
		2113	{ 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
		2114	{ 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
		2115	};
		2116
		2117	#define RSCreate(X,Y) ((X) \| ((Y) << 8))
		2118	static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
		2119	/* default must be first */
		2120	{ ~0, RSCreate(RSNoxNo, RS8bpp ) },
		2121	{ 0x101, RSCreate(RS640x480, RS8bpp ) },
		2122	{ 0x100, RSCreate(RS640x400, RS8bpp ) },
		2123	{ 0x180, RSCreate(RS768x576, RS8bpp ) },
		2124	{ 0x103, RSCreate(RS800x600, RS8bpp ) },
		2125	{ 0x188, RSCreate(RS960x720, RS8bpp ) },
		2126	{ 0x105, RSCreate(RS1024x768, RS8bpp ) },
		2127	{ 0x190, RSCreate(RS1152x864, RS8bpp ) },
		2128	{ 0x107, RSCreate(RS1280x1024, RS8bpp ) },
		2129	{ 0x198, RSCreate(RS1408x1056, RS8bpp ) },
		2130	{ 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
		2131	{ 0x110, RSCreate(RS640x480, RS15bpp) },
		2132	{ 0x181, RSCreate(RS768x576, RS15bpp) },
		2133	{ 0x113, RSCreate(RS800x600, RS15bpp) },
		2134	{ 0x189, RSCreate(RS960x720, RS15bpp) },
		2135	{ 0x116, RSCreate(RS1024x768, RS15bpp) },
		2136	{ 0x191, RSCreate(RS1152x864, RS15bpp) },
		2137	{ 0x119, RSCreate(RS1280x1024, RS15bpp) },
		2138	{ 0x199, RSCreate(RS1408x1056, RS15bpp) },
		2139	{ 0x11D, RSCreate(RS1600x1200, RS15bpp) },
		2140	{ 0x111, RSCreate(RS640x480, RS16bpp) },
		2141	{ 0x182, RSCreate(RS768x576, RS16bpp) },
		2142	{ 0x114, RSCreate(RS800x600, RS16bpp) },
		2143	{ 0x18A, RSCreate(RS960x720, RS16bpp) },
		2144	{ 0x117, RSCreate(RS1024x768, RS16bpp) },
		2145	{ 0x192, RSCreate(RS1152x864, RS16bpp) },
		2146	{ 0x11A, RSCreate(RS1280x1024, RS16bpp) },
		2147	{ 0x19A, RSCreate(RS1408x1056, RS16bpp) },
		2148	{ 0x11E, RSCreate(RS1600x1200, RS16bpp) },
		2149	{ 0x1B2, RSCreate(RS640x480, RS24bpp) },
		2150	{ 0x184, RSCreate(RS768x576, RS24bpp) },
		2151	{ 0x1B5, RSCreate(RS800x600, RS24bpp) },
		2152	{ 0x18C, RSCreate(RS960x720, RS24bpp) },
		2153	{ 0x1B8, RSCreate(RS1024x768, RS24bpp) },
		2154	{ 0x194, RSCreate(RS1152x864, RS24bpp) },
		2155	{ 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
		2156	{ 0x19C, RSCreate(RS1408x1056, RS24bpp) },
		2157	{ 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
		2158	{ 0x112, RSCreate(RS640x480, RS32bpp) },
		2159	{ 0x183, RSCreate(RS768x576, RS32bpp) },
		2160	{ 0x115, RSCreate(RS800x600, RS32bpp) },
		2161	{ 0x18B, RSCreate(RS960x720, RS32bpp) },
		2162	{ 0x118, RSCreate(RS1024x768, RS32bpp) },
		2163	{ 0x193, RSCreate(RS1152x864, RS32bpp) },
		2164	{ 0x11B, RSCreate(RS1280x1024, RS32bpp) },
		2165	{ 0x19B, RSCreate(RS1408x1056, RS32bpp) },
		2166	{ 0x11F, RSCreate(RS1600x1200, RS32bpp) },
		2167	{ 0x010, RSCreate(RS640x350, RS4bpp ) },
		2168	{ 0x012, RSCreate(RS640x480, RS4bpp ) },
		2169	{ 0x102, RSCreate(RS800x600, RS4bpp ) },
		2170	{ 0x104, RSCreate(RS1024x768, RS4bpp ) },
		2171	{ 0x106, RSCreate(RS1280x1024, RS4bpp ) },
		2172	{ 0, 0 }};
		2173
		2174	static void __init matroxfb_init_params(void) {
		2175	/* fh from kHz to Hz */
		2176	if (fh < 1000)
		2177	fh = 1000; / 1kHz minimum */
		2178	/* maxclk */
		2179	if (maxclk < 1000) maxclk = 1000; / kHz -> Hz, MHz -> kHz */
		2180	if (maxclk < 1000000) maxclk = 1000; / kHz -> Hz, 1MHz minimum */
		2181	/* fix VESA number */
		2182	if (vesa != ~0)
		2183	vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
		2184
		2185	/* static settings */
		2186	for (RSptr = vesamap; RSptr->vesa; RSptr++) {
		2187	if (RSptr->vesa == vesa) break;
		2188	}
		2189	if (!RSptr->vesa) {
		2190	printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
		2191	RSptr = vesamap;
		2192	}
		2193	{
		2194	int res = RSResolution(RSptr->info)-1;
		2195	if (left == ~0)
		2196	left = timmings[res].left;
		2197	if (!xres)
		2198	xres = timmings[res].xres;
		2199	if (right == ~0)
		2200	right = timmings[res].right;
		2201	if (!hslen)
		2202	hslen = timmings[res].hslen;
		2203	if (upper == ~0)
		2204	upper = timmings[res].upper;
		2205	if (!yres)
		2206	yres = timmings[res].yres;
		2207	if (lower == ~0)
		2208	lower = timmings[res].lower;
		2209	if (!vslen)
		2210	vslen = timmings[res].vslen;
		2211	if (!(fv\|\|fh\|\|maxclk\|\|pixclock))
		2212	fv = timmings[res].vfreq;
		2213	if (depth == -1)
		2214	depth = RSDepth(RSptr->info);
		2215	}
		2216	}
		2217
		2218	static void __init matrox_init(void) {
		2219	matroxfb_init_params();
		2220	pci_register_driver(&matroxfb_driver);
		2221	dev = -1; /* accept all new devices... */
		2222	}
		2223
		2224	/* ************************** exit-time only ************************** */
		2225
		2226	static void __exit matrox_done(void) {
		2227	pci_unregister_driver(&matroxfb_driver);
		2228	}
		2229
		2230	#ifndef MODULE
		2231
		2232	/* *********************** init in-kernel code ************************ */
		2233
		2234	int __init matroxfb_setup(char *options) {
		2235	char *this_opt;
		2236
		2237	DBG(__FUNCTION__)
		2238
		2239	if (!options \|\| !*options)
		2240	return 0;
		2241
		2242	while ((this_opt = strsep(&options, ",")) != NULL) {
		2243	if (!*this_opt) continue;
		2244
		2245	dprintk("matroxfb_setup: option %s\n", this_opt);
		2246
		2247	if (!strncmp(this_opt, "dev:", 4))
		2248	dev = simple_strtoul(this_opt+4, NULL, 0);
		2249	else if (!strncmp(this_opt, "depth:", 6)) {
		2250	switch (simple_strtoul(this_opt+6, NULL, 0)) {
		2251	case 0: depth = RSText; break;
		2252	case 4: depth = RS4bpp; break;
		2253	case 8: depth = RS8bpp; break;
		2254	case 15:depth = RS15bpp; break;
		2255	case 16:depth = RS16bpp; break;
		2256	case 24:depth = RS24bpp; break;
		2257	case 32:depth = RS32bpp; break;
		2258	default:
		2259	printk(KERN_ERR "matroxfb: unsupported color depth\n");
		2260	}
		2261	} else if (!strncmp(this_opt, "xres:", 5))
		2262	xres = simple_strtoul(this_opt+5, NULL, 0);
		2263	else if (!strncmp(this_opt, "yres:", 5))
		2264	yres = simple_strtoul(this_opt+5, NULL, 0);
		2265	else if (!strncmp(this_opt, "vslen:", 6))
		2266	vslen = simple_strtoul(this_opt+6, NULL, 0);
		2267	else if (!strncmp(this_opt, "hslen:", 6))
		2268	hslen = simple_strtoul(this_opt+6, NULL, 0);
		2269	else if (!strncmp(this_opt, "left:", 5))
		2270	left = simple_strtoul(this_opt+5, NULL, 0);
		2271	else if (!strncmp(this_opt, "right:", 6))
		2272	right = simple_strtoul(this_opt+6, NULL, 0);
		2273	else if (!strncmp(this_opt, "upper:", 6))
		2274	upper = simple_strtoul(this_opt+6, NULL, 0);
		2275	else if (!strncmp(this_opt, "lower:", 6))
		2276	lower = simple_strtoul(this_opt+6, NULL, 0);
		2277	else if (!strncmp(this_opt, "pixclock:", 9))
		2278	pixclock = simple_strtoul(this_opt+9, NULL, 0);
		2279	else if (!strncmp(this_opt, "sync:", 5))
		2280	sync = simple_strtoul(this_opt+5, NULL, 0);
		2281	else if (!strncmp(this_opt, "vesa:", 5))
		2282	vesa = simple_strtoul(this_opt+5, NULL, 0);
		2283	else if (!strncmp(this_opt, "maxclk:", 7))
		2284	maxclk = simple_strtoul(this_opt+7, NULL, 0);
		2285	else if (!strncmp(this_opt, "fh:", 3))
		2286	fh = simple_strtoul(this_opt+3, NULL, 0);
		2287	else if (!strncmp(this_opt, "fv:", 3))
		2288	fv = simple_strtoul(this_opt+3, NULL, 0);
		2289	else if (!strncmp(this_opt, "mem:", 4))
		2290	mem = simple_strtoul(this_opt+4, NULL, 0);
		2291	else if (!strncmp(this_opt, "mode:", 5))
		2292	strncpy(videomode, this_opt+5, sizeof(videomode));
		2293	else if (!strncmp(this_opt, "dfp:", 4)) {
		2294	dfp_type = simple_strtoul(this_opt+4, NULL, 0);
		2295	dfp = 1;
		2296	}
		2297	#ifdef CONFIG_PPC_PMAC
		2298	else if (!strncmp(this_opt, "vmode:", 6)) {
		2299	unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
		2300	if (vmode > 0 && vmode <= VMODE_MAX)
		2301	default_vmode = vmode;
		2302	} else if (!strncmp(this_opt, "cmode:", 6)) {
		2303	unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
		2304	switch (cmode) {
		2305	case 0:
		2306	case 8:
		2307	default_cmode = CMODE_8;
		2308	break;
		2309	case 15:
		2310	case 16:
		2311	default_cmode = CMODE_16;
		2312	break;
		2313	case 24:
		2314	case 32:
		2315	default_cmode = CMODE_32;
		2316	break;
		2317	}
		2318	}
		2319	#endif
		2320	else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
		2321	disabled = 1;
		2322	else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
		2323	disabled = 0;
		2324	else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
		2325	sgram = 1;
		2326	else if (!strcmp(this_opt, "sdram"))
		2327	sgram = 0;
		2328	else if (!strncmp(this_opt, "memtype:", 8))
		2329	memtype = simple_strtoul(this_opt+8, NULL, 0);
		2330	else {
		2331	int value = 1;
		2332
		2333	if (!strncmp(this_opt, "no", 2)) {
		2334	value = 0;
		2335	this_opt += 2;
		2336	}
		2337	if (! strcmp(this_opt, "inverse"))
		2338	inverse = value;
		2339	else if (!strcmp(this_opt, "accel"))
		2340	noaccel = !value;
		2341	else if (!strcmp(this_opt, "pan"))
		2342	nopan = !value;
		2343	else if (!strcmp(this_opt, "pciretry"))
		2344	no_pci_retry = !value;
		2345	else if (!strcmp(this_opt, "vga"))
		2346	novga = !value;
		2347	else if (!strcmp(this_opt, "bios"))
		2348	nobios = !value;
		2349	else if (!strcmp(this_opt, "init"))
		2350	noinit = !value;
		2351	#ifdef CONFIG_MTRR
		2352	else if (!strcmp(this_opt, "mtrr"))
		2353	mtrr = value;
		2354	#endif
		2355	else if (!strcmp(this_opt, "inv24"))
		2356	inv24 = value;
		2357	else if (!strcmp(this_opt, "cross4MB"))
		2358	cross4MB = value;
		2359	else if (!strcmp(this_opt, "grayscale"))
		2360	grayscale = value;
		2361	else if (!strcmp(this_opt, "dfp"))
		2362	dfp = value;
		2363	else {
		2364	strncpy(videomode, this_opt, sizeof(videomode));
		2365	}
		2366	}
		2367	}
		2368	return 0;
		2369	}
		2370
		2371	static int __initdata initialized = 0;
		2372
		2373	int __init matroxfb_init(void)
		2374	{
		2375	DBG(__FUNCTION__)
		2376
		2377	if (disabled)
		2378	return -ENXIO;
		2379	if (!initialized) {
		2380	initialized = 1;
		2381	matrox_init();
		2382	}
		2383	hotplug = 1;
		2384	/* never return failure, user can hotplug matrox later... */
		2385	return 0;
		2386	}
		2387
		2388	#else
		2389
		2390	/* ************************* init module code ************************** */
		2391
		2392	MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
		2393	MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
		2394	MODULE_LICENSE("GPL");
		2395
		2396	MODULE_PARM(mem, "i");
		2397	MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
		2398	MODULE_PARM(disabled, "i");
		2399	MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
		2400	MODULE_PARM(noaccel, "i");
		2401	MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
		2402	MODULE_PARM(nopan, "i");
		2403	MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
		2404	MODULE_PARM(no_pci_retry, "i");
		2405	MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
		2406	MODULE_PARM(novga, "i");
		2407	MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
		2408	MODULE_PARM(nobios, "i");
		2409	MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
		2410	MODULE_PARM(noinit, "i");
		2411	MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
		2412	MODULE_PARM(memtype, "i");
		2413	MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
		2414	MODULE_PARM(mtrr, "i");
		2415	MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
		2416	MODULE_PARM(sgram, "i");
		2417	MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
		2418	MODULE_PARM(inv24, "i");
		2419	MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
		2420	MODULE_PARM(inverse, "i");
		2421	MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
		2422	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		2423	MODULE_PARM(dev, "i");
		2424	MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
		2425	#else
		2426	MODULE_PARM(dev, "i");
		2427	MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
		2428	#endif
		2429	MODULE_PARM(vesa, "i");
		2430	MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
		2431	MODULE_PARM(xres, "i");
		2432	MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
		2433	MODULE_PARM(yres, "i");
		2434	MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
		2435	MODULE_PARM(upper, "i");
		2436	MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
		2437	MODULE_PARM(lower, "i");
		2438	MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
		2439	MODULE_PARM(vslen, "i");
		2440	MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
		2441	MODULE_PARM(left, "i");
		2442	MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
		2443	MODULE_PARM(right, "i");
		2444	MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
		2445	MODULE_PARM(hslen, "i");
		2446	MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
		2447	MODULE_PARM(pixclock, "i");
		2448	MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
		2449	MODULE_PARM(sync, "i");
		2450	MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
		2451	MODULE_PARM(depth, "i");
		2452	MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
		2453	MODULE_PARM(maxclk, "i");
		2454	MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
		2455	MODULE_PARM(fh, "i");
		2456	MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
		2457	MODULE_PARM(fv, "i");
		2458	MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
		2459	"You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n");
		2460	MODULE_PARM(grayscale, "i");
		2461	MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
		2462	MODULE_PARM(cross4MB, "i");
		2463	MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
		2464	MODULE_PARM(dfp, "i");
		2465	MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
		2466	MODULE_PARM(dfp_type, "i");
		2467	MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
		2468	#ifdef CONFIG_PPC_PMAC
		2469	MODULE_PARM(vmode, "i");
		2470	MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
		2471	MODULE_PARM(cmode, "i");
		2472	MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
		2473	#endif
		2474
		2475	int __init init_module(void){
		2476
		2477	DBG(__FUNCTION__)
		2478
		2479	if (disabled)
		2480	return -ENXIO;
		2481
		2482	if (depth == 0)
		2483	depth = RSText;
		2484	else if (depth == 4)
		2485	depth = RS4bpp;
		2486	else if (depth == 8)
		2487	depth = RS8bpp;
		2488	else if (depth == 15)
		2489	depth = RS15bpp;
		2490	else if (depth == 16)
		2491	depth = RS16bpp;
		2492	else if (depth == 24)
		2493	depth = RS24bpp;
		2494	else if (depth == 32)
		2495	depth = RS32bpp;
		2496	else if (depth != -1) {
		2497	printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
		2498	depth = -1;
		2499	}
		2500	matrox_init();
		2501	/* never return failure; user can hotplug matrox later... */
		2502	return 0;
		2503	}
		2504	#endif /* MODULE */
		2505
		2506	module_exit(matrox_done);
		2507	EXPORT_SYMBOL(matroxfb_register_driver);
		2508	EXPORT_SYMBOL(matroxfb_unregister_driver);
		2509	EXPORT_SYMBOL(matroxfb_wait_for_sync);
		2510	EXPORT_SYMBOL(matroxfb_enable_irq);
		2511
		2512	/*
		2513	* Overrides for Emacs so that we follow Linus's tabbing style.
		2514	* ---------------------------------------------------------------------------
		2515	* Local variables:
		2516	* c-basic-offset: 8
		2517	* End:
		2518	*/
		2519

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(root)/shark/trunk/drivers/fb/matrox/matroxfb_base.c - Rev 489