WebSVN - shark - Blame - Rev 490 - /shark/trunk/drivers/fb/matrox/matroxfb

Rev	Author	Line No.	Line
489	giacomo	1	/*
		2	*
		3	* Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
		4	*
		5	* (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
		6	*
		7	* Portions Copyright (c) 2001 Matrox Graphics Inc.
		8	*
		9	* Version: 1.65 2002/08/14
		10	*
		11	* MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
		12	*
		13	* Contributors: "menion?" <menion@mindless.com>
		14	* Betatesting, fixes, ideas
		15	*
		16	* "Kurt Garloff" <garloff@suse.de>
		17	* Betatesting, fixes, ideas, videomodes, videomodes timmings
		18	*
		19	* "Tom Rini" <trini@kernel.crashing.org>
		20	* MTRR stuff, PPC cleanups, betatesting, fixes, ideas
		21	*
		22	* "Bibek Sahu" <scorpio@dodds.net>
		23	* Access device through readb\|w\|l and write b\|w\|l
		24	* Extensive debugging stuff
		25	*
		26	* "Daniel Haun" <haund@usa.net>
		27	* Testing, hardware cursor fixes
		28	*
		29	* "Scott Wood" <sawst46+@pitt.edu>
		30	* Fixes
		31	*
		32	* "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
		33	* Betatesting
		34	*
		35	* "Kelly French" <targon@hazmat.com>
		36	* "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
		37	* Betatesting, bug reporting
		38	*
		39	* "Pablo Bianucci" <pbian@pccp.com.ar>
		40	* Fixes, ideas, betatesting
		41	*
		42	* "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
		43	* Fixes, enhandcements, ideas, betatesting
		44	*
		45	* "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
		46	* PPC betatesting, PPC support, backward compatibility
		47	*
		48	* "Paul Womar" <Paul@pwomar.demon.co.uk>
		49	* "Owen Waller" <O.Waller@ee.qub.ac.uk>
		50	* PPC betatesting
		51	*
		52	* "Thomas Pornin" <pornin@bolet.ens.fr>
		53	* Alpha betatesting
		54	*
		55	* "Pieter van Leuven" <pvl@iae.nl>
		56	* "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
		57	* G100 testing
		58	*
		59	* "H. Peter Arvin" <hpa@transmeta.com>
		60	* Ideas
		61	*
		62	* "Cort Dougan" <cort@cs.nmt.edu>
		63	* CHRP fixes and PReP cleanup
		64	*
		65	* "Mark Vojkovich" <mvojkovi@ucsd.edu>
		66	* G400 support
		67	*
		68	* "Samuel Hocevar" <sam@via.ecp.fr>
		69	* Fixes
		70	*
		71	* "Anton Altaparmakov" <AntonA@bigfoot.com>
		72	* G400 MAX/non-MAX distinction
		73	*
		74	* "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
		75	* memtype extension (needed for GXT130P RS/6000 adapter)
		76	*
		77	* "Uns Lider" <unslider@miranda.org>
		78	* G100 PLNWT fixes
		79	*
		80	* "Denis Zaitsev" <zzz@cd-club.ru>
		81	* Fixes
		82	*
		83	* "Mike Pieper" <mike@pieper-family.de>
		84	* TVOut enhandcements, V4L2 control interface.
		85	*
		86	* "Diego Biurrun" <diego@biurrun.de>
		87	* DFP testing
		88	*
		89	* (following author is not in any relation with this code, but his code
		90	* is included in this driver)
		91	*
		92	* Based on framebuffer driver for VBE 2.0 compliant graphic boards
		93	* (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
		94	*
		95	* (following author is not in any relation with this code, but his ideas
		96	* were used when writting this driver)
		97	*
		98	* FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
		99	*
		100	*/
		101
		102	/* make checkconfig does not check included files... */
		103
		104	#include <linuxcomp.h>
		105
		106	#include <linux/config.h>
		107	#include <linux/version.h>
		108
		109	#include "matroxfb_base.h"
		110	#include "matroxfb_misc.h"
		111	#include "matroxfb_accel.h"
		112	#include "matroxfb_DAC1064.h"
		113	#include "matroxfb_Ti3026.h"
		114	#include "matroxfb_maven.h"
		115	#include "matroxfb_crtc2.h"
		116	#include "matroxfb_g450.h"
		117	#include <linux/matroxfb.h>
		118	#include <linux/interrupt.h>
		119	#include <asm/uaccess.h>
		120
		121	#ifdef CONFIG_PPC_PMAC
		122	unsigned char nvram_read_byte(int);
		123	static int default_vmode = VMODE_NVRAM;
		124	static int default_cmode = CMODE_NVRAM;
		125	#endif
		126
490	giacomo	127	void *sem_sync;
		128
489	giacomo	129	static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
		130
		131	/* --------------------------------------------------------------------- */
		132
		133	/*
		134	* card parameters
		135	*/
		136
		137	/* --------------------------------------------------------------------- */
		138
		139	static struct fb_var_screeninfo vesafb_defined = {
		140	640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
		141	0,0, /* virtual -> visible no offset */
		142	8, /* depth -> load bits_per_pixel */
		143	0, /* greyscale ? */
		144	{0,0,0}, /* R */
		145	{0,0,0}, /* G */
		146	{0,0,0}, /* B */
		147	{0,0,0}, /* transparency */
		148	0, /* standard pixel format */
		149	FB_ACTIVATE_NOW,
		150	-1,-1,
		151	FB_ACCELF_TEXT, /* accel flags */
		152	39721L,48L,16L,33L,10L,
		153	96L,2L,~0, /* No sync info */
		154	FB_VMODE_NONINTERLACED,
		155	0, {0,0,0,0,0}
		156	};
		157
		158
		159
		160	/* --------------------------------------------------------------------- */
		161	static void update_crtc2(WPMINFO unsigned int pos) {
		162	struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
		163
		164	/* Make sure that displays are compatible */
		165	if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
		166	&& (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
		167	&& (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
		168	) {
		169	switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
		170	case 16:
		171	case 32:
		172	pos = pos * 8;
		173	if (info->interlaced) {
		174	mga_outl(0x3C2C, pos);
		175	mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
		176	} else {
		177	mga_outl(0x3C28, pos);
		178	}
		179	break;
		180	}
		181	}
		182	}
		183
		184	static void matroxfb_crtc1_panpos(WPMINFO2) {
		185	if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
		186	unsigned long flags;
		187	int panpos;
		188
		189	matroxfb_DAC_lock_irqsave(flags);
		190	panpos = ACCESS_FBINFO(crtc1.panpos);
		191	if (panpos >= 0) {
		192	unsigned int extvga_reg;
		193
		194	ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
		195	extvga_reg = mga_inb(M_EXTVGA_INDEX);
		196	mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
		197	if (extvga_reg != 0x00) {
		198	mga_outb(M_EXTVGA_INDEX, extvga_reg);
		199	}
		200	}
		201	matroxfb_DAC_unlock_irqrestore(flags);
		202	}
		203	}
		204
		205	static irqreturn_t matrox_irq(int irq, void dev_id, struct pt_regs fp)
		206	{
		207	u_int32_t status;
		208	int handled = 0;
		209
		210	MINFO_FROM(dev_id);
		211
		212	status = mga_inl(M_STATUS);
		213
		214	if (status & 0x20) {
		215	mga_outl(M_ICLEAR, 0x20);
		216	ACCESS_FBINFO(crtc1.vsync.cnt)++;
		217	matroxfb_crtc1_panpos(PMINFO2);
490	giacomo	218	shark_internal_sem_post(sem_sync);
489	giacomo	219	//wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
		220	handled = 1;
		221	}
		222	if (status & 0x200) {
		223	mga_outl(M_ICLEAR, 0x200);
		224	ACCESS_FBINFO(crtc2.vsync.cnt)++;
490	giacomo	225	shark_internal_sem_post(sem_sync);
489	giacomo	226	//wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
		227	handled = 1;
		228	}
		229	return IRQ_RETVAL(handled);
		230	}
		231
		232	int matroxfb_enable_irq(WPMINFO int reenable) {
		233	u_int32_t bm;
		234
		235	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
		236	bm = 0x220;
		237	else
		238	bm = 0x020;
		239
		240	if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
		241	if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
		242	SA_SHIRQ, "matroxfb", MINFO)) {
		243	clear_bit(0, &ACCESS_FBINFO(irq_flags));
		244	return -EINVAL;
		245	}
		246	/* Clear any pending field interrupts */
		247	mga_outl(M_ICLEAR, bm);
		248	mga_outl(M_IEN, mga_inl(M_IEN) \| bm);
		249	} else if (reenable) {
		250	u_int32_t ien;
		251
		252	ien = mga_inl(M_IEN);
		253	if ((ien & bm) != bm) {
		254	printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", (int)ien);
		255	mga_outl(M_IEN, ien \| bm);
		256	}
		257	}
		258	return 0;
		259	}
		260
		261	static void matroxfb_disable_irq(WPMINFO2) {
		262	if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
		263	/* Flush pending pan-at-vbl request... */
		264	matroxfb_crtc1_panpos(PMINFO2);
		265	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
		266	mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
		267	else
		268	mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
		269	free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
		270	}
		271	}
		272
		273	int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
		274	struct matrox_vsync *vs;
		275	unsigned int cnt;
		276	int ret;
		277
		278	switch (crtc) {
		279	case 0:
		280	vs = &ACCESS_FBINFO(crtc1.vsync);
		281	break;
		282	case 1:
		283	if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
		284	return -ENODEV;
		285	}
		286	vs = &ACCESS_FBINFO(crtc2.vsync);
		287	break;
		288	default:
		289	return -ENODEV;
		290	}
		291	ret = matroxfb_enable_irq(PMINFO 0);
		292	if (ret) {
		293	return ret;
		294	}
		295
490	giacomo	296	shark_internal_sem_wait(sem_sync);
		297
489	giacomo	298	cnt = vs->cnt;
490	giacomo	299	ret = 1;
489	giacomo	300	if (ret < 0) {
		301	return ret;
		302	}
		303	if (ret == 0) {
		304	matroxfb_enable_irq(PMINFO 1);
		305	return -ETIMEDOUT;
		306	}
		307	return 0;
		308	}
		309
		310	/* --------------------------------------------------------------------- */
		311
		312	static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
		313	unsigned int pos;
		314	unsigned short p0, p1, p2;
		315	#ifdef CONFIG_FB_MATROX_32MB
		316	unsigned int p3;
		317	#endif
		318	int vbl;
		319	unsigned long flags;
		320
		321	CRITFLAGS
		322
		323	DBG(__FUNCTION__)
		324
		325	if (ACCESS_FBINFO(dead))
		326	return;
		327
		328	ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
		329	ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
		330	pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
		331	pos += ACCESS_FBINFO(curr.ydstorg.chunks);
		332	p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
		333	p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
		334	p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) \| ((pos >> 16) & 0x0F) \| ((pos >> 14) & 0x40);
		335	#ifdef CONFIG_FB_MATROX_32MB
		336	p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
		337	#endif
		338
		339	/* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
		340	vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
		341
		342	CRITBEGIN
		343
		344	matroxfb_DAC_lock_irqsave(flags);
		345	mga_setr(M_CRTC_INDEX, 0x0D, p0);
		346	mga_setr(M_CRTC_INDEX, 0x0C, p1);
		347	#ifdef CONFIG_FB_MATROX_32MB
		348	if (ACCESS_FBINFO(devflags.support32MB))
		349	mga_setr(M_EXTVGA_INDEX, 0x08, p3);
		350	#endif
		351	if (vbl) {
		352	ACCESS_FBINFO(crtc1.panpos) = p2;
		353	} else {
		354	/* Abort any pending change */
		355	ACCESS_FBINFO(crtc1.panpos) = -1;
		356	mga_setr(M_EXTVGA_INDEX, 0x00, p2);
		357	}
		358	matroxfb_DAC_unlock_irqrestore(flags);
		359
		360	update_crtc2(PMINFO pos);
		361
		362	CRITEND
		363	}
		364
		365	static void matroxfb_remove(WPMINFO int dummy) {
		366	/* Currently we are holding big kernel lock on all dead & usecount updates.
		367	* Destroy everything after all users release it. Especially do not unregister
		368	* framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
		369	* for device unplugged when in use.
		370	* In future we should point mmio.vbase & video.vbase somewhere where we can
		371	* write data without causing too much damage...
		372	*/
		373
		374	ACCESS_FBINFO(dead) = 1;
		375	if (ACCESS_FBINFO(usecount)) {
		376	/* destroy it later */
		377	return;
		378	}
		379	matroxfb_unregister_device(MINFO);
		380	unregister_framebuffer(&ACCESS_FBINFO(fbcon));
		381	matroxfb_g450_shutdown(PMINFO2);
		382	#ifdef CONFIG_MTRR
		383	if (ACCESS_FBINFO(mtrr.vram_valid))
		384	mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
		385	#endif
		386	mga_iounmap(ACCESS_FBINFO(mmio.vbase));
		387	mga_iounmap(ACCESS_FBINFO(video.vbase));
		388	release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
		389	release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
		390	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		391	kfree(minfo);
		392	#endif
		393	}
		394
		395	/*
		396	* Open/Release the frame buffer device
		397	*/
		398
		399	static int matroxfb_open(struct fb_info *info, int user)
		400	{
		401	MINFO_FROM_INFO(info);
		402
		403	DBG_LOOP(__FUNCTION__)
		404
		405	if (ACCESS_FBINFO(dead)) {
		406	return -ENXIO;
		407	}
		408	ACCESS_FBINFO(usecount)++;
		409	if (user) {
		410	ACCESS_FBINFO(userusecount)++;
		411	}
		412	return(0);
		413	}
		414
		415	static int matroxfb_release(struct fb_info *info, int user)
		416	{
		417	MINFO_FROM_INFO(info);
		418
		419	DBG_LOOP(__FUNCTION__)
		420
		421	if (user) {
		422	if (0 == --ACCESS_FBINFO(userusecount)) {
		423	matroxfb_disable_irq(PMINFO2);
		424	}
		425	}
		426	if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
		427	matroxfb_remove(PMINFO 0);
		428	}
		429	return(0);
		430	}
		431
		432	static int matroxfb_pan_display(struct fb_var_screeninfo *var,
		433	struct fb_info* info) {
		434	MINFO_FROM_INFO(info);
		435
		436	DBG(__FUNCTION__)
		437
		438	matrox_pan_var(PMINFO var);
		439	return 0;
		440	}
		441
		442	static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
		443	int bppshft2;
		444
		445	DBG(__FUNCTION__)
		446
		447	bppshft2 = bpp;
		448	if (!bppshft2) {
		449	return 8;
		450	}
		451	if (isInterleave(MINFO))
		452	bppshft2 >>= 1;
		453	if (ACCESS_FBINFO(devflags.video64bits))
		454	bppshft2 >>= 1;
		455	return bppshft2;
		456	}
		457
		458	static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
		459	int over;
		460	int rounding;
		461
		462	DBG(__FUNCTION__)
		463
		464	switch (bpp) {
		465	case 0: return xres;
		466	case 4: rounding = 128;
		467	break;
		468	case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
		469	break;
		470	case 16: rounding = 32;
		471	break;
		472	case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
		473	break;
		474	default: rounding = 16;
		475	/* on G400, 16 really does not work */
		476	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
		477	rounding = 32;
		478	break;
		479	}
		480	if (isInterleave(MINFO)) {
		481	rounding *= 2;
		482	}
		483	over = xres % rounding;
		484	if (over)
		485	xres += rounding-over;
		486	return xres;
		487	}
		488
		489	static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
		490	const int* width;
		491	int xres_new;
		492
		493	DBG(__FUNCTION__)
		494
		495	if (!bpp) return xres;
		496
		497	width = ACCESS_FBINFO(capable.vxres);
		498
		499	if (ACCESS_FBINFO(devflags.precise_width)) {
		500	while (*width) {
		501	if ((width >= xres) && (matroxfb_test_and_set_rounding(PMINFO width, bpp) == *width)) {
		502	break;
		503	}
		504	width++;
		505	}
		506	xres_new = *width;
		507	} else {
		508	xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
		509	}
		510	if (!xres_new) return 0;
		511	if (xres != xres_new) {
		512	printk(KERN_INFO "matroxfb: cannot set xres to %d, rounded up to %d\n", xres, xres_new);
		513	}
		514	return xres_new;
		515	}
		516
		517	static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
		518
		519	DBG(__FUNCTION__)
		520
		521	switch (var->bits_per_pixel) {
		522	case 4:
		523	return 16; /* pseudocolor... 16 entries HW palette */
		524	case 8:
		525	return 256; /* pseudocolor... 256 entries HW palette */
		526	case 16:
		527	return 16; /* directcolor... 16 entries SW palette */
		528	/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
		529	case 24:
		530	return 16; /* directcolor... 16 entries SW palette */
		531	/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
		532	case 32:
		533	return 16; /* directcolor... 16 entries SW palette */
		534	/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
		535	}
		536	return 16; /* return something reasonable... or panic()? */
		537	}
		538
		539	static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo var, int visual, int video_cmap_len, unsigned int ydstorg) {
		540	struct RGBT {
		541	unsigned char bpp;
		542	struct {
		543	unsigned char offset,
		544	length;
		545	} red,
		546	green,
		547	blue,
		548	transp;
		549	signed char visual;
		550	};
		551	static const struct RGBT table[]= {
		552	{ 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
		553	{15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
		554	{16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
		555	{24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
		556	{32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
		557	};
		558	struct RGBT const *rgbt;
		559	unsigned int bpp = var->bits_per_pixel;
		560	unsigned int vramlen;
		561	unsigned int memlen;
		562
		563	DBG(__FUNCTION__)
		564
		565	switch (bpp) {
		566	case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
		567	break;
		568	case 8: break;
		569	case 16: break;
		570	case 24: break;
		571	case 32: break;
		572	default: return -EINVAL;
		573	}
		574	*ydstorg = 0;
		575	vramlen = ACCESS_FBINFO(video.len_usable);
		576	if (var->yres_virtual < var->yres)
		577	var->yres_virtual = var->yres;
		578	if (var->xres_virtual < var->xres)
		579	var->xres_virtual = var->xres;
		580
		581	var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
		582	memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
		583	if (memlen > vramlen) {
		584	var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
		585	memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
		586	}
		587	/* There is hardware bug that no line can cross 4MB boundary */
		588	/* give up for CFB24, it is impossible to easy workaround it */
		589	/* for other try to do something */
		590	if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
		591	if (bpp == 24) {
		592	/* sorry */
		593	} else {
		594	unsigned int linelen;
		595	unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
		596	unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
		597	unsigned int max_yres;
		598
		599	while (m1) {
		600	int t;
		601
		602	while (m2 >= m1) m2 -= m1;
		603	t = m1;
		604	m1 = m2;
		605	m2 = t;
		606	}
		607	m2 = linelen * PAGE_SIZE / m2;
		608	*ydstorg = m2 = 0x400000 % m2;
		609	max_yres = (vramlen - m2) / linelen;
		610	if (var->yres_virtual > max_yres)
		611	var->yres_virtual = max_yres;
		612	}
		613	}
		614	/* YDSTLEN contains only signed 16bit value */
		615	if (var->yres_virtual > 32767)
		616	var->yres_virtual = 32767;
		617	/* we must round yres/xres down, we already rounded y/xres_virtual up
		618	if it was possible. We should return -EINVAL, but I disagree */
		619	if (var->yres_virtual < var->yres)
		620	var->yres = var->yres_virtual;
		621	if (var->xres_virtual < var->xres)
		622	var->xres = var->xres_virtual;
		623	if (var->xoffset + var->xres > var->xres_virtual)
		624	var->xoffset = var->xres_virtual - var->xres;
		625	if (var->yoffset + var->yres > var->yres_virtual)
		626	var->yoffset = var->yres_virtual - var->yres;
		627
		628	if (bpp == 16 && var->green.length == 5) {
		629	bpp--; /* an artifical value - 15 */
		630	}
		631
		632	for (rgbt = table; rgbt->bpp < bpp; rgbt++);
		633	#define SETCLR(clr)\
		634	var->clr.offset = rgbt->clr.offset;\
		635	var->clr.length = rgbt->clr.length
		636	SETCLR(red);
		637	SETCLR(green);
		638	SETCLR(blue);
		639	SETCLR(transp);
		640	#undef SETCLR
		641	*visual = rgbt->visual;
		642
		643	if (bpp > 8)
		644	dprintk("matroxfb: truecolor: "
		645	"size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
		646	var->transp.length, var->red.length, var->green.length, var->blue.length,
		647	var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
		648
		649	*video_cmap_len = matroxfb_get_cmap_len(var);
		650	dprintk(KERN_INFO "requested %d%d/%dbpp (%d%d)\n", var->xres, var->yres, var->bits_per_pixel,
		651	var->xres_virtual, var->yres_virtual);
		652	return 0;
		653	}
		654
		655	static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
		656	unsigned blue, unsigned transp,
		657	struct fb_info *fb_info)
		658	{
		659	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		660	struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
		661	#endif
		662
		663	DBG(__FUNCTION__)
		664
		665	/*
		666	* Set a single color register. The values supplied are
		667	* already rounded down to the hardware's capabilities
		668	* (according to the entries in the `var' structure). Return
		669	* != 0 for invalid regno.
		670	*/
		671
		672	if (regno >= ACCESS_FBINFO(curr.cmap_len))
		673	return 1;
		674
		675	if (ACCESS_FBINFO(fbcon).var.grayscale) {
		676	/* gray = 0.30R + 0.59G + 0.11B /
		677	red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
		678	}
		679
		680	red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
		681	green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
		682	blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
		683	transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
		684
		685	switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
		686	case 4:
		687	case 8:
		688	mga_outb(M_DAC_REG, regno);
		689	mga_outb(M_DAC_VAL, red);
		690	mga_outb(M_DAC_VAL, green);
		691	mga_outb(M_DAC_VAL, blue);
		692	break;
		693	case 16:
		694	{
		695	u_int16_t col =
		696	(red << ACCESS_FBINFO(fbcon).var.red.offset) \|
		697	(green << ACCESS_FBINFO(fbcon).var.green.offset) \|
		698	(blue << ACCESS_FBINFO(fbcon).var.blue.offset) \|
		699	(transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
		700	ACCESS_FBINFO(cmap[regno]) = col \| (col << 16);
		701	}
		702	break;
		703	case 24:
		704	case 32:
		705	ACCESS_FBINFO(cmap[regno]) =
		706	(red << ACCESS_FBINFO(fbcon).var.red.offset) \|
		707	(green << ACCESS_FBINFO(fbcon).var.green.offset) \|
		708	(blue << ACCESS_FBINFO(fbcon).var.blue.offset) \|
		709	(transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
		710	break;
		711	}
		712	return 0;
		713	}
		714
		715	static void matroxfb_init_fix(WPMINFO2)
		716	{
		717	struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
		718	DBG(__FUNCTION__)
		719
		720	strcpy(fix->id,"MATROX");
		721
		722	fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
		723	fix->ypanstep = 1;
		724	fix->ywrapstep = 0;
		725	fix->mmio_start = ACCESS_FBINFO(mmio.base);
		726	fix->mmio_len = ACCESS_FBINFO(mmio.len);
		727	fix->accel = ACCESS_FBINFO(devflags.accelerator);
		728	}
		729
		730	static void matroxfb_update_fix(WPMINFO2)
		731	{
		732	struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
		733	DBG(__FUNCTION__)
		734
		735	fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
		736	fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
		737	}
		738
		739	static int matroxfb_check_var(struct fb_var_screeninfo var, struct fb_info info)
		740	{
		741	int err;
		742	int visual;
		743	int cmap_len;
		744	unsigned int ydstorg;
		745	MINFO_FROM_INFO(info);
		746
		747	if (ACCESS_FBINFO(dead)) {
		748	return -ENXIO;
		749	}
		750	if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
		751	return err;
		752	return 0;
		753	}
		754
		755	static int matroxfb_set_par(struct fb_info *info)
		756	{
		757	int err;
		758	int visual;
		759	int cmap_len;
		760	unsigned int ydstorg;
		761	struct fb_var_screeninfo *var;
		762	MINFO_FROM_INFO(info);
		763
		764	DBG(__FUNCTION__)
		765
		766	if (ACCESS_FBINFO(dead)) {
		767	return -ENXIO;
		768	}
		769
		770	var = &info->var;
		771	if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
		772	return err;
		773	ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
		774	matroxfb_update_fix(PMINFO2);
		775	ACCESS_FBINFO(fbcon).fix.visual = visual;
		776	ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
		777	ACCESS_FBINFO(fbcon).fix.type_aux = 0;
		778	ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
		779	{
		780	unsigned int pos;
		781
		782	ACCESS_FBINFO(curr.cmap_len) = cmap_len;
		783	ydstorg += ACCESS_FBINFO(devflags.ydstorg);
		784	ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
		785	ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
		786	if (var->bits_per_pixel == 4)
		787	ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
		788	else
		789	ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
		790	ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
		791	{ struct my_timming mt;
		792	struct matrox_hw_state* hw;
		793	int out;
		794
		795	matroxfb_var2my(var, &mt);
		796	mt.crtc = MATROXFB_SRC_CRTC1;
		797	/* CRTC1 delays */
		798	switch (var->bits_per_pixel) {
		799	case 0: mt.delay = 31 + 0; break;
		800	case 16: mt.delay = 21 + 8; break;
		801	case 24: mt.delay = 17 + 8; break;
		802	case 32: mt.delay = 16 + 8; break;
		803	default: mt.delay = 31 + 8; break;
		804	}
		805
		806	hw = &ACCESS_FBINFO(hw);
		807
		808	//down_read(&ACCESS_FBINFO(altout).lock);
		809	for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
		810	if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
		811	ACCESS_FBINFO(outputs[out]).output->compute) {
		812	ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
		813	}
		814	}
		815	//up_read(&ACCESS_FBINFO(altout).lock);
		816	ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
		817	ACCESS_FBINFO(crtc1).mnp = mt.mnp;
		818	ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
		819	pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
		820	pos += ACCESS_FBINFO(curr.ydstorg.chunks);
		821
		822	hw->CRTC[0x0D] = pos & 0xFF;
		823	hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
		824	hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) \| ((pos >> 16) & 0x0F) \| ((pos >> 14) & 0x40);
		825	hw->CRTCEXT[8] = pos >> 21;
		826	ACCESS_FBINFO(hw_switch->restore(PMINFO2));
		827	update_crtc2(PMINFO pos);
		828	//down_read(&ACCESS_FBINFO(altout).lock);
		829	for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
		830	if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
		831	ACCESS_FBINFO(outputs[out]).output->program) {
		832	ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
		833	}
		834	}
		835	for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
		836	if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
		837	ACCESS_FBINFO(outputs[out]).output->start) {
		838	ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
		839	}
		840	}
		841	//up_read(&ACCESS_FBINFO(altout).lock);
		842	matrox_cfbX_init(PMINFO2);
		843	}
		844	}
		845	return 0;
		846	}
		847
		848	static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
		849	{
		850	unsigned int sts1;
		851
		852	matroxfb_enable_irq(PMINFO 0);
		853	memset(vblank, 0, sizeof(*vblank));
		854	vblank->flags = FB_VBLANK_HAVE_VCOUNT \| FB_VBLANK_HAVE_VSYNC \|
		855	FB_VBLANK_HAVE_VBLANK \| FB_VBLANK_HAVE_HBLANK;
		856	sts1 = mga_inb(M_INSTS1);
		857	vblank->vcount = mga_inl(M_VCOUNT);
		858	/* BTW, on my PIII/450 with G400, reading M_INSTS1
		859	byte makes this call about 12% slower (1.70 vs. 2.05 us
		860	per ioctl()) */
		861	if (sts1 & 1)
		862	vblank->flags \|= FB_VBLANK_HBLANKING;
		863	if (sts1 & 8)
		864	vblank->flags \|= FB_VBLANK_VSYNCING;
		865	if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
		866	vblank->flags \|= FB_VBLANK_VBLANKING;
		867	if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
		868	vblank->flags \|= FB_VBLANK_HAVE_COUNT;
		869	/* Only one writer, aligned int value...
		870	it should work without lock and without atomic_t */
		871	vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
		872	}
		873	return 0;
		874	}
		875
		876	static struct matrox_altout panellink_output = {
		877	.name = "Panellink output",
		878	};
		879
		880	static int matroxfb_ioctl(struct inode inode, struct file file,
		881	unsigned int cmd, unsigned long arg,
		882	struct fb_info *info)
		883	{
		884	MINFO_FROM_INFO(info);
		885
		886	DBG(__FUNCTION__)
		887
		888	if (ACCESS_FBINFO(dead)) {
		889	return -ENXIO;
		890	}
		891
		892	switch (cmd) {
		893	case FBIOGET_VBLANK:
		894	{
		895	struct fb_vblank vblank;
		896	int err;
		897
		898	err = matroxfb_get_vblank(PMINFO &vblank);
		899	if (err)
		900	return err;
		901	if (copy_to_user((struct fb_vblank*)arg, &vblank, sizeof(vblank)))
		902	return -EFAULT;
		903	return 0;
		904	}
		905	case FBIO_WAITFORVSYNC:
		906	{
		907	u_int32_t crt;
		908
		909	crt = (u_int32_t )arg;
		910
		911	return matroxfb_wait_for_sync(PMINFO crt);
		912	}
		913	case MATROXFB_SET_OUTPUT_MODE:
		914	{
		915	struct matroxioc_output_mode mom;
		916	struct matrox_altout *oproc;
		917	int val;
		918
		919	if (copy_from_user(&mom, (struct matroxioc_output_mode*)arg, sizeof(mom)))
		920	return -EFAULT;
		921	if (mom.output >= MATROXFB_MAX_OUTPUTS)
		922	return -ENXIO;
		923	//down_read(&ACCESS_FBINFO(altout.lock));
		924	oproc = ACCESS_FBINFO(outputs[mom.output]).output;
		925	if (!oproc) {
		926	val = -ENXIO;
		927	} else if (!oproc->verifymode) {
		928	if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
		929	val = 0;
		930	} else {
		931	val = -EINVAL;
		932	}
		933	} else {
		934	val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
		935	}
		936	if (!val) {
		937	if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
		938	ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
		939	val = 1;
		940	}
		941	}
		942	//up_read(&ACCESS_FBINFO(altout.lock));
		943	if (val != 1)
		944	return val;
		945	switch (ACCESS_FBINFO(outputs[mom.output]).src) {
		946	case MATROXFB_SRC_CRTC1:
		947	matroxfb_set_par(info);
		948	break;
		949	case MATROXFB_SRC_CRTC2:
		950	{
		951	struct matroxfb_dh_fb_info* crtc2;
		952
		953	//down_read(&ACCESS_FBINFO(crtc2.lock));
		954	crtc2 = ACCESS_FBINFO(crtc2.info);
		955	if (crtc2)
		956	crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
		957	//up_read(&ACCESS_FBINFO(crtc2.lock));
		958	}
		959	break;
		960	}
		961	return 0;
		962	}
		963	case MATROXFB_GET_OUTPUT_MODE:
		964	{
		965	struct matroxioc_output_mode mom;
		966	struct matrox_altout *oproc;
		967	int val;
		968
		969	if (copy_from_user(&mom, (struct matroxioc_output_mode*)arg, sizeof(mom)))
		970	return -EFAULT;
		971	if (mom.output >= MATROXFB_MAX_OUTPUTS)
		972	return -ENXIO;
		973	//down_read(&ACCESS_FBINFO(altout.lock));
		974	oproc = ACCESS_FBINFO(outputs[mom.output]).output;
		975	if (!oproc) {
		976	val = -ENXIO;
		977	} else {
		978	mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
		979	val = 0;
		980	}
		981	//up_read(&ACCESS_FBINFO(altout.lock));
		982	if (val)
		983	return val;
		984	if (copy_to_user((struct matroxioc_output_mode*)arg, &mom, sizeof(mom)))
		985	return -EFAULT;
		986	return 0;
		987	}
		988	case MATROXFB_SET_OUTPUT_CONNECTION:
		989	{
		990	u_int32_t tmp;
		991	int i;
		992	int changes;
		993
		994	if (copy_from_user(&tmp, (u_int32_t*)arg, sizeof(tmp)))
		995	return -EFAULT;
		996	for (i = 0; i < 32; i++) {
		997	if (tmp & (1 << i)) {
		998	if (i >= MATROXFB_MAX_OUTPUTS)
		999	return -ENXIO;
		1000	if (!ACCESS_FBINFO(outputs[i]).output)
		1001	return -ENXIO;
		1002	switch (ACCESS_FBINFO(outputs[i]).src) {
		1003	case MATROXFB_SRC_NONE:
		1004	case MATROXFB_SRC_CRTC1:
		1005	break;
		1006	default:
		1007	return -EBUSY;
		1008	}
		1009	}
		1010	}
		1011	if (ACCESS_FBINFO(devflags.panellink)) {
		1012	if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
		1013	if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
		1014	return -EINVAL;
		1015	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1016	if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
		1017	return -EBUSY;
		1018	}
		1019	}
		1020	}
		1021	}
		1022	changes = 0;
		1023	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1024	if (tmp & (1 << i)) {
		1025	if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
		1026	changes = 1;
		1027	ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
		1028	}
		1029	} else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
		1030	changes = 1;
		1031	ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
		1032	}
		1033	}
		1034	if (!changes)
		1035	return 0;
		1036	matroxfb_set_par(info);
		1037	return 0;
		1038	}
		1039	case MATROXFB_GET_OUTPUT_CONNECTION:
		1040	{
		1041	u_int32_t conn = 0;
		1042	int i;
		1043
		1044	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1045	if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
		1046	conn \|= 1 << i;
		1047	}
		1048	}
		1049	if (put_user(conn, (u_int32_t*)arg))
		1050	return -EFAULT;
		1051	return 0;
		1052	}
		1053	case MATROXFB_GET_AVAILABLE_OUTPUTS:
		1054	{
		1055	u_int32_t conn = 0;
		1056	int i;
		1057
		1058	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1059	if (ACCESS_FBINFO(outputs[i]).output) {
		1060	switch (ACCESS_FBINFO(outputs[i]).src) {
		1061	case MATROXFB_SRC_NONE:
		1062	case MATROXFB_SRC_CRTC1:
		1063	conn \|= 1 << i;
		1064	break;
		1065	}
		1066	}
		1067	}
		1068	if (ACCESS_FBINFO(devflags.panellink)) {
		1069	if (conn & MATROXFB_OUTPUT_CONN_DFP)
		1070	conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
		1071	if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
		1072	conn &= ~MATROXFB_OUTPUT_CONN_DFP;
		1073	}
		1074	if (put_user(conn, (u_int32_t*)arg))
		1075	return -EFAULT;
		1076	return 0;
		1077	}
		1078	case MATROXFB_GET_ALL_OUTPUTS:
		1079	{
		1080	u_int32_t conn = 0;
		1081	int i;
		1082
		1083	for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
		1084	if (ACCESS_FBINFO(outputs[i]).output) {
		1085	conn \|= 1 << i;
		1086	}
		1087	}
		1088	if (put_user(conn, (u_int32_t*)arg))
		1089	return -EFAULT;
		1090	return 0;
		1091	}
		1092	case VIDIOC_QUERYCAP:
		1093	{
		1094	struct v4l2_capability r;
		1095
		1096	memset(&r, 0, sizeof(r));
		1097	strcpy(r.driver, "matroxfb");
		1098	strcpy(r.card, "Matrox");
		1099	sprintf26(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
		1100	r.version = KERNEL_VERSION(1,0,0);
		1101	r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
		1102	if (copy_to_user((void*)arg, &r, sizeof(r)))
		1103	return -EFAULT;
		1104	return 0;
		1105
		1106	}
		1107	case VIDIOC_QUERYCTRL:
		1108	{
		1109	struct v4l2_queryctrl qctrl;
		1110	int err;
		1111
		1112	if (copy_from_user(&qctrl, (struct v4l2_queryctrl*)arg, sizeof(qctrl)))
		1113	return -EFAULT;
		1114
		1115	//down_read(&ACCESS_FBINFO(altout).lock);
		1116	if (!ACCESS_FBINFO(outputs[1]).output) {
		1117	err = -ENXIO;
		1118	} else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
		1119	err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
		1120	} else {
		1121	err = -EINVAL;
		1122	}
		1123	//up_read(&ACCESS_FBINFO(altout).lock);
		1124	if (err >= 0 &&
		1125	copy_to_user((struct v4l2_queryctrl*)arg, &qctrl, sizeof(qctrl)))
		1126	return -EFAULT;
		1127	return err;
		1128	}
		1129	case VIDIOC_G_CTRL:
		1130	{
		1131	struct v4l2_control ctrl;
		1132	int err;
		1133
		1134	if (copy_from_user(&ctrl, (struct v4l2_control*)arg, sizeof(ctrl)))
		1135	return -EFAULT;
		1136
		1137	//down_read(&ACCESS_FBINFO(altout).lock);
		1138	if (!ACCESS_FBINFO(outputs[1]).output) {
		1139	err = -ENXIO;
		1140	} else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
		1141	err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
		1142	} else {
		1143	err = -EINVAL;
		1144	}
		1145	//up_read(&ACCESS_FBINFO(altout).lock);
		1146	if (err >= 0 &&
		1147	copy_to_user((struct v4l2_control*)arg, &ctrl, sizeof(ctrl)))
		1148	return -EFAULT;
		1149	return err;
		1150	}
		1151	case VIDIOC_S_CTRL:
		1152	{
		1153	struct v4l2_control ctrl;
		1154	int err;
		1155
		1156	if (copy_from_user(&ctrl, (struct v4l2_control*)arg, sizeof(ctrl)))
		1157	return -EFAULT;
		1158
		1159	//down_read(&ACCESS_FBINFO(altout).lock);
		1160	if (!ACCESS_FBINFO(outputs[1]).output) {
		1161	err = -ENXIO;
		1162	} else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
		1163	err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
		1164	} else {
		1165	err = -EINVAL;
		1166	}
		1167	//up_read(&ACCESS_FBINFO(altout).lock);
		1168	return err;
		1169	}
		1170	}
		1171	return -ENOTTY;
		1172	}
		1173
		1174	/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
		1175
		1176	static int matroxfb_blank(int blank, struct fb_info *info)
		1177	{
		1178	int seq;
		1179	int crtc;
		1180	CRITFLAGS
		1181	MINFO_FROM_INFO(info);
		1182
		1183	DBG(__FUNCTION__)
		1184
		1185	if (ACCESS_FBINFO(dead))
		1186	return 1;
		1187
		1188	switch (blank) {
		1189	case 1: seq = 0x20; crtc = 0x00; break; /* works ??? */
		1190	case 2: seq = 0x20; crtc = 0x10; break;
		1191	case 3: seq = 0x20; crtc = 0x20; break;
		1192	case 4: seq = 0x20; crtc = 0x30; break;
		1193	default: seq = 0x00; crtc = 0x00; break;
		1194	}
		1195
		1196	CRITBEGIN
		1197
		1198	mga_outb(M_SEQ_INDEX, 1);
		1199	mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) \| seq);
		1200	mga_outb(M_EXTVGA_INDEX, 1);
		1201	mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) \| crtc);
		1202
		1203	CRITEND
		1204	return 0;
		1205	}
		1206
		1207	static struct fb_ops matroxfb_ops = {
		1208	.owner = THIS_MODULE,
		1209	.fb_open = matroxfb_open,
		1210	.fb_release = matroxfb_release,
		1211	.fb_check_var = matroxfb_check_var,
		1212	.fb_set_par = matroxfb_set_par,
		1213	.fb_setcolreg = matroxfb_setcolreg,
		1214	.fb_pan_display =matroxfb_pan_display,
		1215	.fb_blank = matroxfb_blank,
		1216	.fb_ioctl = matroxfb_ioctl,
		1217	/* .fb_fillrect = <set by matrox_cfbX_init>, */
		1218	/* .fb_copyarea = <set by matrox_cfbX_init>, */
		1219	/* .fb_imageblit = <set by matrox_cfbX_init>, */
		1220	/* .fb_cursor = <set by matrox_cfbX_init>, */
		1221	};
		1222
		1223	#define RSDepth(X) (((X) >> 8) & 0x0F)
		1224	#define RS8bpp 0x1
		1225	#define RS15bpp 0x2
		1226	#define RS16bpp 0x3
		1227	#define RS32bpp 0x4
		1228	#define RS4bpp 0x5
		1229	#define RS24bpp 0x6
		1230	#define RSText 0x7
		1231	#define RSText8 0x8
		1232	/* 9-F */
		1233	static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
		1234	{ { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
		1235	{ { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
		1236	{ { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
		1237	{ { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
		1238	{ { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
		1239	{ { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
		1240	{ { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
		1241	{ { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
		1242	};
		1243
		1244	/* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
		1245	static unsigned int mem; /* "matrox:mem:xxxxxM" */
		1246	static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
		1247	static int inv24; /* "matrox:inv24" */
		1248	static int cross4MB = -1; /* "matrox:cross4MB" */
		1249	static int disabled; /* "matrox:disabled" */
		1250	static int noaccel; /* "matrox:noaccel" */
		1251	static int nopan; /* "matrox:nopan" */
		1252	static int no_pci_retry; /* "matrox:nopciretry" */
		1253	static int novga; /* "matrox:novga" */
		1254	static int nobios; /* "matrox:nobios" */
		1255	static int noinit = 1; /* "matrox:init" */
		1256	static int inverse; /* "matrox:inverse" */
		1257	static int sgram; /* "matrox:sgram" */
		1258	#ifdef CONFIG_MTRR
		1259	static int mtrr = 1; /* "matrox:nomtrr" */
		1260	#endif
		1261	static int grayscale; /* "matrox:grayscale" */
		1262	static int dev = -1; /* "matrox:dev:xxxxx" */
		1263	static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
		1264	static int depth = -1; /* "matrox:depth:xxxxx" */
		1265	static unsigned int xres; /* "matrox:xres:xxxxx" */
		1266	static unsigned int yres; /* "matrox:yres:xxxxx" */
		1267	static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
		1268	static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
		1269	static unsigned int vslen; /* "matrox:vslen:xxxxx" */
		1270	static unsigned int left = ~0; /* "matrox:left:xxxxx" */
		1271	static unsigned int right = ~0; /* "matrox:right:xxxxx" */
		1272	static unsigned int hslen; /* "matrox:hslen:xxxxx" */
		1273	static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
		1274	static int sync = -1; /* "matrox:sync:xxxxx" */
		1275	static unsigned int fv; /* "matrox:fv:xxxxx" */
		1276	static unsigned int fh; /* "matrox:fh:xxxxxk" */
		1277	static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
		1278	static int dfp; /* "matrox:dfp */
		1279	static int dfp_type = -1; /* "matrox:dfp:xxx */
		1280	static int memtype = -1; /* "matrox:memtype:xxx" */
		1281
		1282	#ifndef MODULE
		1283	static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
		1284	#endif
		1285
		1286	static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
		1287	vaddr_t vm;
		1288	unsigned int offs;
		1289	unsigned int offs2;
		1290	unsigned char store;
		1291	unsigned char bytes[32];
		1292	unsigned char* tmp;
		1293
		1294	DBG(__FUNCTION__)
		1295
		1296	vm = ACCESS_FBINFO(video.vbase);
		1297	maxSize &= ~0x1FFFFF; /* must be X2MB (really it must be 2 or X4MB) */
		1298	/* at least 2MB */
		1299	if (maxSize < 0x0200000) return 0;
		1300	if (maxSize > 0x2000000) maxSize = 0x2000000;
		1301
		1302	mga_outb(M_EXTVGA_INDEX, 0x03);
		1303	mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) \| 0x80);
		1304
		1305	store = mga_readb(vm, 0x1234);
		1306	tmp = bytes;
		1307	for (offs = 0x100000; offs < maxSize; offs += 0x200000)
		1308	*tmp++ = mga_readb(vm, offs);
		1309	for (offs = 0x100000; offs < maxSize; offs += 0x200000)
		1310	mga_writeb(vm, offs, 0x02);
		1311	if (ACCESS_FBINFO(features.accel.has_cacheflush))
		1312	mga_outb(M_CACHEFLUSH, 0x00);
		1313	else
		1314	mga_writeb(vm, 0x1234, 0x99);
		1315	for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
		1316	if (mga_readb(vm, offs) != 0x02)
		1317	break;
		1318	mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
		1319	if (mga_readb(vm, offs))
		1320	break;
		1321	}
		1322	tmp = bytes;
		1323	for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
		1324	mga_writeb(vm, offs2, *tmp++);
		1325	mga_writeb(vm, 0x1234, store);
		1326
		1327	mga_outb(M_EXTVGA_INDEX, 0x03);
		1328	mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) & ~0x80);
		1329
		1330	*realSize = offs - 0x100000;
		1331	#ifdef CONFIG_FB_MATROX_MILLENIUM
		1332	ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) \|\| ((offs - 0x100000) & 0x3FFFFF));
		1333	#endif
		1334	return 1;
		1335	}
		1336
		1337	struct video_board {
		1338	int maxvram;
		1339	int maxdisplayable;
		1340	int accelID;
		1341	struct matrox_switch* lowlevel;
		1342	};
		1343	#ifdef CONFIG_FB_MATROX_MILLENIUM
		1344	static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
		1345	static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
		1346	static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
		1347	#endif /* CONFIG_FB_MATROX_MILLENIUM */
		1348	#ifdef CONFIG_FB_MATROX_MYSTIQUE
		1349	static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
		1350	#endif /* CONFIG_FB_MATROX_MYSTIQUE */
		1351	#ifdef CONFIG_FB_MATROX_G100
		1352	static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
		1353	static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
		1354	#ifdef CONFIG_FB_MATROX_32MB
		1355	/* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
		1356	whole 32MB */
		1357	static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
		1358	#else
		1359	static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
		1360	#endif
		1361	#endif
		1362
		1363	#define DEVF_VIDEO64BIT 0x0001
		1364	#define DEVF_SWAPS 0x0002
		1365	#define DEVF_SRCORG 0x0004
		1366	#define DEVF_DUALHEAD 0x0008
		1367	#define DEVF_CROSS4MB 0x0010
		1368	#define DEVF_TEXT4B 0x0020
		1369	/* #define DEVF_recycled 0x0040 */
		1370	/* #define DEVF_recycled 0x0080 */
		1371	#define DEVF_SUPPORT32MB 0x0100
		1372	#define DEVF_ANY_VXRES 0x0200
		1373	#define DEVF_TEXT16B 0x0400
		1374	#define DEVF_CRTC2 0x0800
		1375	#define DEVF_MAVEN_CAPABLE 0x1000
		1376	#define DEVF_PANELLINK_CAPABLE 0x2000
		1377	#define DEVF_G450DAC 0x4000
		1378
		1379	#define DEVF_GCORE (DEVF_VIDEO64BIT \| DEVF_SWAPS \| DEVF_CROSS4MB)
		1380	#define DEVF_G2CORE (DEVF_GCORE \| DEVF_ANY_VXRES \| DEVF_MAVEN_CAPABLE \| DEVF_PANELLINK_CAPABLE \| DEVF_SRCORG \| DEVF_DUALHEAD)
		1381	#define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
		1382	#define DEVF_G200 (DEVF_G2CORE)
		1383	#define DEVF_G400 (DEVF_G2CORE \| DEVF_SUPPORT32MB \| DEVF_TEXT16B \| DEVF_CRTC2)
		1384	/* if you'll find how to drive DFP... */
		1385	#define DEVF_G450 (DEVF_GCORE \| DEVF_ANY_VXRES \| DEVF_SUPPORT32MB \| DEVF_TEXT16B \| DEVF_CRTC2 \| DEVF_G450DAC \| DEVF_SRCORG \| DEVF_DUALHEAD)
		1386	#define DEVF_G550 (DEVF_G450)
		1387
		1388	static struct board {
		1389	unsigned short vendor, device, rev, svid, sid;
		1390	unsigned int flags;
		1391	unsigned int maxclk;
		1392	enum mga_chip chip;
		1393	struct video_board* base;
		1394	const char* name;
		1395	} dev_list[] = {
		1396	#ifdef CONFIG_FB_MATROX_MILLENIUM
		1397	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
		1398	0, 0,
		1399	DEVF_TEXT4B,
		1400	230000,
		1401	MGA_2064,
		1402	&vbMillennium,
		1403	"Millennium (PCI)"},
		1404	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
		1405	0, 0,
		1406	DEVF_SWAPS,
		1407	220000,
		1408	MGA_2164,
		1409	&vbMillennium2,
		1410	"Millennium II (PCI)"},
		1411	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
		1412	0, 0,
		1413	DEVF_SWAPS,
		1414	250000,
		1415	MGA_2164,
		1416	&vbMillennium2A,
		1417	"Millennium II (AGP)"},
		1418	#endif
		1419	#ifdef CONFIG_FB_MATROX_MYSTIQUE
		1420	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
		1421	0, 0,
		1422	DEVF_VIDEO64BIT \| DEVF_CROSS4MB,
		1423	180000,
		1424	MGA_1064,
		1425	&vbMystique,
		1426	"Mystique (PCI)"},
		1427	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
		1428	0, 0,
		1429	DEVF_VIDEO64BIT \| DEVF_SWAPS \| DEVF_CROSS4MB,
		1430	220000,
		1431	MGA_1164,
		1432	&vbMystique,
		1433	"Mystique 220 (PCI)"},
		1434	#endif
		1435	#ifdef CONFIG_FB_MATROX_G100
		1436	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
		1437	0, 0,
		1438	DEVF_G100,
		1439	230000,
		1440	MGA_G100,
		1441	&vbG100,
		1442	"MGA-G100 (PCI)"},
		1443	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
		1444	0, 0,
		1445	DEVF_G100,
		1446	230000,
		1447	MGA_G100,
		1448	&vbG100,
		1449	"MGA-G100 (AGP)"},
		1450	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
		1451	0, 0,
		1452	DEVF_G200,
		1453	250000,
		1454	MGA_G200,
		1455	&vbG200,
		1456	"MGA-G200 (PCI)"},
		1457	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1458	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
		1459	DEVF_G200,
		1460	220000,
		1461	MGA_G200,
		1462	&vbG200,
		1463	"MGA-G200 (AGP)"},
		1464	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1465	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
		1466	DEVF_G200,
		1467	230000,
		1468	MGA_G200,
		1469	&vbG200,
		1470	"Mystique G200 (AGP)"},
		1471	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1472	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
		1473	DEVF_G200,
		1474	250000,
		1475	MGA_G200,
		1476	&vbG200,
		1477	"Millennium G200 (AGP)"},
		1478	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1479	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
		1480	DEVF_G200,
		1481	230000,
		1482	MGA_G200,
		1483	&vbG200,
		1484	"Marvel G200 (AGP)"},
		1485	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1486	PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
		1487	DEVF_G200,
		1488	230000,
		1489	MGA_G200,
		1490	&vbG200,
		1491	"MGA-G200 (AGP)"},
		1492	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
		1493	0, 0,
		1494	DEVF_G200,
		1495	230000,
		1496	MGA_G200,
		1497	&vbG200,
		1498	"G200 (AGP)"},
		1499	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
		1500	PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
		1501	DEVF_G400,
		1502	360000,
		1503	MGA_G400,
		1504	&vbG400,
		1505	"Millennium G400 MAX (AGP)"},
		1506	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
		1507	0, 0,
		1508	DEVF_G400,
		1509	300000,
		1510	MGA_G400,
		1511	&vbG400,
		1512	"G400 (AGP)"},
		1513	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
		1514	0, 0,
		1515	DEVF_G450,
		1516	360000,
		1517	MGA_G450,
		1518	&vbG400,
		1519	"G450"},
		1520	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
		1521	0, 0,
		1522	DEVF_G550,
		1523	360000,
		1524	MGA_G550,
		1525	&vbG400,
		1526	"G550"},
		1527	#endif
		1528	{0, 0, 0xFF,
		1529	0, 0,
		1530	0,
		1531	0,
		1532	0,
		1533	NULL,
		1534	NULL}};
		1535
		1536	#ifndef MODULE
		1537	static struct fb_videomode defaultmode = {
		1538	/* 640x480 @ 60Hz, 31.5 kHz */
		1539	NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
		1540	0, FB_VMODE_NONINTERLACED
		1541	};
		1542	#endif /* !MODULE */
		1543
		1544	static int hotplug = 0;
		1545
		1546	static int initMatrox2(WPMINFO struct board* b){
		1547	unsigned long ctrlptr_phys = 0;
		1548	unsigned long video_base_phys = 0;
		1549	unsigned int memsize;
		1550	int err;
		1551
		1552	DBG(__FUNCTION__)
		1553
		1554	/* set default values... */
		1555	vesafb_defined.accel_flags = FB_ACCELF_TEXT;
		1556
		1557	ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
		1558	ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
		1559	ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
		1560
		1561	printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
		1562	ACCESS_FBINFO(capable.plnwt) = 1;
		1563	ACCESS_FBINFO(chip) = b->chip;
		1564	ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
		1565	ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
		1566	if (b->flags & DEVF_TEXT4B) {
		1567	ACCESS_FBINFO(devflags.vgastep) = 4;
		1568	ACCESS_FBINFO(devflags.textmode) = 4;
		1569	ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
		1570	} else if (b->flags & DEVF_TEXT16B) {
		1571	ACCESS_FBINFO(devflags.vgastep) = 16;
		1572	ACCESS_FBINFO(devflags.textmode) = 1;
		1573	ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
		1574	} else {
		1575	ACCESS_FBINFO(devflags.vgastep) = 8;
		1576	ACCESS_FBINFO(devflags.textmode) = 1;
		1577	ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
		1578	}
		1579	#ifdef CONFIG_FB_MATROX_32MB
		1580	ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
		1581	#endif
		1582	ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
		1583	ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
		1584	ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
		1585	ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
		1586	if (b->flags & DEVF_PANELLINK_CAPABLE) {
		1587	ACCESS_FBINFO(outputs[2]).data = MINFO;
		1588	ACCESS_FBINFO(outputs[2]).output = &panellink_output;
		1589	if (dfp)
		1590	ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_CRTC1;
		1591	else
		1592	ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_NONE;
		1593	ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
		1594	ACCESS_FBINFO(devflags.panellink) = 1;
		1595	}
		1596	ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
		1597	ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
		1598	ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
		1599	ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
		1600
		1601	if (ACCESS_FBINFO(capable.cross4MB) < 0)
		1602	ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
		1603	if (b->flags & DEVF_SWAPS) {
		1604	ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
		1605	video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
		1606	ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
		1607	} else {
		1608	ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
		1609	video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
		1610	ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
		1611	}
		1612	err = -EINVAL;
		1613	if (!ctrlptr_phys) {
		1614	printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
		1615	goto fail;
		1616	}
		1617	if (!video_base_phys) {
		1618	printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
		1619	goto fail;
		1620	}
		1621	memsize = b->base->maxvram;
		1622	if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
		1623	goto fail;
		1624	}
		1625	if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
		1626	goto failCtrlMR;
		1627	}
		1628	ACCESS_FBINFO(video.len_maximum) = memsize;
		1629	/* convert mem (autodetect k, M) */
		1630	if (mem < 1024) mem *= 1024;
		1631	if (mem < 0x00100000) mem *= 1024;
		1632
		1633	if (mem && (mem < memsize))
		1634	memsize = mem;
		1635	err = -ENOMEM;
		1636	if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
		1637	printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
		1638	goto failVideoMR;
		1639	}
		1640	ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
		1641	ACCESS_FBINFO(mmio.len) = 16384;
		1642	ACCESS_FBINFO(video.base) = video_base_phys;
		1643	if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
		1644	printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
		1645	video_base_phys, memsize);
		1646	goto failCtrlIO;
		1647	}
		1648	{
		1649	u_int32_t cmd;
		1650	u_int32_t mga_option;
		1651
		1652	pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, (void *)&mga_option);
		1653	pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, (void *)&cmd);
		1654	mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
		1655	mga_option \|= MX_OPTION_BSWAP;
		1656	/* disable palette snooping */
		1657	cmd &= ~PCI_COMMAND_VGA_PALETTE;
		1658	if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437, NULL)) {
		1659	if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
		1660	printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
		1661	}
		1662	mga_option \|= 0x20000000;
		1663	ACCESS_FBINFO(devflags.nopciretry) = 1;
		1664	}
		1665	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
		1666	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
		1667	ACCESS_FBINFO(hw).MXoptionReg = mga_option;
		1668
		1669	/* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
		1670	/* maybe preinit() candidate, but it is same... for all devices... at this time... */
		1671	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
		1672	}
		1673
		1674	err = -ENXIO;
		1675	matroxfb_read_pins(PMINFO2);
		1676	if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
		1677	goto failVideoIO;
		1678	}
		1679
		1680	err = -ENOMEM;
		1681	if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) \|\| !ACCESS_FBINFO(video.len)) {
		1682	printk(KERN_ERR "matroxfb: cannot determine memory size\n");
		1683	goto failVideoIO;
		1684	}
		1685	ACCESS_FBINFO(devflags.ydstorg) = 0;
		1686
		1687	ACCESS_FBINFO(fbcon.currcon) = -1;
		1688	ACCESS_FBINFO(video.base) = video_base_phys;
		1689	ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
		1690	if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
		1691	ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
		1692	#ifdef CONFIG_MTRR
		1693	if (mtrr) {
		1694	ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
		1695	ACCESS_FBINFO(mtrr.vram_valid) = 1;
		1696	printk(KERN_INFO "matroxfb: MTRR's turned on\n");
		1697	}
		1698	#endif /* CONFIG_MTRR */
		1699
		1700	if (!ACCESS_FBINFO(devflags.novga))
		1701	request_region(0x3C0, 32, "matrox");
		1702	matroxfb_g450_connect(PMINFO2);
		1703	ACCESS_FBINFO(hw_switch->reset(PMINFO2));
		1704
		1705	ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
		1706	ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
		1707	ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
		1708	ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
		1709	ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
		1710
		1711	/* static settings */
		1712	vesafb_defined.red = colors[depth-1].red;
		1713	vesafb_defined.green = colors[depth-1].green;
		1714	vesafb_defined.blue = colors[depth-1].blue;
		1715	vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
		1716	vesafb_defined.grayscale = grayscale;
		1717	vesafb_defined.vmode = 0;
		1718	if (noaccel)
		1719	vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
		1720
		1721	ACCESS_FBINFO(fbops) = matroxfb_ops;
		1722	ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
		1723	ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
		1724	/* after __init time we are like module... no logo */
		1725	ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
		1726	ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
		1727	fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
		1728
		1729	#ifndef MODULE
		1730	/* mode database is marked __init!!! */
		1731	if (!hotplug) {
		1732	fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
		1733	NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
		1734	}
		1735	#endif /* !MODULE */
		1736
		1737	/* mode modifiers */
		1738	if (hslen)
		1739	vesafb_defined.hsync_len = hslen;
		1740	if (vslen)
		1741	vesafb_defined.vsync_len = vslen;
		1742	if (left != ~0)
		1743	vesafb_defined.left_margin = left;
		1744	if (right != ~0)
		1745	vesafb_defined.right_margin = right;
		1746	if (upper != ~0)
		1747	vesafb_defined.upper_margin = upper;
		1748	if (lower != ~0)
		1749	vesafb_defined.lower_margin = lower;
		1750	if (xres)
		1751	vesafb_defined.xres = xres;
		1752	if (yres)
		1753	vesafb_defined.yres = yres;
		1754	if (sync != -1)
		1755	vesafb_defined.sync = sync;
		1756	else if (vesafb_defined.sync == ~0) {
		1757	vesafb_defined.sync = 0;
		1758	if (yres < 400)
		1759	vesafb_defined.sync \|= FB_SYNC_HOR_HIGH_ACT;
		1760	else if (yres < 480)
		1761	vesafb_defined.sync \|= FB_SYNC_VERT_HIGH_ACT;
		1762	}
		1763
		1764	/* fv, fh, maxclk limits was specified */
		1765	{
		1766	unsigned int tmp;
		1767
		1768	if (fv) {
		1769	tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
		1770	+ vesafb_defined.lower_margin + vesafb_defined.vsync_len);
		1771	if ((tmp < fh) \|\| (fh == 0)) fh = tmp;
		1772	}
		1773	if (fh) {
		1774	tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
		1775	+ vesafb_defined.right_margin + vesafb_defined.hsync_len);
		1776	if ((tmp < maxclk) \|\| (maxclk == 0)) maxclk = tmp;
		1777	}
		1778	tmp = (maxclk + 499) / 500;
		1779	if (tmp) {
		1780	tmp = (2000000000 + tmp) / tmp;
		1781	if (tmp > pixclock) pixclock = tmp;
		1782	}
		1783	}
		1784	if (pixclock) {
		1785	if (pixclock < 2000) /* > 500MHz */
		1786	pixclock = 4000; /* 250MHz */
		1787	if (pixclock > 1000000)
		1788	pixclock = 1000000; /* 1MHz */
		1789	vesafb_defined.pixclock = pixclock;
		1790	}
		1791
		1792	/* FIXME: Where to move this?! */
		1793	#if defined(CONFIG_PPC_PMAC)
		1794	#ifndef MODULE
		1795	if (_machine == _MACH_Pmac) {
		1796	struct fb_var_screeninfo var;
		1797	if (default_vmode <= 0 \|\| default_vmode > VMODE_MAX)
		1798	default_vmode = VMODE_640_480_60;
		1799	#ifdef CONFIG_NVRAM
		1800	if (default_cmode == CMODE_NVRAM)
		1801	default_cmode = nvram_read_byte(NV_CMODE);
		1802	#endif
		1803	if (default_cmode < CMODE_8 \|\| default_cmode > CMODE_32)
		1804	default_cmode = CMODE_8;
		1805	if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
		1806	var.accel_flags = vesafb_defined.accel_flags;
		1807	var.xoffset = var.yoffset = 0;
		1808	/* Note: mac_vmode_to_var() does not set all parameters */
		1809	vesafb_defined = var;
		1810	}
		1811	}
		1812	#endif /* !MODULE */
		1813	#endif /* CONFIG_PPC_PMAC */
		1814	vesafb_defined.xres_virtual = vesafb_defined.xres;
		1815	if (nopan) {
		1816	vesafb_defined.yres_virtual = vesafb_defined.yres;
		1817	} else {
		1818	vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
		1819	to yres_virtual * xres_virtual < 2^32 */
		1820	}
		1821	matroxfb_init_fix(PMINFO2);
		1822	err = -EINVAL;
		1823
		1824	printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
		1825	vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
		1826	vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
		1827	printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
		1828	ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
		1829
		1830	/* We do not have to set currcon to 0... register_framebuffer do it for us on first console
		1831	* and we do not want currcon == 0 for subsequent framebuffers */
		1832
		1833	if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
		1834	goto failVideoIO;
		1835	}
		1836	printk("fb%d: %s frame buffer device\n",
		1837	ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
		1838	if (ACCESS_FBINFO(fbcon.currcon) < 0) {
		1839	/* there is no console on this fb... but we have to initialize hardware
		1840	* until someone tells me what is proper thing to do */
		1841	printk(KERN_INFO "fb%d: initializing hardware\n",
		1842	ACCESS_FBINFO(fbcon.node));
		1843	fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
		1844	}
		1845	return 0;
		1846	failVideoIO:;
		1847	matroxfb_g450_shutdown(PMINFO2);
		1848	mga_iounmap(ACCESS_FBINFO(video.vbase));
		1849	failCtrlIO:;
		1850	mga_iounmap(ACCESS_FBINFO(mmio.vbase));
		1851	failVideoMR:;
		1852	release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
		1853	failCtrlMR:;
		1854	release_mem_region(ctrlptr_phys, 16384);
		1855	fail:;
		1856	return err;
		1857	}
		1858
		1859	LIST_HEAD(matroxfb_list);
		1860	LIST_HEAD(matroxfb_driver_list);
		1861
		1862	#define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
		1863	#define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
		1864	int matroxfb_register_driver(struct matroxfb_driver* drv) {
		1865	struct matrox_fb_info* minfo;
		1866
		1867	list_add(&drv->node, &matroxfb_driver_list);
		1868	for (minfo = matroxfb_l(matroxfb_list.next);
		1869	minfo != matroxfb_l(&matroxfb_list);
		1870	minfo = matroxfb_l(minfo->next_fb.next)) {
		1871	void* p;
		1872
		1873	if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
		1874	continue;
		1875	p = drv->probe(minfo);
		1876	if (p) {
		1877	minfo->drivers_data[minfo->drivers_count] = p;
		1878	minfo->drivers[minfo->drivers_count++] = drv;
		1879	}
		1880	}
		1881	return 0;
		1882	}
		1883
		1884	void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
		1885	struct matrox_fb_info* minfo;
		1886
		1887	list_del(&drv->node);
		1888	for (minfo = matroxfb_l(matroxfb_list.next);
		1889	minfo != matroxfb_l(&matroxfb_list);
		1890	minfo = matroxfb_l(minfo->next_fb.next)) {
		1891	int i;
		1892
		1893	for (i = 0; i < minfo->drivers_count; ) {
		1894	if (minfo->drivers[i] == drv) {
		1895	if (drv && drv->remove)
		1896	drv->remove(minfo, minfo->drivers_data[i]);
		1897	minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
		1898	minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
		1899	} else
		1900	i++;
		1901	}
		1902	}
		1903	}
		1904
		1905	static void matroxfb_register_device(struct matrox_fb_info* minfo) {
		1906	struct matroxfb_driver* drv;
		1907	int i = 0;
		1908	list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
		1909	for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
		1910	drv != matroxfb_driver_l(&matroxfb_driver_list);
		1911	drv = matroxfb_driver_l(drv->node.next)) {
		1912	if (drv && drv->probe) {
		1913	void *p = drv->probe(minfo);
		1914	if (p) {
		1915	minfo->drivers_data[i] = p;
		1916	minfo->drivers[i++] = drv;
		1917	if (i == MATROXFB_MAX_FB_DRIVERS)
		1918	break;
		1919	}
		1920	}
		1921	}
		1922	minfo->drivers_count = i;
		1923	}
		1924
		1925	static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
		1926	int i;
		1927
		1928	list_del(&ACCESS_FBINFO(next_fb));
		1929	for (i = 0; i < minfo->drivers_count; i++) {
		1930	struct matroxfb_driver* drv = minfo->drivers[i];
		1931
		1932	if (drv && drv->remove)
		1933	drv->remove(minfo, minfo->drivers_data[i]);
		1934	}
		1935	}
		1936
		1937	static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
		1938	struct board* b;
		1939	u_int8_t rev;
		1940	u_int16_t svid;
		1941	u_int16_t sid;
		1942	struct matrox_fb_info* minfo;
		1943	int err;
		1944	u_int32_t cmd;
		1945	#ifndef CONFIG_FB_MATROX_MULTIHEAD
		1946	static int registered = 0;
		1947	#endif
		1948	DBG(__FUNCTION__)
		1949
		1950	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
		1951	svid = pdev->subsystem_vendor;
		1952	sid = pdev->subsystem_device;
		1953	for (b = dev_list; b->vendor; b++) {
		1954	if ((b->vendor != pdev->vendor) \|\| (b->device != pdev->device) \|\| (b->rev < rev)) continue;
		1955	if (b->svid)
		1956	if ((b->svid != svid) \|\| (b->sid != sid)) continue;
		1957	break;
		1958	}
		1959	/* not match... */
		1960	if (!b->vendor)
		1961	return -1;
		1962	if (dev > 0) {
		1963	/* not requested one... */
		1964	dev--;
		1965	return -1;
		1966	}
		1967	pci_read_config_dword(pdev, PCI_COMMAND, (void *)&cmd);
		1968	if (pci_enable_device(pdev)) {
		1969	return -1;
		1970	}
		1971
		1972	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		1973	minfo = (struct matrox_fb_info)kmalloc(sizeof(minfo), GFP_KERNEL);
		1974	if (!minfo)
		1975	return -1;
		1976	#else
		1977	if (registered) /* singlehead driver... */
		1978	return -1;
		1979	minfo = &matroxfb_global_mxinfo;
		1980	#endif
		1981	memset(MINFO, 0, sizeof(*MINFO));
		1982
		1983	ACCESS_FBINFO(pcidev) = pdev;
		1984	ACCESS_FBINFO(dead) = 0;
		1985	ACCESS_FBINFO(usecount) = 0;
		1986	ACCESS_FBINFO(userusecount) = 0;
		1987
		1988	pci_set_drvdata(pdev, MINFO);
		1989	/* DEVFLAGS */
		1990	ACCESS_FBINFO(devflags.memtype) = memtype;
		1991	if (memtype != -1)
		1992	noinit = 0;
		1993	if (cmd & PCI_COMMAND_MEMORY) {
		1994	ACCESS_FBINFO(devflags.novga) = novga;
		1995	ACCESS_FBINFO(devflags.nobios) = nobios;
		1996	ACCESS_FBINFO(devflags.noinit) = noinit;
		1997	/* subsequent heads always needs initialization and must not enable BIOS */
		1998	novga = 1;
		1999	nobios = 1;
		2000	noinit = 0;
		2001	} else {
		2002	ACCESS_FBINFO(devflags.novga) = 1;
		2003	ACCESS_FBINFO(devflags.nobios) = 1;
		2004	ACCESS_FBINFO(devflags.noinit) = 0;
		2005	}
		2006
		2007	ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
		2008	ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
		2009	ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
		2010	ACCESS_FBINFO(devflags.sgram) = sgram;
		2011	ACCESS_FBINFO(capable.cross4MB) = cross4MB;
		2012
		2013	spin_lock_init(&ACCESS_FBINFO(lock.DAC));
		2014	spin_lock_init(&ACCESS_FBINFO(lock.accel));
		2015	init_rwsem(&ACCESS_FBINFO(crtc2.lock));
		2016	init_rwsem(&ACCESS_FBINFO(altout.lock));
		2017	ACCESS_FBINFO(irq_flags) = 0;
490	giacomo	2018	shark_internal_sem_create(&sem_sync,0);
489	giacomo	2019	//init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
		2020	//init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
		2021	ACCESS_FBINFO(crtc1.panpos) = -1;
		2022
		2023	err = initMatrox2(PMINFO b);
		2024	if (!err) {
		2025	#ifndef CONFIG_FB_MATROX_MULTIHEAD
		2026	registered = 1;
		2027	#endif
		2028	matroxfb_register_device(MINFO);
		2029	return 0;
		2030	}
		2031	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		2032	kfree(minfo);
		2033	#endif
		2034	return -1;
		2035	}
		2036
		2037	static void pci_remove_matrox(struct pci_dev* pdev) {
		2038	struct matrox_fb_info* minfo;
		2039
		2040	minfo = pci_get_drvdata(pdev);
		2041	matroxfb_remove(PMINFO 1);
		2042	}
		2043
		2044	static struct pci_device_id matroxfb_devices[] = {
		2045	#ifdef CONFIG_FB_MATROX_MILLENIUM
		2046	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
		2047	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2048	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
		2049	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2050	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
		2051	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2052	#endif
		2053	#ifdef CONFIG_FB_MATROX_MYSTIQUE
		2054	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
		2055	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2056	#endif
		2057	#ifdef CONFIG_FB_MATROX_G100
		2058	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
		2059	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2060	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
		2061	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2062	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
		2063	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2064	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
		2065	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2066	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
		2067	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2068	{PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
		2069	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		2070	#endif
		2071	{0, 0,
		2072	0, 0, 0, 0, 0}
		2073	};
		2074
		2075	MODULE_DEVICE_TABLE(pci, matroxfb_devices);
		2076
		2077
		2078	static struct pci_driver matroxfb_driver = {
		2079	.name = "matroxfb",
		2080	.id_table = matroxfb_devices,
		2081	.probe = matroxfb_probe,
		2082	.remove = pci_remove_matrox,
		2083	};
		2084
		2085	/* ************************** init-time only ************************** */
		2086
		2087	#define RSResolution(X) ((X) & 0x0F)
		2088	#define RS640x400 1
		2089	#define RS640x480 2
		2090	#define RS800x600 3
		2091	#define RS1024x768 4
		2092	#define RS1280x1024 5
		2093	#define RS1600x1200 6
		2094	#define RS768x576 7
		2095	#define RS960x720 8
		2096	#define RS1152x864 9
		2097	#define RS1408x1056 10
		2098	#define RS640x350 11
		2099	#define RS1056x344 12 /* 132 x 43 text */
		2100	#define RS1056x400 13 /* 132 x 50 text */
		2101	#define RS1056x480 14 /* 132 x 60 text */
		2102	#define RSNoxNo 15
		2103	/* 10-FF */
		2104	static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
		2105	{ 640, 400, 48, 16, 39, 8, 96, 2, 70 },
		2106	{ 640, 480, 48, 16, 33, 10, 96, 2, 60 },
		2107	{ 800, 600, 144, 24, 28, 8, 112, 6, 60 },
		2108	{ 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
		2109	{ 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
		2110	{ 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
		2111	{ 768, 576, 144, 16, 28, 6, 112, 4, 60 },
		2112	{ 960, 720, 144, 24, 28, 8, 112, 4, 60 },
		2113	{ 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
		2114	{ 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
		2115	{ 640, 350, 48, 16, 39, 8, 96, 2, 70 },
		2116	{ 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
		2117	{ 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
		2118	{ 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
		2119	{ 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
		2120	};
		2121
		2122	#define RSCreate(X,Y) ((X) \| ((Y) << 8))
		2123	static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
		2124	/* default must be first */
		2125	{ ~0, RSCreate(RSNoxNo, RS8bpp ) },
		2126	{ 0x101, RSCreate(RS640x480, RS8bpp ) },
		2127	{ 0x100, RSCreate(RS640x400, RS8bpp ) },
		2128	{ 0x180, RSCreate(RS768x576, RS8bpp ) },
		2129	{ 0x103, RSCreate(RS800x600, RS8bpp ) },
		2130	{ 0x188, RSCreate(RS960x720, RS8bpp ) },
		2131	{ 0x105, RSCreate(RS1024x768, RS8bpp ) },
		2132	{ 0x190, RSCreate(RS1152x864, RS8bpp ) },
		2133	{ 0x107, RSCreate(RS1280x1024, RS8bpp ) },
		2134	{ 0x198, RSCreate(RS1408x1056, RS8bpp ) },
		2135	{ 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
		2136	{ 0x110, RSCreate(RS640x480, RS15bpp) },
		2137	{ 0x181, RSCreate(RS768x576, RS15bpp) },
		2138	{ 0x113, RSCreate(RS800x600, RS15bpp) },
		2139	{ 0x189, RSCreate(RS960x720, RS15bpp) },
		2140	{ 0x116, RSCreate(RS1024x768, RS15bpp) },
		2141	{ 0x191, RSCreate(RS1152x864, RS15bpp) },
		2142	{ 0x119, RSCreate(RS1280x1024, RS15bpp) },
		2143	{ 0x199, RSCreate(RS1408x1056, RS15bpp) },
		2144	{ 0x11D, RSCreate(RS1600x1200, RS15bpp) },
		2145	{ 0x111, RSCreate(RS640x480, RS16bpp) },
		2146	{ 0x182, RSCreate(RS768x576, RS16bpp) },
		2147	{ 0x114, RSCreate(RS800x600, RS16bpp) },
		2148	{ 0x18A, RSCreate(RS960x720, RS16bpp) },
		2149	{ 0x117, RSCreate(RS1024x768, RS16bpp) },
		2150	{ 0x192, RSCreate(RS1152x864, RS16bpp) },
		2151	{ 0x11A, RSCreate(RS1280x1024, RS16bpp) },
		2152	{ 0x19A, RSCreate(RS1408x1056, RS16bpp) },
		2153	{ 0x11E, RSCreate(RS1600x1200, RS16bpp) },
		2154	{ 0x1B2, RSCreate(RS640x480, RS24bpp) },
		2155	{ 0x184, RSCreate(RS768x576, RS24bpp) },
		2156	{ 0x1B5, RSCreate(RS800x600, RS24bpp) },
		2157	{ 0x18C, RSCreate(RS960x720, RS24bpp) },
		2158	{ 0x1B8, RSCreate(RS1024x768, RS24bpp) },
		2159	{ 0x194, RSCreate(RS1152x864, RS24bpp) },
		2160	{ 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
		2161	{ 0x19C, RSCreate(RS1408x1056, RS24bpp) },
		2162	{ 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
		2163	{ 0x112, RSCreate(RS640x480, RS32bpp) },
		2164	{ 0x183, RSCreate(RS768x576, RS32bpp) },
		2165	{ 0x115, RSCreate(RS800x600, RS32bpp) },
		2166	{ 0x18B, RSCreate(RS960x720, RS32bpp) },
		2167	{ 0x118, RSCreate(RS1024x768, RS32bpp) },
		2168	{ 0x193, RSCreate(RS1152x864, RS32bpp) },
		2169	{ 0x11B, RSCreate(RS1280x1024, RS32bpp) },
		2170	{ 0x19B, RSCreate(RS1408x1056, RS32bpp) },
		2171	{ 0x11F, RSCreate(RS1600x1200, RS32bpp) },
		2172	{ 0x010, RSCreate(RS640x350, RS4bpp ) },
		2173	{ 0x012, RSCreate(RS640x480, RS4bpp ) },
		2174	{ 0x102, RSCreate(RS800x600, RS4bpp ) },
		2175	{ 0x104, RSCreate(RS1024x768, RS4bpp ) },
		2176	{ 0x106, RSCreate(RS1280x1024, RS4bpp ) },
		2177	{ 0, 0 }};
		2178
		2179	static void __init matroxfb_init_params(void) {
		2180	/* fh from kHz to Hz */
		2181	if (fh < 1000)
		2182	fh = 1000; / 1kHz minimum */
		2183	/* maxclk */
		2184	if (maxclk < 1000) maxclk = 1000; / kHz -> Hz, MHz -> kHz */
		2185	if (maxclk < 1000000) maxclk = 1000; / kHz -> Hz, 1MHz minimum */
		2186	/* fix VESA number */
		2187	if (vesa != ~0)
		2188	vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
		2189
		2190	/* static settings */
		2191	for (RSptr = vesamap; RSptr->vesa; RSptr++) {
		2192	if (RSptr->vesa == vesa) break;
		2193	}
		2194	if (!RSptr->vesa) {
		2195	printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
		2196	RSptr = vesamap;
		2197	}
		2198	{
		2199	int res = RSResolution(RSptr->info)-1;
		2200	if (left == ~0)
		2201	left = timmings[res].left;
		2202	if (!xres)
		2203	xres = timmings[res].xres;
		2204	if (right == ~0)
		2205	right = timmings[res].right;
		2206	if (!hslen)
		2207	hslen = timmings[res].hslen;
		2208	if (upper == ~0)
		2209	upper = timmings[res].upper;
		2210	if (!yres)
		2211	yres = timmings[res].yres;
		2212	if (lower == ~0)
		2213	lower = timmings[res].lower;
		2214	if (!vslen)
		2215	vslen = timmings[res].vslen;
		2216	if (!(fv\|\|fh\|\|maxclk\|\|pixclock))
		2217	fv = timmings[res].vfreq;
		2218	if (depth == -1)
		2219	depth = RSDepth(RSptr->info);
		2220	}
		2221	}
		2222
		2223	static void __init matrox_init(void) {
		2224	matroxfb_init_params();
		2225	pci_register_driver(&matroxfb_driver);
		2226	dev = -1; /* accept all new devices... */
		2227	}
		2228
		2229	/* ************************** exit-time only ************************** */
		2230
		2231	static void __exit matrox_done(void) {
		2232	pci_unregister_driver(&matroxfb_driver);
		2233	}
		2234
		2235	#ifndef MODULE
		2236
		2237	/* *********************** init in-kernel code ************************ */
		2238
		2239	int __init matroxfb_setup(char *options) {
		2240	char *this_opt;
		2241
		2242	DBG(__FUNCTION__)
		2243
		2244	if (!options \|\| !*options)
		2245	return 0;
		2246
		2247	while ((this_opt = strsep(&options, ",")) != NULL) {
		2248	if (!*this_opt) continue;
		2249
		2250	dprintk("matroxfb_setup: option %s\n", this_opt);
		2251
		2252	if (!strncmp(this_opt, "dev:", 4))
		2253	dev = simple_strtoul(this_opt+4, NULL, 0);
		2254	else if (!strncmp(this_opt, "depth:", 6)) {
		2255	switch (simple_strtoul(this_opt+6, NULL, 0)) {
		2256	case 0: depth = RSText; break;
		2257	case 4: depth = RS4bpp; break;
		2258	case 8: depth = RS8bpp; break;
		2259	case 15:depth = RS15bpp; break;
		2260	case 16:depth = RS16bpp; break;
		2261	case 24:depth = RS24bpp; break;
		2262	case 32:depth = RS32bpp; break;
		2263	default:
		2264	printk(KERN_ERR "matroxfb: unsupported color depth\n");
		2265	}
		2266	} else if (!strncmp(this_opt, "xres:", 5))
		2267	xres = simple_strtoul(this_opt+5, NULL, 0);
		2268	else if (!strncmp(this_opt, "yres:", 5))
		2269	yres = simple_strtoul(this_opt+5, NULL, 0);
		2270	else if (!strncmp(this_opt, "vslen:", 6))
		2271	vslen = simple_strtoul(this_opt+6, NULL, 0);
		2272	else if (!strncmp(this_opt, "hslen:", 6))
		2273	hslen = simple_strtoul(this_opt+6, NULL, 0);
		2274	else if (!strncmp(this_opt, "left:", 5))
		2275	left = simple_strtoul(this_opt+5, NULL, 0);
		2276	else if (!strncmp(this_opt, "right:", 6))
		2277	right = simple_strtoul(this_opt+6, NULL, 0);
		2278	else if (!strncmp(this_opt, "upper:", 6))
		2279	upper = simple_strtoul(this_opt+6, NULL, 0);
		2280	else if (!strncmp(this_opt, "lower:", 6))
		2281	lower = simple_strtoul(this_opt+6, NULL, 0);
		2282	else if (!strncmp(this_opt, "pixclock:", 9))
		2283	pixclock = simple_strtoul(this_opt+9, NULL, 0);
		2284	else if (!strncmp(this_opt, "sync:", 5))
		2285	sync = simple_strtoul(this_opt+5, NULL, 0);
		2286	else if (!strncmp(this_opt, "vesa:", 5))
		2287	vesa = simple_strtoul(this_opt+5, NULL, 0);
		2288	else if (!strncmp(this_opt, "maxclk:", 7))
		2289	maxclk = simple_strtoul(this_opt+7, NULL, 0);
		2290	else if (!strncmp(this_opt, "fh:", 3))
		2291	fh = simple_strtoul(this_opt+3, NULL, 0);
		2292	else if (!strncmp(this_opt, "fv:", 3))
		2293	fv = simple_strtoul(this_opt+3, NULL, 0);
		2294	else if (!strncmp(this_opt, "mem:", 4))
		2295	mem = simple_strtoul(this_opt+4, NULL, 0);
		2296	else if (!strncmp(this_opt, "mode:", 5))
		2297	strncpy(videomode, this_opt+5, sizeof(videomode));
		2298	else if (!strncmp(this_opt, "dfp:", 4)) {
		2299	dfp_type = simple_strtoul(this_opt+4, NULL, 0);
		2300	dfp = 1;
		2301	}
		2302	#ifdef CONFIG_PPC_PMAC
		2303	else if (!strncmp(this_opt, "vmode:", 6)) {
		2304	unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
		2305	if (vmode > 0 && vmode <= VMODE_MAX)
		2306	default_vmode = vmode;
		2307	} else if (!strncmp(this_opt, "cmode:", 6)) {
		2308	unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
		2309	switch (cmode) {
		2310	case 0:
		2311	case 8:
		2312	default_cmode = CMODE_8;
		2313	break;
		2314	case 15:
		2315	case 16:
		2316	default_cmode = CMODE_16;
		2317	break;
		2318	case 24:
		2319	case 32:
		2320	default_cmode = CMODE_32;
		2321	break;
		2322	}
		2323	}
		2324	#endif
		2325	else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
		2326	disabled = 1;
		2327	else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
		2328	disabled = 0;
		2329	else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
		2330	sgram = 1;
		2331	else if (!strcmp(this_opt, "sdram"))
		2332	sgram = 0;
		2333	else if (!strncmp(this_opt, "memtype:", 8))
		2334	memtype = simple_strtoul(this_opt+8, NULL, 0);
		2335	else {
		2336	int value = 1;
		2337
		2338	if (!strncmp(this_opt, "no", 2)) {
		2339	value = 0;
		2340	this_opt += 2;
		2341	}
		2342	if (! strcmp(this_opt, "inverse"))
		2343	inverse = value;
		2344	else if (!strcmp(this_opt, "accel"))
		2345	noaccel = !value;
		2346	else if (!strcmp(this_opt, "pan"))
		2347	nopan = !value;
		2348	else if (!strcmp(this_opt, "pciretry"))
		2349	no_pci_retry = !value;
		2350	else if (!strcmp(this_opt, "vga"))
		2351	novga = !value;
		2352	else if (!strcmp(this_opt, "bios"))
		2353	nobios = !value;
		2354	else if (!strcmp(this_opt, "init"))
		2355	noinit = !value;
		2356	#ifdef CONFIG_MTRR
		2357	else if (!strcmp(this_opt, "mtrr"))
		2358	mtrr = value;
		2359	#endif
		2360	else if (!strcmp(this_opt, "inv24"))
		2361	inv24 = value;
		2362	else if (!strcmp(this_opt, "cross4MB"))
		2363	cross4MB = value;
		2364	else if (!strcmp(this_opt, "grayscale"))
		2365	grayscale = value;
		2366	else if (!strcmp(this_opt, "dfp"))
		2367	dfp = value;
		2368	else {
		2369	strncpy(videomode, this_opt, sizeof(videomode));
		2370	}
		2371	}
		2372	}
		2373	return 0;
		2374	}
		2375
		2376	static int __initdata initialized = 0;
		2377
		2378	int __init matroxfb_init(void)
		2379	{
		2380	DBG(__FUNCTION__)
		2381
		2382	if (disabled)
		2383	return -ENXIO;
		2384	if (!initialized) {
		2385	initialized = 1;
		2386	matrox_init();
		2387	}
		2388	hotplug = 1;
		2389	/* never return failure, user can hotplug matrox later... */
		2390	return 0;
		2391	}
		2392
		2393	#else
		2394
		2395	/* ************************* init module code ************************** */
		2396
		2397	MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
		2398	MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
		2399	MODULE_LICENSE("GPL");
		2400
		2401	MODULE_PARM(mem, "i");
		2402	MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
		2403	MODULE_PARM(disabled, "i");
		2404	MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
		2405	MODULE_PARM(noaccel, "i");
		2406	MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
		2407	MODULE_PARM(nopan, "i");
		2408	MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
		2409	MODULE_PARM(no_pci_retry, "i");
		2410	MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
		2411	MODULE_PARM(novga, "i");
		2412	MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
		2413	MODULE_PARM(nobios, "i");
		2414	MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
		2415	MODULE_PARM(noinit, "i");
		2416	MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
		2417	MODULE_PARM(memtype, "i");
		2418	MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
		2419	MODULE_PARM(mtrr, "i");
		2420	MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
		2421	MODULE_PARM(sgram, "i");
		2422	MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
		2423	MODULE_PARM(inv24, "i");
		2424	MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
		2425	MODULE_PARM(inverse, "i");
		2426	MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
		2427	#ifdef CONFIG_FB_MATROX_MULTIHEAD
		2428	MODULE_PARM(dev, "i");
		2429	MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
		2430	#else
		2431	MODULE_PARM(dev, "i");
		2432	MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
		2433	#endif
		2434	MODULE_PARM(vesa, "i");
		2435	MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
		2436	MODULE_PARM(xres, "i");
		2437	MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
		2438	MODULE_PARM(yres, "i");
		2439	MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
		2440	MODULE_PARM(upper, "i");
		2441	MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
		2442	MODULE_PARM(lower, "i");
		2443	MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
		2444	MODULE_PARM(vslen, "i");
		2445	MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
		2446	MODULE_PARM(left, "i");
		2447	MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
		2448	MODULE_PARM(right, "i");
		2449	MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
		2450	MODULE_PARM(hslen, "i");
		2451	MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
		2452	MODULE_PARM(pixclock, "i");
		2453	MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
		2454	MODULE_PARM(sync, "i");
		2455	MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
		2456	MODULE_PARM(depth, "i");
		2457	MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
		2458	MODULE_PARM(maxclk, "i");
		2459	MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
		2460	MODULE_PARM(fh, "i");
		2461	MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
		2462	MODULE_PARM(fv, "i");
		2463	MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
		2464	"You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n");
		2465	MODULE_PARM(grayscale, "i");
		2466	MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
		2467	MODULE_PARM(cross4MB, "i");
		2468	MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
		2469	MODULE_PARM(dfp, "i");
		2470	MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
		2471	MODULE_PARM(dfp_type, "i");
		2472	MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
		2473	#ifdef CONFIG_PPC_PMAC
		2474	MODULE_PARM(vmode, "i");
		2475	MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
		2476	MODULE_PARM(cmode, "i");
		2477	MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
		2478	#endif
		2479
		2480	int __init init_module(void){
		2481
		2482	DBG(__FUNCTION__)
		2483
		2484	if (disabled)
		2485	return -ENXIO;
		2486
		2487	if (depth == 0)
		2488	depth = RSText;
		2489	else if (depth == 4)
		2490	depth = RS4bpp;
		2491	else if (depth == 8)
		2492	depth = RS8bpp;
		2493	else if (depth == 15)
		2494	depth = RS15bpp;
		2495	else if (depth == 16)
		2496	depth = RS16bpp;
		2497	else if (depth == 24)
		2498	depth = RS24bpp;
		2499	else if (depth == 32)
		2500	depth = RS32bpp;
		2501	else if (depth != -1) {
		2502	printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
		2503	depth = -1;
		2504	}
		2505	matrox_init();
		2506	/* never return failure; user can hotplug matrox later... */
		2507	return 0;
		2508	}
		2509	#endif /* MODULE */
		2510
		2511	module_exit(matrox_done);
		2512	EXPORT_SYMBOL(matroxfb_register_driver);
		2513	EXPORT_SYMBOL(matroxfb_unregister_driver);
		2514	EXPORT_SYMBOL(matroxfb_wait_for_sync);
		2515	EXPORT_SYMBOL(matroxfb_enable_irq);
		2516
		2517	/*
		2518	* Overrides for Emacs so that we follow Linus's tabbing style.
		2519	* ---------------------------------------------------------------------------
		2520	* Local variables:
		2521	* c-basic-offset: 8
		2522	* End:
		2523	*/
		2524

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(root)/shark/trunk/drivers/fb/matrox/matroxfb_base.c - Rev 490