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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 422 | giacomo | 1 | #ifndef _ASM_I386_DMA_MAPPING_H |
| 2 | #define _ASM_I386_DMA_MAPPING_H |
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| 3 | |||
| 4 | #include <asm/cache.h> |
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| 5 | |||
| 6 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
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| 7 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) |
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| 8 | |||
| 9 | void *dma_alloc_coherent(struct device *dev, size_t size, |
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| 1047 | mauro | 10 | dma_addr_t *dma_handle, int flag); |
| 422 | giacomo | 11 | |
| 1047 | mauro | 12 | void *dma_alloc_coherent_usb(struct device *dev, size_t size, |
| 13 | dma_addr_t *dma_handle, int flag); |
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| 14 | |||
| 422 | giacomo | 15 | void dma_free_coherent(struct device *dev, size_t size, |
| 16 | void *vaddr, dma_addr_t dma_handle); |
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| 17 | |||
| 18 | static inline dma_addr_t |
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| 19 | dma_map_single(struct device *dev, void *ptr, size_t size, |
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| 20 | enum dma_data_direction direction) |
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| 21 | { |
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| 22 | BUG_ON(direction == DMA_NONE); |
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| 23 | flush_write_buffers(); |
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| 24 | return virt_to_phys(ptr); |
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| 25 | } |
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| 26 | |||
| 27 | static inline void |
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| 28 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, |
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| 29 | enum dma_data_direction direction) |
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| 30 | { |
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| 31 | BUG_ON(direction == DMA_NONE); |
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| 32 | } |
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| 33 | |||
| 34 | static inline int |
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| 35 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, |
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| 36 | enum dma_data_direction direction) |
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| 37 | { |
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| 38 | int i; |
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| 39 | |||
| 40 | BUG_ON(direction == DMA_NONE); |
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| 41 | |||
| 42 | for (i = 0; i < nents; i++ ) { |
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| 43 | BUG_ON(!sg[i].page); |
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| 44 | |||
| 45 | sg[i].dma_address = page_to_phys(sg[i].page) + sg[i].offset; |
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| 46 | } |
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| 47 | |||
| 48 | flush_write_buffers(); |
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| 49 | return nents; |
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| 50 | } |
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| 51 | |||
| 52 | static inline dma_addr_t |
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| 53 | dma_map_page(struct device *dev, struct page *page, unsigned long offset, |
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| 54 | size_t size, enum dma_data_direction direction) |
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| 55 | { |
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| 56 | BUG_ON(direction == DMA_NONE); |
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| 57 | return (dma_addr_t)(page_to_pfn(page)) * PAGE_SIZE + offset; |
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| 58 | } |
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| 59 | |||
| 60 | static inline void |
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| 61 | dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, |
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| 62 | enum dma_data_direction direction) |
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| 63 | { |
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| 64 | BUG_ON(direction == DMA_NONE); |
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| 65 | } |
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| 66 | |||
| 67 | |||
| 68 | static inline void |
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| 69 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, |
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| 70 | enum dma_data_direction direction) |
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| 71 | { |
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| 72 | BUG_ON(direction == DMA_NONE); |
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| 73 | } |
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| 74 | |||
| 75 | static inline void |
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| 76 | dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size, |
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| 77 | enum dma_data_direction direction) |
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| 78 | { |
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| 79 | flush_write_buffers(); |
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| 80 | } |
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| 81 | |||
| 82 | static inline void |
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| 83 | dma_sync_single_range(struct device *dev, dma_addr_t dma_handle, |
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| 84 | unsigned long offset, size_t size, |
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| 85 | enum dma_data_direction direction) |
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| 86 | { |
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| 87 | flush_write_buffers(); |
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| 88 | } |
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| 89 | |||
| 90 | |||
| 91 | static inline void |
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| 92 | dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems, |
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| 93 | enum dma_data_direction direction) |
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| 94 | { |
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| 95 | flush_write_buffers(); |
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| 96 | } |
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| 97 | |||
| 98 | static inline int |
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| 99 | dma_supported(struct device *dev, u64 mask) |
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| 100 | { |
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| 101 | /* |
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| 102 | * we fall back to GFP_DMA when the mask isn't all 1s, |
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| 103 | * so we can't guarantee allocations that must be |
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| 104 | * within a tighter range than GFP_DMA.. |
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| 105 | */ |
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| 106 | if(mask < 0x00ffffff) |
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| 107 | return 0; |
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| 108 | |||
| 109 | return 1; |
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| 110 | } |
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| 111 | |||
| 112 | static inline int |
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| 113 | dma_set_mask(struct device *dev, u64 mask) |
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| 114 | { |
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| 115 | if(!dev->dma_mask || !dma_supported(dev, mask)) |
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| 116 | return -EIO; |
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| 117 | |||
| 118 | *dev->dma_mask = mask; |
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| 119 | |||
| 120 | return 0; |
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| 121 | } |
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| 122 | |||
| 123 | static inline int |
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| 124 | dma_get_cache_alignment(void) |
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| 125 | { |
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| 126 | /* no easy way to get cache size on all x86, so return the |
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| 127 | * maximum possible, to be safe */ |
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| 128 | return (1 << L1_CACHE_SHIFT_MAX); |
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| 129 | } |
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| 130 | |||
| 131 | #define dma_is_consistent(d) (1) |
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| 132 | |||
| 133 | static inline void |
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| 134 | dma_cache_sync(void *vaddr, size_t size, |
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| 135 | enum dma_data_direction direction) |
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| 136 | { |
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| 137 | flush_write_buffers(); |
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| 138 | } |
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| 139 | |||
| 140 | #endif |