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/* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */

/*

        Written 1996-1998 by Donald Becker.

        This software may be used and distributed according to the terms

        of the GNU Public License, incorporated herein by reference.

        This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.

        Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597

        and the EtherLink XL 3c900 and 3c905 cards.

        The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O

        Center of Excellence in Space Data and Information Sciences

           Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771

*/

static char *version =

"3c59x.c:v0.99H 11/17/98 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/vortex.html\n";

/* "Knobs" that adjust features and parameters. */

/* Set the copy breakpoint for the copy-only-tiny-frames scheme.

   Setting to > 1512 effectively disables this feature. */

static const int rx_copybreak = 200;

/* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */

static const int mtu = 1500;

/* Maximum events (Rx packets, etc.) to handle at each interrupt. */

static int max_interrupt_work = 20;

/* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */

#define vortex_debug debug

#ifdef VORTEX_DEBUG

static int vortex_debug = VORTEX_DEBUG;

#else

static int vortex_debug = 1;

#endif

/* Some values here only for performance evaluation and path-coverage

   debugging. */

static int rx_nocopy = 0, rx_copy = 0, queued_packet = 0, rx_csumhits;

/* A few values that may be tweaked. */

/* Time in jiffies before concluding the transmitter is hung. */

#define TX_TIMEOUT  ((400*HZ)/1000)

/* Keep the ring sizes a power of two for efficiency. */

#define TX_RING_SIZE    16

#define RX_RING_SIZE    32

#define PKT_BUF_SZ              1536                    /* Size of each temporary Rx buffer.*/

#include <linux/config.h>

#include <linux/version.h>

#ifdef MODULE

#ifdef MODVERSIONS

#include <linux/modversions.h>

#endif

#include <linux/module.h>

#else

#define MOD_INC_USE_COUNT

#define MOD_DEC_USE_COUNT

#endif

#include <linux/kernel.h>

#include <linux/sched.h>

#include <linux/string.h>

#include <linux/timer.h>

#include <linux/errno.h>

#include <linux/in.h>

#include <linux/ioport.h>

#include <linux/malloc.h>

#include <linux/interrupt.h>

#include <linux/pci.h>

#include <linux/netdevice.h>

#include <linux/etherdevice.h>

#include <linux/skbuff.h>

#if LINUX_VERSION_CODE < 0x20155  ||  defined(CARDBUS)

#include <linux/bios32.h>

#endif

#include <asm/irq.h>                    /* For NR_IRQS only. */

#include <asm/bitops.h>

#include <asm/io.h>

/* Kernel compatibility defines, some common to David Hinds' PCMCIA package.

   This is only in the support-all-kernels source code. */

#define RUN_AT(x) (jiffies + (x))

#include <linux/delay.h>

#if (LINUX_VERSION_CODE <= 0x20100)

#ifndef __alpha__

#define ioremap(a,b) \

        (((a)<0x100000) ? (void *)((u_long)(a)) : vremap(a,b))

#define iounmap(v) \

        do { if ((u_long)(v) > 0x100000) vfree(v); } while (0)

#endif

#endif

#if LINUX_VERSION_CODE <= 0x20139

#define net_device_stats enet_statistics

#define NETSTATS_VER2

#endif

#if LINUX_VERSION_CODE < 0x20138

#define test_and_set_bit(val, addr) set_bit(val, addr)

#define le32_to_cpu(val) (val)

#define cpu_to_le32(val) (val)

#endif

#if LINUX_VERSION_CODE < 0x20155

#define PCI_SUPPORT_VER1

#else

#define PCI_SUPPORT_VER2

#endif

#if LINUX_VERSION_CODE < 0x20159

#define DEV_FREE_SKB(skb) dev_kfree_skb (skb, FREE_WRITE);

#else  /* Grrr, unneeded incompatible change. */

#define DEV_FREE_SKB(skb) dev_kfree_skb(skb);

#endif

#if defined(MODULE) && LINUX_VERSION_CODE > 0x20115

MODULE_AUTHOR("Donald Becker <becker@cesdis.gsfc.nasa.gov>");

MODULE_DESCRIPTION("3Com 3c590/3c900 series Vortex/Boomerang driver");

MODULE_PARM(debug, "i");

MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");

MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");

MODULE_PARM(rx_copybreak, "i");

MODULE_PARM(max_interrupt_work, "i");

MODULE_PARM(compaq_ioaddr, "i");

MODULE_PARM(compaq_irq, "i");

MODULE_PARM(compaq_device_id, "i");

#endif

/* Operational parameter that usually are not changed. */

/* The Vortex size is twice that of the original EtherLinkIII series: the

   runtime register window, window 1, is now always mapped in.

   The Boomerang size is twice as large as the Vortex -- it has additional

   bus master control registers. */

#define VORTEX_TOTAL_SIZE 0x20

#define BOOMERANG_TOTAL_SIZE 0x40

/* Set iff a MII transceiver on any interface requires mdio preamble.

   This only set with the original DP83840 on older 3c905 boards, so the extra

   code size of a per-interface flag is not worthwhile. */

static char mii_preamble_required = 0;

/*

                                Theory of Operation

I. Board Compatibility

This device driver is designed for the 3Com FastEtherLink and FastEtherLink

XL, 3Com's PCI to 10/100baseT adapters.  It also works with the 10Mbs

versions of the FastEtherLink cards.  The supported product IDs are

  3c590, 3c592, 3c595, 3c597, 3c900, 3c905

The related ISA 3c515 is supported with a separate driver, 3c515.c, included

with the kernel source or available from

    cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html

II. Board-specific settings

PCI bus devices are configured by the system at boot time, so no jumpers

need to be set on the board.  The system BIOS should be set to assign the

PCI INTA signal to an otherwise unused system IRQ line.

The EEPROM settings for media type and forced-full-duplex are observed.

The EEPROM media type should be left at the default "autoselect" unless using

10base2 or AUI connections which cannot be reliably detected.

III. Driver operation

The 3c59x series use an interface that's very similar to the previous 3c5x9

series.  The primary interface is two programmed-I/O FIFOs, with an

alternate single-contiguous-region bus-master transfer (see next).

The 3c900 "Boomerang" series uses a full-bus-master interface with separate

lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,

DEC Tulip and Intel Speedo3.  The first chip version retains a compatible

programmed-I/O interface that has been removed in 'B' and subsequent board

revisions.

One extension that is advertised in a very large font is that the adapters

are capable of being bus masters.  On the Vortex chip this capability was

only for a single contiguous region making it far less useful than the full

bus master capability.  There is a significant performance impact of taking

an extra interrupt or polling for the completion of each transfer, as well

as difficulty sharing the single transfer engine between the transmit and

receive threads.  Using DMA transfers is a win only with large blocks or

with the flawed versions of the Intel Orion motherboard PCI controller.

The Boomerang chip's full-bus-master interface is useful, and has the

currently-unused advantages over other similar chips that queued transmit

packets may be reordered and receive buffer groups are associated with a

single frame.

With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.

Rather than a fixed intermediate receive buffer, this scheme allocates

full-sized skbuffs as receive buffers.  The value RX_COPYBREAK is used as

the copying breakpoint: it is chosen to trade-off the memory wasted by

passing the full-sized skbuff to the queue layer for all frames vs. the

copying cost of copying a frame to a correctly-sized skbuff.

IIIC. Synchronization

The driver runs as two independent, single-threaded flows of control.  One

is the send-packet routine, which enforces single-threaded use by the

dev->tbusy flag.  The other thread is the interrupt handler, which is single

threaded by the hardware and other software.

IV. Notes

Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development

3c590, 3c595, and 3c900 boards.

The name "Vortex" is the internal 3Com project name for the PCI ASIC, and

the EISA version is called "Demon".  According to Terry these names come

from rides at the local amusement park.

The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!

This driver only supports ethernet packets because of the skbuff allocation

limit of 4K.

*/

/* This table drives the PCI probe routines.  It's mostly boilerplate in all

   of the drivers, and will likely be provided by some future kernel.

*/

enum pci_flags_bit {

        PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,

        PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,

};

struct pci_id_info {

        const char *name;

        u16     vendor_id, device_id, device_id_mask, flags;

        int drv_flags, io_size;

        struct device *(*probe1)(int pci_bus, int pci_devfn, struct device *dev,

                                                         long ioaddr, int irq, int chip_idx, int fnd_cnt);

};

enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4,

           HAS_PWR_CTRL=0x10, HAS_MII=0x20, HAS_NWAY=0x40, HAS_CB_FNS=0x80, };

static struct device *vortex_probe1(int pci_bus, int pci_devfn,

                                                                        struct device *dev, long ioaddr,

                                                                        int irq, int dev_id, int card_idx);

static struct pci_id_info pci_tbl[] = {

        {"3c590 Vortex 10Mbps",                 0x10B7, 0x5900, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, vortex_probe1},

        {"3c595 Vortex 100baseTx",              0x10B7, 0x5950, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, vortex_probe1},

        {"3c595 Vortex 100baseT4",              0x10B7, 0x5951, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, vortex_probe1},

        {"3c595 Vortex 100base-MII",    0x10B7, 0x5952, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, vortex_probe1},

        {"3Com Vortex",                                 0x10B7, 0x5900, 0xff00,

         PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, vortex_probe1},

        {"3c900 Boomerang 10baseT",             0x10B7, 0x9000, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, vortex_probe1},

        {"3c900 Boomerang 10Mbps Combo", 0x10B7, 0x9001, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, vortex_probe1},

        {"3c900 Cyclone 10Mbps Combo", 0x10B7, 0x9005, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE, 128, vortex_probe1},

        {"3c900B-FL Cyclone 10base-FL", 0x10B7, 0x900A, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE, 128, vortex_probe1},

        {"3c905 Boomerang 100baseTx",   0x10B7, 0x9050, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, vortex_probe1},

        {"3c905 Boomerang 100baseT4",   0x10B7, 0x9051, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, vortex_probe1},

        {"3c905B Cyclone 100baseTx",    0x10B7, 0x9055, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY, 128, vortex_probe1},

        {"3c905B Cyclone 10/100/BNC",   0x10B7, 0x9058, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY, 128, vortex_probe1},

        {"3c905B-FX Cyclone 100baseFx", 0x10B7, 0x905A, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE, 128, vortex_probe1},

        {"3c905C Tornado",      0x10B7, 0x9200, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE, 128, vortex_probe1},

        {"3c980 Cyclone",       0x10B7, 0x9800, 0xfff0,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE, 128, vortex_probe1},

        {"3cSOHO100-TX Hurricane",      0x10B7, 0x7646, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE, 128, vortex_probe1},

        {"3c555 Laptop Hurricane",      0x10B7, 0x5055, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE, 128, vortex_probe1},

        {"3c575 Boomerang CardBus",             0x10B7, 0x5057, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, vortex_probe1},

        {"3CCFE575 Cyclone CardBus",    0x10B7, 0x5157, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS,

         128, vortex_probe1},

        {"3CCFE656 Cyclone CardBus",    0x10B7, 0x6560, 0xffff,

         PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS,

         128, vortex_probe1},

        {"3c575 series CardBus (unknown version)", 0x10B7, 0x5057, 0xf0ff,

         PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, vortex_probe1},

        {"3Com Boomerang (unknown version)",    0x10B7, 0x9000, 0xff00,

         PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, vortex_probe1},

        {0,},                                           /* 0 terminated list. */

};

/* Operational definitions.

   These are not used by other compilation units and thus are not

   exported in a ".h" file.

   First the windows.  There are eight register windows, with the command

   and status registers available in each.

   */

#define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)

#define EL3_CMD 0x0e

#define EL3_STATUS 0x0e

/* The top five bits written to EL3_CMD are a command, the lower

   11 bits are the parameter, if applicable.

   Note that 11 parameters bits was fine for ethernet, but the new chip

   can handle FDDI length frames (~4500 octets) and now parameters count

   32-bit 'Dwords' rather than octets. */

enum vortex_cmd {

        TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,

        RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,

        UpStall = 6<<11, UpUnstall = (6<<11)+1,

        DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,

        RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,

        FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,

        SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,

        SetTxThreshold = 18<<11, SetTxStart = 19<<11,

        StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,

        StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};

/* The SetRxFilter command accepts the following classes: */

enum RxFilter {

        RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };

/* Bits in the general status register. */

enum vortex_status {

        IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,

        TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,

        IntReq = 0x0040, StatsFull = 0x0080,

        DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,

        DMAInProgress = 1<<11,                  /* DMA controller is still busy.*/

        CmdInProgress = 1<<12,                  /* EL3_CMD is still busy.*/

};

/* Register window 1 offsets, the window used in normal operation.

   On the Vortex this window is always mapped at offsets 0x10-0x1f. */

enum Window1 {

        TX_FIFO = 0x10,  RX_FIFO = 0x10,  RxErrors = 0x14,

        RxStatus = 0x18,  Timer=0x1A, TxStatus = 0x1B,

        TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */

};

enum Window0 {

        Wn0EepromCmd = 10,              /* Window 0: EEPROM command register. */

        Wn0EepromData = 12,             /* Window 0: EEPROM results register. */

        IntrStatus=0x0E,                /* Valid in all windows. */

};

enum Win0_EEPROM_bits {

        EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,

        EEPROM_EWENB = 0x30,            /* Enable erasing/writing for 10 msec. */

        EEPROM_EWDIS = 0x00,            /* Disable EWENB before 10 msec timeout. */

};

/* EEPROM locations. */

enum eeprom_offset {

        PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,

        EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,

        NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,

        DriverTune=13, Checksum=15};

enum Window2 {                  /* Window 2. */

        Wn2_ResetOptions=12,

};

enum Window3 {                  /* Window 3: MAC/config bits. */

        Wn3_Config=0, Wn3_MAC_Ctrl=6, Wn3_Options=8,

};

union wn3_config {

        int i;

        struct w3_config_fields {

                unsigned int ram_size:3, ram_width:1, ram_speed:2, rom_size:2;

                int pad8:8;

                unsigned int ram_split:2, pad18:2, xcvr:4, autoselect:1;

                int pad24:7;

        } u;

};

enum Window4 {          /* Window 4: Xcvr/media bits. */

        Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,

};

enum Win4_Media_bits {

        Media_SQE = 0x0008,             /* Enable SQE error counting for AUI. */

        Media_10TP = 0x00C0,    /* Enable link beat and jabber for 10baseT. */

        Media_Lnk = 0x0080,             /* Enable just link beat for 100TX/100FX. */

        Media_LnkBeat = 0x0800,

};

enum Window7 {                                  /* Window 7: Bus Master control. */

        Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,

};

/* Boomerang bus master control registers. */

enum MasterCtrl {

        PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,

        TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,

};

/* The Rx and Tx descriptor lists.

   Caution Alpha hackers: these types are 32 bits!  Note also the 8 byte

   alignment contraint on tx_ring[] and rx_ring[]. */

#define LAST_FRAG  0x80000000                   /* Last Addr/Len pair in descriptor. */

struct boom_rx_desc {

        u32 next;                                       /* Last entry points to 0.   */

        s32 status;

        u32 addr;                                       /* Up to 63 addr/len pairs possible. */

        s32 length;                                     /* Set LAST_FRAG to indicate last pair. */

};

/* Values for the Rx status entry. */

enum rx_desc_status {

        RxDComplete=0x00008000, RxDError=0x4000,

        /* See boomerang_rx() for actual error bits */

        IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,

        IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,

};

struct boom_tx_desc {

        u32 next;                                       /* Last entry points to 0.   */

        s32 status;                                     /* bits 0:12 length, others see below.  */

        u32 addr;

        s32 length;

};

/* Values for the Tx status entry. */

enum tx_desc_status {

        CRCDisable=0x2000, TxDComplete=0x8000,

        AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,

        TxIntrUploaded=0x80000000,              /* IRQ when in FIFO, but maybe not sent. */

};

/* Chip features we care about in vp->capabilities, read from the EEPROM. */

enum ChipCaps { CapBusMaster=0x20 };

struct vortex_private {

        /* The Rx and Tx rings should be quad-word-aligned. */

        struct boom_rx_desc rx_ring[RX_RING_SIZE];

        struct boom_tx_desc tx_ring[TX_RING_SIZE];

        /* The addresses of transmit- and receive-in-place skbuffs. */

        struct sk_buff* rx_skbuff[RX_RING_SIZE];

        struct sk_buff* tx_skbuff[TX_RING_SIZE];

        struct device *next_module;

        void *priv_addr;

        unsigned int cur_rx, cur_tx;            /* The next free ring entry */

        unsigned int dirty_rx, dirty_tx;        /* The ring entries to be free()ed. */

        struct net_device_stats stats;

        struct sk_buff *tx_skb;         /* Packet being eaten by bus master ctrl.  */

        /* PCI configuration space information. */

        u8 pci_bus, pci_devfn;          /* PCI bus location, for power management. */

        char *cb_fn_base;                       /* CardBus function status addr space. */

        int chip_id;

        /* The remainder are related to chip state, mostly media selection. */

        unsigned long in_interrupt;

        struct timer_list timer;        /* Media selection timer. */

        int options;                            /* User-settable misc. driver options. */

        unsigned int media_override:3,                  /* Passed-in media type. */

                default_media:4,                                /* Read from the EEPROM/Wn3_Config. */

                full_duplex:1, force_fd:1, autoselect:1,

                bus_master:1,                           /* Vortex can only do a fragment bus-m. */

                full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang  */

                hw_csums:1,                             /* Has hardware checksums. */

                tx_full:1;

        u16 status_enable;

        u16 intr_enable;

        u16 available_media;                            /* From Wn3_Options. */

        u16 capabilities, info1, info2;         /* Various, from EEPROM. */

        u16 advertising;                                        /* NWay media advertisement */

        unsigned char phys[2];                          /* MII device addresses. */

};

/* The action to take with a media selection timer tick.

   Note that we deviate from the 3Com order by checking 10base2 before AUI.

 */

enum xcvr_types {

        XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,

        XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,

};

static struct media_table {

        char *name;

        unsigned int media_bits:16,             /* Bits to set in Wn4_Media register. */

                mask:8,                         /* The transceiver-present bit in Wn3_Config.*/

                next:8;                         /* The media type to try next. */

        int wait;                       /* Time before we check media status. */

} media_tbl[] = {

  {     "10baseT",   Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},

  { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},

  { "undefined", 0,                     0x80, XCVR_10baseT, 10000},

  { "10base2",   0,                     0x10, XCVR_AUI,         (1*HZ)/10},

  { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},

  { "100baseFX", Media_Lnk, 0x04, XCVR_MII,             (14*HZ)/10},

  { "MII",               0,                     0x41, XCVR_10baseT, 3*HZ },

  { "undefined", 0,                     0x01, XCVR_10baseT, 10000},

  { "Autonegotiate", 0,         0x41, XCVR_10baseT, 3*HZ},

  { "MII-External",      0,             0x41, XCVR_10baseT, 3*HZ },

  { "Default",   0,                     0xFF, XCVR_10baseT, 10000},

};

#ifndef CARDBUS

static int vortex_scan(struct device *dev, struct pci_id_info pci_tbl[]);

#endif

static int vortex_open(struct device *dev);

static void mdio_sync(long ioaddr, int bits);

static int mdio_read(long ioaddr, int phy_id, int location);

static void mdio_write(long ioaddr, int phy_id, int location, int value);

static void vortex_timer(unsigned long arg);

static int vortex_start_xmit(struct sk_buff *skb, struct device *dev);

static int boomerang_start_xmit(struct sk_buff *skb, struct device *dev);

static int vortex_rx(struct device *dev);

static int boomerang_rx(struct device *dev);

static void vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);

static int vortex_close(struct device *dev);

static void update_stats(long ioaddr, struct device *dev);

static struct net_device_stats *vortex_get_stats(struct device *dev);

static void set_rx_mode(struct device *dev);

static int vortex_ioctl(struct device *dev, struct ifreq *rq, int cmd);

/* This driver uses 'options' to pass the media type, full-duplex flag, etc. */

/* Option count limit only -- unlimited interfaces are supported. */

#define MAX_UNITS 8

static int options[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1,};

static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};

/* A list of all installed Vortex devices, for removing the driver module. */

static struct device *root_vortex_dev = NULL;

#ifdef MODULE

#ifndef CARDBUS

/* Variables to work-around the Compaq PCI BIOS32 problem. */

static int compaq_ioaddr = 0, compaq_irq = 0, compaq_device_id = 0x5900;

#endif

#ifdef CARDBUS

#include <pcmcia/driver_ops.h>

static dev_node_t *vortex_attach(dev_locator_t *loc)

{

        u16 dev_id, vendor_id;

        u32 io;

        u8 bus, devfn, irq;

        struct device *dev;

        int chip_idx;

        if (loc->bus != LOC_PCI) return NULL;

        bus = loc->b.pci.bus; devfn = loc->b.pci.devfn;

        pcibios_read_config_dword(bus, devfn, PCI_BASE_ADDRESS_0, &io);

        pcibios_read_config_byte(bus, devfn, PCI_INTERRUPT_LINE, &irq);

        pcibios_read_config_word(bus, devfn, PCI_VENDOR_ID, &vendor_id);

        pcibios_read_config_word(bus, devfn, PCI_DEVICE_ID, &dev_id);

        printk(KERN_INFO "vortex_attach(bus %d, function %d, device %4.4x)\n",

                   bus, devfn, dev_id);

        io &= ~3;

        if (io == 0 || irq == 0) {

                printk(KERN_ERR "The 3Com CardBus Ethernet interface was not "

                           "assigned an %s.\n" KERN_ERR "  It will not be activated.\n",

                           io == 0 ? "I/O address" : "IRQ");

                return NULL;

        }

        for (chip_idx = 0; pci_tbl[chip_idx].vendor_id; chip_idx++)

                if (vendor_id == pci_tbl[chip_idx].vendor_id

                        && (dev_id & pci_tbl[chip_idx].device_id_mask) ==

                        pci_tbl[chip_idx].device_id)

                        break;

        if (pci_tbl[chip_idx].vendor_id == 0) {                 /* Compiled out! */

                printk(KERN_INFO "Unable to match chip type %4.4x %4.4x in "

                           "vortex_attach().\n", vendor_id, dev_id);

                return NULL;

        }

        dev = vortex_probe1(bus, devfn, NULL, io, irq, chip_idx, MAX_UNITS+1);

        if (dev) {

                dev_node_t *node = kmalloc(sizeof(dev_node_t), GFP_KERNEL);

                strcpy(node->dev_name, dev->name);

                node->major = node->minor = 0;

                node->next = NULL;

                MOD_INC_USE_COUNT;

                return node;

        }

        return NULL;

}

static void vortex_detach(dev_node_t *node)

{

        struct device **devp, **next;

        printk(KERN_INFO "vortex_detach(%s)\n", node->dev_name);

        for (devp = &root_vortex_dev; *devp; devp = next) {

                next = &((struct vortex_private *)(*devp)->priv)->next_module;

                if (strcmp((*devp)->name, node->dev_name) == 0) break;

        }

        if (*devp) {

                struct device *dev = *devp;

                struct vortex_private *vp = dev->priv;

                if (dev->flags & IFF_UP)

                        vortex_close(dev);

                dev->flags &= ~(IFF_UP|IFF_RUNNING);

                unregister_netdev(dev);

                if (vp->cb_fn_base) iounmap(vp->cb_fn_base);

                kfree(dev);

                *devp = *next;

                kfree(vp);

                kfree(node);

                MOD_DEC_USE_COUNT;

        }

}

struct driver_operations vortex_ops = {

        "3c575_cb", vortex_attach, NULL, NULL, vortex_detach

};

#endif  /* Cardbus support */

int init_module(void)

{

        if (vortex_debug)

                printk(KERN_INFO "%s", version);

#ifdef CARDBUS

        register_driver(&vortex_ops);

        return 0;

#else

        return vortex_scan(0, pci_tbl);

#endif

}

#else

int tc59x_probe(struct device *dev)

{

        static int scanned=0;

        if(scanned++)

                return -ENODEV;

        printk(KERN_INFO "%s", version);

        return vortex_scan(dev, pci_tbl);

}

#endif  /* not MODULE */

#ifndef CARDBUS

static int vortex_scan(struct device *dev, struct pci_id_info pci_tbl[])

{

        int cards_found = 0;

        /* Allow an EISA-only driver. */

#if defined(CONFIG_PCI) || (defined(MODULE) && !defined(NO_PCI))

        /* Ideally we would detect all cards in slot order.  That would

           be best done a central PCI probe dispatch, which wouldn't work

           well with the current structure.  So instead we detect 3Com cards

           in slot order. */

        if (pcibios_present()) {

                static int pci_index = 0;

                unsigned char pci_bus, pci_device_fn;

                for (;pci_index < 0xff; pci_index++) {

                        u16 vendor, device, pci_command, new_command, pwr_cmd;

                        int chip_idx, irq;

                        long ioaddr;

                        if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET << 8, pci_index,

                                                                        &pci_bus, &pci_device_fn)

                                != PCIBIOS_SUCCESSFUL)

                                break;

                        pcibios_read_config_word(pci_bus, pci_device_fn,

                                                                         PCI_VENDOR_ID, &vendor);

                        pcibios_read_config_word(pci_bus, pci_device_fn,

                                                                         PCI_DEVICE_ID, &device);

                        for (chip_idx = 0; pci_tbl[chip_idx].vendor_id; chip_idx++)

                                if (vendor == pci_tbl[chip_idx].vendor_id

                                        && (device & pci_tbl[chip_idx].device_id_mask) ==

                                        pci_tbl[chip_idx].device_id)

                                        break;

                        if (pci_tbl[chip_idx].vendor_id == 0)           /* Compiled out! */

                                continue;

                        {

#if LINUX_VERSION_CODE >= 0x20155

                                struct pci_dev *pdev = pci_find_slot(pci_bus, pci_device_fn);

                                ioaddr = pdev->base_address[0] & ~3;

                                irq = pdev->irq;

#else

                                u32 pci_ioaddr;

                                u8 pci_irq_line;

                                pcibios_read_config_byte(pci_bus, pci_device_fn,

                                                                                 PCI_INTERRUPT_LINE, &pci_irq_line);

                                pcibios_read_config_dword(pci_bus, pci_device_fn,

                                                                                  PCI_BASE_ADDRESS_0, &pci_ioaddr);

                                ioaddr = pci_ioaddr & ~3;;

                                irq = pci_irq_line;

#endif

                        }

                        /* Power-up the card. */

                        pcibios_read_config_word(pci_bus, pci_device_fn,

                                                                                 0xe0, &pwr_cmd);

                        if (pwr_cmd & 0x3) {

                                /* Save the ioaddr and IRQ info! */

                                printk(KERN_INFO "  A 3Com network adapter is powered down!"

                                           "  Setting the power state %4.4x->%4.4x.\n",

                                           pwr_cmd, pwr_cmd & ~3);

                                pcibios_write_config_word(pci_bus, pci_device_fn,

                                                                                  0xe0, pwr_cmd & ~3);

                                printk(KERN_INFO "  Setting the IRQ to %d, IOADDR to %#lx.\n",

                                           irq, ioaddr);

                                pcibios_write_config_byte(pci_bus, pci_device_fn,

                                                                                 PCI_INTERRUPT_LINE, irq);

                                pcibios_write_config_dword(pci_bus, pci_device_fn,

                                                                                  PCI_BASE_ADDRESS_0, ioaddr);

                        }

                        if (ioaddr == 0) {

                                printk(KERN_WARNING "  A 3Com network adapter has been found, "

                                           "however it has not been assigned an I/O address.\n"

                                           "  You may need to power-cycle the machine for this "

                                           "device to work!\n");

                                continue;

                        }

                        if (check_region(ioaddr, pci_tbl[chip_idx].io_size))

                                continue;

                        /* Activate the card. */

                        pcibios_read_config_word(pci_bus, pci_device_fn,

                                                                         PCI_COMMAND, &pci_command);

                        new_command = pci_command | PCI_COMMAND_MASTER|PCI_COMMAND_IO;

                        if (pci_command != new_command) {

                                printk(KERN_INFO "  The PCI BIOS has not enabled the device "

                                           "at %d/%d. Updating PCI command %4.4x->%4.4x.\n",

                                           pci_bus, pci_device_fn, pci_command, new_command);

                                pcibios_write_config_word(pci_bus, pci_device_fn,

                                                                                  PCI_COMMAND, new_command);

                        }

                        dev = vortex_probe1(pci_bus, pci_device_fn, dev, ioaddr, irq,

                                                                chip_idx, cards_found);

                        if (dev) {

                                /* Get and check the latency values.  On the 3c590 series

                                   the latency timer must be set to the maximum value to avoid

                                   data corruption that occurs when the timer expires during

                                   a transfer -- a bug in the Vortex chip only. */

                                u8 pci_latency;

                                u8 new_latency = (device & 0xff00) == 0x5900 ? 248 : 32;

                                pcibios_read_config_byte(pci_bus, pci_device_fn,

                                                                                 PCI_LATENCY_TIMER, &pci_latency);

                                if (pci_latency < new_latency) {

                                        printk(KERN_INFO "%s: Overriding PCI latency"

                                                   " timer (CFLT) setting of %d, new value is %d.\n",

                                                   dev->name, pci_latency, new_latency);

                                        pcibios_write_config_byte(pci_bus, pci_device_fn,

                                                                                          PCI_LATENCY_TIMER, new_latency);

                                }

                                dev = 0;

                                cards_found++;

                        }

                }